IPN50R2K0CE [INFINEON]
英飞凌正在拓展采用 SOT-223 封装的CoolMOS™ CE 产品组合,作为 DPAK 的一种高性价比替代产品,在某些设计中还可以减少占据的空间。此封装可以放置在典型的 DPAK 空间,且在热行为上的影响极小。英飞凌的 SOT-223 面向 LED 照明和移动充电器应用。;型号: | IPN50R2K0CE |
厂家: | Infineon |
描述: | 英飞凌正在拓展采用 SOT-223 封装的CoolMOS™ CE 产品组合,作为 DPAK 的一种高性价比替代产品,在某些设计中还可以减少占据的空间。此封装可以放置在典型的 DPAK 空间,且在热行为上的影响极小。英飞凌的 SOT-223 面向 LED 照明和移动充电器应用。 |
文件: | 总13页 (文件大小:1279K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IPN50R2K0CE
MOSFET
PG-SOT223
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
CoolMOS™ꢀisꢀaꢀrevolutionaryꢀtechnologyꢀforꢀhighꢀvoltageꢀpower
MOSFETs,ꢀdesignedꢀaccordingꢀtoꢀtheꢀsuperjunctionꢀ(SJ)ꢀprincipleꢀand
pioneeredꢀbyꢀInfineonꢀTechnologies.ꢀCoolMOS™ꢀCEꢀisꢀa
price-performanceꢀoptimizedꢀplatformꢀenablingꢀtoꢀtargetꢀcostꢀsensitive
applicationsꢀinꢀConsumerꢀandꢀLightingꢀmarketsꢀbyꢀstillꢀmeetingꢀhighest
efficiencyꢀstandards.ꢀTheꢀnewꢀseriesꢀprovidesꢀallꢀbenefitsꢀofꢀaꢀfast
switchingꢀSuperjunctionꢀMOSFETꢀwhileꢀnotꢀsacrificingꢀeaseꢀofꢀuseꢀand
offeringꢀtheꢀbestꢀcostꢀdownꢀperformanceꢀratioꢀavailableꢀonꢀtheꢀmarket.
Features
•ꢀExtremelyꢀlowꢀlossesꢀdueꢀtoꢀveryꢀlowꢀFOMꢀRdson*QgꢀandꢀEoss
•ꢀVeryꢀhighꢀcommutationꢀruggedness
•ꢀEasyꢀtoꢀuse/drive
Drain
Pin 2
•ꢀPb-freeꢀplating,ꢀHalogenꢀfreeꢀmoldꢀcompound
•ꢀQualifiedꢀforꢀstandardꢀgradeꢀapplications
Gate
Pin 1
Applications
Adapter,ꢀChargerꢀandꢀLighting
Source
Pin 3
Pleaseꢀnote:ꢀForꢀMOSFETꢀparallelingꢀtheꢀuseꢀofꢀferriteꢀbeadsꢀonꢀtheꢀgate
orꢀseperateꢀtotemꢀpolesꢀisꢀgenerallyꢀrecommended.
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
VDS @ Tj,max
RDS(on),max
ID
Value
550
2
Unit
V
Ω
3.6
6
A
Qg.typ
nC
A
ID,pulse
6.1
0.62
Eoss@400V
µJ
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPN50R2K0CE
PG-SOT223
50S2K0
see Appendix A
Final Data Sheet
1
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Final Data Sheet
2
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTjꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
3.6
2.3
TC = 25°C
A
Continuous drain current1)
ID
TC = 100°C
Pulsed drain current2)
ID,pulse
EAS
-
-
-
-
-
-
-
-
-
-
6.1
34
A
TC = 25°C
Avalanche energy, single pulse
Avalanche energy, repetitive
Avalanche current, repetitive
MOSFET dv/dt ruggedness
mJ
mJ
A
ID = 0.8A; VDD = 50V
ID = 0.8A; VDD = 50V
-
EAR
0.05
0.8
50
IAR
dv/dt
V/ns VDSꢀ=ꢀ0...400V
-20
-30
-
-
20
30
static;
V
Gate source voltage
VGS
AC (f>1 Hz)
Power dissipation
Ptot
-
-
-
-
-
5.0
150
1.0
6.1
W
°C
A
TCꢀ=ꢀ25°C
-
Operating and storage temperature
Continuous diode forward current
Diode pulse current2)
Tj,ꢀTstg
IS
-40
-
-
TCꢀ=ꢀ25°C
TC = 25°C
IS,pulse
A
VDSꢀ=ꢀ0...400V,ꢀISD<=IS,ꢀTj=25°C,
tcond<2µs
Reverse diode dv/dt3)
dv/dt
-
-
-
-
15
V/ns
VDSꢀ=ꢀ0...400V,ꢀISD<=IS,ꢀTj=25°C,
tcond<2µs
Maximum diode commutation speed3) dif/dt
500
A/µs
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - solder
point
RthJS
-
-
-
25
°C/W -
Thermal resistance, junction - ambient
for minimal footprint
RthJA
-
-
-
160
75
°C/W minimal footprint
Device on 40mm*40mm*1.5 epoxy
PCB FR4 with 6cm2 (one layer 70µm
°C/W thick) copper area for drain
connection and cooling. PCB is
vertical without blown air.
Thermal resistance, junction - ambient
soldered on copper area
RthJA
-
-
Soldering temperature, wavesoldering
only allowed at leads
Tsold
260
°C
reflow MSL3
1) DPAK equivalent. Limited by Tj max. Maximum duty cycle D=0.5
2) Pulse width tp limited by Tj,max
3)ꢀVDClink=400V;ꢀVDS,peak<V(BR)DSS;ꢀidenticalꢀlowꢀsideꢀandꢀhighꢀsideꢀswitchꢀwithꢀidenticalꢀRG
Final Data Sheet
3
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
500
Typ.
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
VGS(th)
-
V
V
VGS=0V,ꢀID=1mA
2.50
3
3.50
VDS=VGS,ꢀID=0.05mA
-
-
-
10
1
-
VDS=500V,ꢀVGS=0V,ꢀTj=25°C
VDS=500V,ꢀVGS=0V,ꢀTj=150°C
Zero gate voltage drain current
Gate-source leakage curent
Drain-source on-state resistance
Gate resistance
IDSS
µA
nA
Ω
IGSS
-
-
100
VGS=20V,ꢀVDS=0V
-
-
1.80
4.68
2.00
-
VGS=13V,ꢀID=0.6A,ꢀTj=25°C
VGS=13V,ꢀID=0.6A,ꢀTj=150°C
RDS(on)
RG
-
7
-
Ω
f=1ꢀMHz,ꢀopenꢀdrain
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
124
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
Output capacitance
Ciss
-
-
-
-
pF
pF
VGS=0V,ꢀVDS=100V,ꢀf=1MHz
VGS=0V,ꢀVDS=100V,ꢀf=1MHz
Coss
9
Effective output capacitance, energy
related1)
Co(er)
Co(tr)
td(on)
tr
-
-
-
-
-
-
8
-
-
-
-
-
-
pF
pF
ns
ns
ns
ns
VGS=0V,ꢀVDS=0...400V
Effective output capacitance, time
related2)
26
6
ID=constant,ꢀVGS=0V,ꢀVDS=0...400V
VDD=400V,ꢀVGS=13V,ꢀID=0.8A,
RG=5.3Ω
Turn-on delay time
Rise time
VDD=400V,ꢀVGS=13V,ꢀID=0.8A,
RG=5.3Ω
5
VDD=400V,ꢀVGS=13V,ꢀID=0.8A,
RG=5.3Ω
Turn-off delay time
Fall time
td(off)
tf
21
38
VDD=400V,ꢀVGS=13V,ꢀID=0.8A,
RG=5.3Ω
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
Values
Typ.
0.7
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge
Gate charge total
Qgs
-
-
-
-
-
-
-
-
nC
nC
nC
V
VDD=400V,ꢀID=0.8A,ꢀVGS=0ꢀtoꢀ10V
VDD=400V,ꢀID=0.8A,ꢀVGS=0ꢀtoꢀ10V
VDD=400V,ꢀID=0.8A,ꢀVGS=0ꢀtoꢀ10V
VDD=400V,ꢀID=0.8A,ꢀVGS=0ꢀtoꢀ10V
Qgd
3.5
Qg
6
Gate plateau voltage
Vplateau
5.4
1)ꢀCo(er)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V
2)ꢀCo(tr)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V
Final Data Sheet
4
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics
Values
Typ.
0.83
110
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Diode forward voltage
VSD
trr
-
-
-
-
-
-
-
-
V
VGS=0V,ꢀIF=0.8A,ꢀTf=25°C
Reverse recovery time
ns
µC
A
VR=400V,ꢀIF=0.8A,ꢀdiF/dt=100A/µs
VR=400V,ꢀIF=0.8A,ꢀdiF/dt=100A/µs
VR=400V,ꢀIF=0.8A,ꢀdiF/dt=100A/µs
Reverse recovery charge
Peak reverse recovery current
Qrr
Irrm
0.35
5.2
Final Data Sheet
5
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀSafeꢀoperatingꢀarea
6
101
1 µs
10 µs
5
4
3
2
1
0
100 µs
1 ms
100
10 ms
DC
10-1
10-2
10-3
0
25
50
75
100
125
150
100
101
102
103
TCꢀ[°C]
VDSꢀ[V]
Ptot=f(TC)
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
101
102
1 µs
10 µs
0.5
100
101
100 µs
0.2
0.1
1 ms
0.05
10 ms
DC
10-1
100
0.02
0.01
single pulse
10-2
10-1
10-3
10-2
100
101
102
103
10-5
10-4
10-3
10-2
10-1
100
101
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=80ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJCꢀ=f(tP);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀoutputꢀcharacteristics
7
5.0
20 V
20 V
10 V
8 V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
6
10 V
8 V
5
7 V
4
7 V
3
6 V
2
5.5 V
6 V
5.5 V
5 V
1
5 V
4.5 V
4.5 V
0
0
5
10
15
20
0
5
10
15
20
VDSꢀ[V]
VDSꢀ[V]
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
ID=f(VDS);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance
Diagramꢀ8:ꢀDrain-sourceꢀon-stateꢀresistance
6.0
6
5 V
6 V
7 V
6.5 V
5.5 V
5.5
5.0
4.5
4.0
3.5
3.0
5
4
10 V
98%
3
typ
2
1
0
0
1
2
3
4
-50
-25
0
25
50
75
100
125
150
IDꢀ[A]
Tjꢀ[°C]
RDS(on)=f(ID);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(Tj);ꢀID=0.6ꢀA;ꢀVGS=13ꢀV
Final Data Sheet
7
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
Diagramꢀ9:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ10:ꢀTyp.ꢀgateꢀcharge
7
10
9
8
7
6
5
4
3
2
1
0
6
25 °C
120 V
5
4
400 V
150 °C
3
2
1
0
0
2
4
6
8
10
12
0
2
4
6
VGSꢀ[V]
Qgateꢀ[nC]
ID=f(VGS);ꢀVDS=20V;ꢀparameter:ꢀTj
VGS=f(Qgate);ꢀID=0.8ꢀAꢀpulsed;ꢀparameter:ꢀVDD
Diagramꢀ11:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
Diagramꢀ12:ꢀAvalancheꢀenergy
102
35
25 °C
125 °C
30
25
20
15
10
5
101
100
10-1
0
0.0
0.5
1.0
1.5
2.0
25
50
75
100
125
150
VSDꢀ[V]
Tjꢀ[°C]
IF=f(VSD);ꢀparameter:ꢀTj
EAS=f(Tj);ꢀID=0.8ꢀA;ꢀVDD=50ꢀV
Final Data Sheet
8
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
Diagramꢀ13:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagramꢀ14:ꢀTyp.ꢀcapacitances
580
104
560
540
520
500
480
460
440
103
Ciss
102
101
Coss
Crss
100
-75 -50 -25
0
25
50
75 100 125 150 175
0
100
200
300
400
500
Tjꢀ[°C]
VDSꢀ[V]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
Diagramꢀ15:ꢀTyp.ꢀCossꢀstoredꢀenergy
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
0
100
200
300
400
500
VDSꢀ[V]
Eoss=f(VDS
)
Final Data Sheet
9
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
5ꢀꢀꢀꢀꢀTestꢀCircuits
Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics
Test circuit for diode characteristics
Diode recovery waveform
V,I
VDS
Rg1
VDS(peak)
VDS
trr
VDS
IF
tF
tS
dIF / dt
Rg 2
IF
t
10%Irrm
Q
F
Q
S
IF
dI / dt
rr
trr =tF +tS
rr
Irrm
Q =QF +Q
S
Rg1 = Rg 2
Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimes
Switching times test circuit for inductive load
Switching times waveform
VDS
90%
10%
VDS
VGS
VGS
td(off)
tf
td(on)
ton
tr
toff
Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀload
Unclamped inductive load test circuit
Unclamped inductive waveform
V(BR)DS
ID
VDS
VDS
VDS
ID
Final Data Sheet
10
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
6ꢀꢀꢀꢀꢀPackageꢀOutlines
DOCUMENT NO.
Z8B00180553
0
SCALE
MILLIMETERS
DIM
INCHES
MIN
1.52
-
MAX
1.80
0.10
1.70
0.80
3.10
0.32
6.70
7.30
3.70
MIN
0.060
-
MAX
2.5
A
A1
A2
b
0.071
0.004
0.067
0.031
0.122
0.013
0.264
0.287
0.146
0
2.5
1,50
0.059
0.024
0.116
0.009
0.248
0.264
0.130
5mm
0.60
2.95
0.24
6.30
6.70
3.30
b2
c
EUROPEAN PROJECTION
D
E
E1
e
2.3 BASIC
4.6 BASIC
0.091 BASIC
0.181 BASIC
e1
L
ISSUE DATE
24-02-2016
0.75
1.10
0.030
0.043
N
3
3
REVISION
O
ꢀ
ꢁꢀ
ꢀ
ꢁꢀ
01
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-SOT223,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
11
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
7ꢀꢀꢀꢀꢀAppendixꢀA
Tableꢀ11ꢀꢀꢀꢀꢀRelatedꢀLinks
• IFXꢀCoolMOSꢀWebpage:ꢀwww.infineon.com
• IFXꢀDesignꢀtools:ꢀwww.infineon.com
Final Data Sheet
12
Rev.ꢀ2.1,ꢀꢀ2016-06-13
500VꢀCoolMOSªꢀCEꢀPowerꢀTransistor
IPN50R2K0CE
RevisionꢀHistory
IPN50R2K0CE
Revision:ꢀ2016-06-13,ꢀRev.ꢀ2.1
Previous Revision
Revision Date
Subjects (major changes since last revision)
2.0
2.1
Release of final version
Updated ID ratings
2016-04-29
2016-06-13
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.
TrademarksꢀupdatedꢀAugustꢀ2015
OtherꢀTrademarks
Allꢀreferencedꢀproductꢀorꢀserviceꢀnamesꢀandꢀtrademarksꢀareꢀtheꢀpropertyꢀofꢀtheirꢀrespectiveꢀowners.
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improveꢀtheꢀqualityꢀofꢀthisꢀdocument.ꢀPleaseꢀsendꢀyourꢀproposalꢀ(includingꢀaꢀreferenceꢀtoꢀthisꢀdocument)ꢀto:
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81726ꢀMünchen,ꢀGermany
©ꢀ2016ꢀInfineonꢀTechnologiesꢀAG
AllꢀRightsꢀReserved.
LegalꢀDisclaimer
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristics.ꢀWith
respectꢀtoꢀanyꢀexamplesꢀorꢀhintsꢀgivenꢀherein,ꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplication
ofꢀtheꢀdevice,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithout
limitation,ꢀwarrantiesꢀofꢀnon-infringementꢀofꢀintellectualꢀpropertyꢀrightsꢀofꢀanyꢀthirdꢀparty.
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Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
13
Rev.ꢀ2.1,ꢀꢀ2016-06-13
相关型号:
IPN60R360P7S
CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。
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IPN60R360PFD7S
600V CoolMOS™ PFD7 超结 MOSFET (IPN60R360PFD7S) 补充了CoolMOS™ 7,可用于消费类应用。采用 SOT-223 封装的 IPN60R360PFD7S,其 RDS(on) 为 360mOhm,降低了开关损耗。600V CoolMOS™ PFD7 SJ MOSFET 配置了快速体二极管,可确保器件坚固耐用,进而为客户减少物料清单(BOM)。英飞凌先进的 SMD 封装进一步减少了 PCB 空间,可促进生产。
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IPN60R600P7S
CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。
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IPN60R600PFD7S
600V CoolMOS™ PFD7 超结 MOSFET (IPN60R600PFD7S) 补充了CoolMOS™ 7,可用于消费类应用。采用 SOT-223 封装的 IPN60R600PFD7S,其 RDS(on) 为 600mOhm,降低了开关损耗。600V CoolMOS™ PFD7 SJ MOSFET 配置了快速体二极管,可确保器件坚固耐用,进而为客户减少物料清单(BOM)。英飞凌先进的 SMD 封装进一步减少了 PCB 空间,可促进生产。
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IPN70R1K4P7S
CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。
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IPN70R2K0P7SATMA1
Small Signal Field-Effect Transistor, 700V, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET,
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IPN70R360P7S
CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。
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IPN70R600P7S
CoolMOS™ P7 超结 (SJ) MOSFET 专为解决低功率 SMPS 市场典型挑战而设计,具有优异性能和易用性,改进外形规格,提高价格竞争力。SOT-223 封装是高成本效益的一对一插入式 DPAK 替代产品,还能够减少部分设计的空间占用。该产品可在典型 DPAK 所占用空间中安放,具有与之相当的热性能。这一组合使采用SOT-223 封装的CoolMOS™ P7 完美适用于目标应用。
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IPN70R900P7S
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IPN80R1K2P7
800V CoolMOS™ P7超结MOSFET系列完全适合低功率SMPS应用,可完全满足性能,易用性和性价比等市场需求。它主要侧重于反激式应用,包括适配器和充电器,LED驱动器,音频SMPS,辅助和工业电源。
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