IPDQ65R040CFD7 [INFINEON]
Infineon’s 650 V CoolMOS™ CFD7 superjunction MOSFET IPDQ65R040CFD7 in a QDPAK package is ideally suited for resonant topologies in industrial applications, such as server, telecom, solar, and EV-charging stations, in which it enables significant efficiency improvements compared to competition. As a successor to the CFD2 SJ MOSFET family, it comes with reduced gate charge, improved turn-off behavior, and reduced reverse recovery charge enabling highest efficiency and power density as well as additional 50 V breakdown voltage.;型号: | IPDQ65R040CFD7 |
厂家: | Infineon |
描述: | Infineon’s 650 V CoolMOS™ CFD7 superjunction MOSFET IPDQ65R040CFD7 in a QDPAK package is ideally suited for resonant topologies in industrial applications, such as server, telecom, solar, and EV-charging stations, in which it enables significant efficiency improvements compared to competition. As a successor to the CFD2 SJ MOSFET family, it comes with reduced gate charge, improved turn-off behavior, and reduced reverse recovery charge enabling highest efficiency and power density as well as additional 50 V breakdown voltage. 光电二极管 |
文件: | 总14页 (文件大小:1252K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IPDQ65R040CFD7
MOSFET
PG-HDSOP-22
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
Theꢀlatestꢀ650ꢀVꢀCoolMOS™ꢀCFD7ꢀextendsꢀtheꢀvoltageꢀclassꢀofferingꢀof
theꢀCFD7ꢀfamilyꢀandꢀisꢀaꢀsuccessorꢀtoꢀtheꢀ650ꢀVꢀCoolMOS™ꢀCFD2.
Resultingꢀfromꢀimprovedꢀswitchingꢀperformanceꢀandꢀexcellentꢀthermal
behavior,ꢀ650ꢀVꢀCooMOS™ꢀCFD7ꢀoffersꢀhighestꢀefficiencyꢀinꢀresonant
switchingꢀtopologies,ꢀsuchꢀasꢀLLCꢀandꢀphase-shift-full-bridgeꢀ(ZVS).ꢀAs
partꢀofꢀInfineon’sꢀfastꢀbodyꢀdiodeꢀportfolio,ꢀthisꢀnewꢀproductꢀseriesꢀblends
allꢀadvantagesꢀofꢀaꢀfastꢀswitchingꢀtechnologyꢀtogetherꢀwithꢀsuperiorꢀhard
commutationꢀrobustness.ꢀTheꢀCoolMOS™ꢀCFD7ꢀtechnologyꢀmeets
highestꢀefficiencyꢀandꢀreliabilityꢀstandardsꢀandꢀfurthermoreꢀsupportsꢀhigh
powerꢀdensityꢀsolutions.
22
12
TAB
1
11
Drain
Pin 12-22, Tab
Features
•ꢀUltra-fastꢀbodyꢀdiode
•ꢀ650Vꢀbreakꢀdownꢀvoltage
•ꢀBest-in-classꢀRDS(on)
•ꢀReducedꢀswitchingꢀlosses
•ꢀLowꢀRDS(on)ꢀdependencyꢀoverꢀtemperature
*1
Gate
Pin 1
Driver
Source
Pin 2
Power
Source
Pin 3-11
*1: Internal body diode
Benefits
•ꢀExcellentꢀhardꢀcommutationꢀruggedness
•ꢀExtraꢀsafetyꢀmarginꢀforꢀdesignsꢀwithꢀincreasedꢀbusꢀvoltage
•ꢀEnablingꢀincreasedꢀpowerꢀdensityꢀsolutions
•ꢀOutstandingꢀlightꢀloadꢀefficiencyꢀinꢀindustrialꢀSMPSꢀapplications
•ꢀImprovedꢀfullꢀloadꢀefficiencyꢀinꢀindustrialꢀSMPSꢀapplications
Potentialꢀapplications
Optimizedꢀforꢀphase-shiftꢀfull-bridgeꢀ(ZVS),ꢀLLCꢀApplicationsꢀ–ꢀServer,
Telecom,ꢀEVꢀCharging,ꢀSolar
Productꢀvalidation
FullyꢀqualifiedꢀaccordingꢀtoꢀJEDECꢀforꢀIndustrialꢀApplications
Pleaseꢀnote:ꢀTheꢀsourceꢀandꢀsenseꢀsourceꢀpinsꢀareꢀnotꢀexchangeable.
Theirꢀexchangeꢀmightꢀleadꢀtoꢀmalfunction.ꢀForꢀparallelingꢀ4pinꢀMOSFET
devicesꢀtheꢀplacementꢀofꢀtheꢀgateꢀresistorꢀisꢀgenerallyꢀrecommendedꢀtoꢀbe
onꢀtheꢀDriverꢀSourceꢀinsteadꢀofꢀtheꢀGate.
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
VDS @ Tj,max
RDS(on),max
Value
700
40
Unit
V
mΩ
nC
A
Qg,typ
97
ID,pulse
211
14.8
1300
Eoss @ 400V
Body diode diF/dt
µJ
A/µs
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IPDQ65R040CFD7
PG-HDSOP-22
65R040F7
see Appendix A
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Test Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Appendix A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTjꢀ=ꢀ25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
-
-
-
-
64
40
TC=25°C
A
Continuous drain current1)
ID
TC=100°C
Pulsed drain current2)
ID,pulse
EAS
EAR
IAS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
211
248
1.24
6.4
A
TC=25°C
Avalanche energy, single pulse
Avalanche energy, repetitive
Avalanche current, single pulse
MOSFET dv/dt ruggedness
Gate source voltage (static)
Gate source voltage (dynamic)
Power dissipation
-
mJ
mJ
A
ID=6.4A; VDD=50V; see table 10
-
ID=6.4A; VDD=50V; see table 10
-
-
dv/dt
VGS
VGS
Ptot
Tstg
Tj
-
120
20
V/ns VDS=0...400V
-20
-30
-
V
static;
30
V
AC (f>1 Hz)
357
150
150
n.a.
64
W
°C
°C
TC=25°C
Storage temperature
-55
-55
-
-
-
Operating junction temperature
Mounting torque
-
Ncm -
Continuous diode forward current1)
Diode pulse current2)
IS
-
A
A
TC=25°C
IS,pulse
-
211
TC=25°C
VDS=0...400V,ꢀISD<=24.8A,ꢀTj=25°Cꢀꢀ
Reverse diode dv/dt3)
dv/dt
-
-
70
V/ns
see table 8
VDS=0...400V,ꢀISD<=24.8A,ꢀTj=25°Cꢀꢀ
Maximum diode commutation speed
Insulation withstand voltage
diF/dt
-
-
-
-
1300 A/µs
n.a.
see table 8
VISO
V
Vrms,ꢀTC=25°C,ꢀt=1min
1) Limited by Tj max
.
2) Pulse width tp limited by Tj,max
3) Identical low side and high side switch with identical RG
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
0.35
62
Thermal resistance, junction - case
RthJC
-
-
-
-
°C/W -
Thermal resistance, junction - ambient RthJA
°C/W device on PCB, minimal footprint
Device on 40mm*40mm*1.5mm
epoxy PCB FR4 with 6cm² (one
°C/W layer, 70µm thickness) copper area.
Tap exposed to air. PCB is vertical
without air stream cooling.
Thermal resistance, junction - ambient
for SMD version
RthJA
-
-
45
-
55
Soldering temperature, wave- & reflow
soldering allowed
Tsold
260
°C
reflow MSL1
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
650
3.5
Typ.
Max.
-
Drain-source breakdown voltage
Gate threshold voltage
V(BR)DSS
V(GS)th
-
V
V
VGS=0V,ꢀID=1mA
4
4.5
VDS=VGS,ꢀID=1.24mA
-
-
-
19
1
76
VDS=650V,ꢀVGS=0V,ꢀTj=25°C
VDS=650V,ꢀVGS=0V,ꢀTj=125°C
Zero gate voltage drain current1)
Gate-source leakage current
Drain-source on-state resistance
Gate resistance
IDSS
µA
nA
Ω
IGSS
-
-
100
VGS=20V,ꢀVDS=0V
-
-
0.034 0.040
0.076
VGS=10V,ꢀID=24.8A,ꢀTj=25°C
VGS=10V,ꢀID=24.8A,ꢀTj=150°C
RDS(on)
RG
-
-
3.8
-
Ω
f=1MHz,ꢀopenꢀdrain
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
4975
75
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance
Output capacitance
Ciss
-
-
-
-
pF
pF
VGS=0V,ꢀVDS=400V,ꢀf=250kHz
VGS=0V,ꢀVDS=400V,ꢀf=250kHz
Coss
Effective output capacitance, energy
related2)
Co(er)
Co(tr)
td(on)
tr
-
-
-
-
-
-
185
1957
34
-
-
-
-
-
-
pF
pF
ns
ns
ns
ns
VGS=0V,ꢀVDS=0...400V
Effective output capacitance, time
related3)
ID=constant,ꢀVGS=0V,ꢀVDS=0...400V
VDD=400V,ꢀVGS=13V,ꢀID=24.8A,
RG=3.3Ω;ꢀseeꢀtableꢀ9
Turn-on delay time
Rise time
VDD=400V,ꢀVGS=13V,ꢀID=24.8A,
RG=3.3Ω;ꢀseeꢀtableꢀ9
10
VDD=400V,ꢀVGS=13V,ꢀID=24.8A,
RG=3.3Ω;ꢀseeꢀtableꢀ9
Turn-off delay time
Fall time
td(off)
tf
115
3
VDD=400V,ꢀVGS=13V,ꢀID=24.8A,
RG=3.3Ω;ꢀseeꢀtableꢀ9
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics
Values
Typ.
29
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate to drain charge
Gate charge total
Qgs
-
-
-
-
-
-
-
-
nC
nC
nC
V
VDD=400V,ꢀID=24.8A,ꢀVGS=0ꢀtoꢀ10V
VDD=400V,ꢀID=24.8A,ꢀVGS=0ꢀtoꢀ10V
VDD=400V,ꢀID=24.8A,ꢀVGS=0ꢀtoꢀ10V
VDD=400V,ꢀID=24.8A,ꢀVGS=0ꢀtoꢀ10V
Qgd
29
Qg
97
Gate plateau voltage
Vplateau
5.7
1) Maximum specification is defined by calculated six sigma upper confidence bound
2)ꢀCo(er)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀstoredꢀenergyꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V
3)ꢀCo(tr)ꢀisꢀaꢀfixedꢀcapacitanceꢀthatꢀgivesꢀtheꢀsameꢀchargingꢀtimeꢀasꢀCossꢀwhileꢀVDSꢀisꢀrisingꢀfromꢀ0ꢀtoꢀ400V
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiodeꢀcharacteristics
Values
Typ.
1.0
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Diode forward voltage
Reverse recovery time
VSD
trr
-
-
V
VGS=0V,ꢀIF=24.8A,ꢀTj=25°C
VR=400V,ꢀIF=24.8A,ꢀdiF/dt=100A/µs;
see table 8
-
-
-
180
1.3
270
2.6
-
ns
VR=400V,ꢀIF=24.8A,ꢀdiF/dt=100A/µs;
see table 8
Reverse recovery charge
Qrr
Irrm
µC
A
VR=400V,ꢀIF=24.8A,ꢀdiF/dt=100A/µs;
see table 8
Peak reverse recovery current
11.8
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀSafeꢀoperatingꢀarea
400
103
102
101
1 µs
300
200
100
0
10 µs
100
100 µs
10-1
10-2
10-3
1 ms
10 ms
DC
0
25
50
75
100
125
150
100
101
102
103
TCꢀ[°C]
VDSꢀ[V]
Ptot=f(TC)
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
103
100
102
101
1 µs
10 µs
100 µs
1 ms
0.5
100
10-1
0.2
10-1
10-2
10-3
0.1
0.05
10 ms
DC
0.02
0.01
single pulse
10-2
100
101
102
103
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=80ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJCꢀ=f(tP);ꢀparameter:ꢀD=tp/T
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀoutputꢀcharacteristics
400
250
20 V
20 V
10 V
350
10 V
200
150
100
50
300
8 V
7 V
8 V
250
200
150
7 V
6 V
100
5.5 V
50
6 V
5 V
4.5 V
5.5 V
5 V
4.5 V
0
0
0
5
10
15
20
0
5
10
15
20
VDSꢀ[V]
VDSꢀ[V]
ID=f(VDS);ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
ID=f(VDS);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀdrain-sourceꢀon-stateꢀresistance
Diagramꢀ8:ꢀDrain-sourceꢀon-stateꢀresistance
0.150
2.5
2.0
1.5
1.0
0.5
0.120
5.5 V
6 V
7 V
6.5 V
0.090
10 V
20 V
0.060
0
50
100
150
200
250
-50
-25
0
25
50
75
100
125
150
IDꢀ[A]
Tjꢀ[°C]
RDS(on)=f(ID);ꢀTj=125ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(Tj);ꢀID=24.8ꢀA;ꢀVGS=10ꢀV
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
Diagramꢀ9:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ10:ꢀTyp.ꢀgateꢀcharge
400
12
25 °C
400 V
10
8
120 V
300
200
6
150 °C
4
100
2
0
0
0
2
4
6
8
10
12
0
20
40
60
80
100
120
VGSꢀ[V]
Qgateꢀ[nC]
ID=f(VGS);ꢀVDS=20V;ꢀparameter:ꢀTj
VGS=f(Qgate);ꢀID=24.8ꢀAꢀpulsed;ꢀparameter:ꢀVDD
Diagramꢀ11:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
Diagramꢀ12:ꢀAvalancheꢀenergy
102
250
200
150
100
50
25 °C
101
125 °C
100
10-1
0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
25
50
75
100
125
150
VSDꢀ[V]
Tjꢀ[°C]
IF=f(VSD);ꢀparameter:ꢀTj
EAS=f(Tj);ꢀID=6.4ꢀA;ꢀVDD=50ꢀV
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
Diagramꢀ13:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagramꢀ14:ꢀTyp.ꢀcapacitances
730
105
700
670
640
610
580
104
Ciss
103
102
101
100
Coss
Crss
-50
-25
0
25
50
75
100
125
150
0
100
200
300
400
500
Tjꢀ[°C]
VDSꢀ[V]
VBR(DSS)=f(Tj);ꢀID=1ꢀmA
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=250ꢀkHz
Diagramꢀ15:ꢀTyp.ꢀCossꢀstoredꢀenergy
20
15
10
5
0
0
100
200
300
400
500
VDSꢀ[V]
Eoss=f(VDS
)
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
5ꢀꢀꢀꢀꢀTestꢀCircuits
Tableꢀ8ꢀꢀꢀꢀꢀDiodeꢀcharacteristics
Test circuit for diode characteristics
Diode recovery waveform
Rg1
VDS
Rg 2
IF
Rg1 = Rg 2
Tableꢀ9ꢀꢀꢀꢀꢀSwitchingꢀtimesꢀ(ss)
Switching times test circuit for inductive load
Switching times waveform
VDS
90%
10%
VDS
VGS
VGS
td(off)
tf
td(on)
ton
tr
toff
Tableꢀ10ꢀꢀꢀꢀꢀUnclampedꢀinductiveꢀloadꢀ(ss)
Unclamped inductive load test circuit
Unclamped inductive waveform
V(BR)DS
ID
VDS
VDS
VDS
ID
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
6ꢀꢀꢀꢀꢀPackageꢀOutlines
DOCUMENT NO.
Z8B00184650
REVISION
02
MILLIMETERS
DIMENSIONS
MIN.
2.20
MAX.
2.35
SCALE 5:1
A
A1
A2
b
0.00
0.15
0
1
2
3
4
5mm
0.89
1.10
0.50
0.70
c
0.46
0.58
EUROPEAN PROJECTION
D
15.30
10.23
14.90
11.91
15.50
10.43
15.10
12.11
D1
E
E1
e
1.14
22
N
ISSUE DATE
16.01.2018
H
20.86
1.20
21.06
1.40
L
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HDSOP-22,ꢀdimensionsꢀinꢀmm
Final Data Sheet
12
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
7ꢀꢀꢀꢀꢀAppendixꢀA
Tableꢀ11ꢀꢀꢀꢀꢀRelatedꢀLinks
• IFXꢀCoolMOSꢀCFD7ꢀ650VꢀWebpage:ꢀwww.infineon.com
• IFXꢀCoolMOSꢀCFD7ꢀ650Vꢀapplicationꢀnote:ꢀwww.infineon.com
• IFXꢀCoolMOSꢀCFD7ꢀ650Vꢀsimulationꢀmodel:ꢀwww.infineon.com
• IFXꢀDesignꢀtools:ꢀwww.infineon.com
Final Data Sheet
13
Rev.ꢀ2.0,ꢀꢀ2022-08-29
650VꢀCoolMOSªꢀCFD7ꢀSJꢀPowerꢀDevice
IPDQ65R040CFD7
RevisionꢀHistory
IPDQ65R040CFD7
Revision:ꢀ2022-08-29,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
Release of final version
2.0
2022-08-29
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intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
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Final Data Sheet
14
Rev.ꢀ2.0,ꢀꢀ2022-08-29
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