BTT6200-4ESA [INFINEON]
The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is specially designed to drive lamps up to R10 W 24 V or R5 W 12 V, as well as LEDs in the harsh automotive environment.;![BTT6200-4ESA](http://pdffile.icpdf.com/pdf2/p00369/img/icpdf/BTT6200-4ESA_2255366_icpdf.jpg)
型号: | BTT6200-4ESA |
厂家: | ![]() |
描述: | The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is integrated in Smart6 HV technology. It is specially designed to drive lamps up to R10 W 24 V or R5 W 12 V, as well as LEDs in the harsh automotive environment. |
文件: | 总51页 (文件大小:1248K) |
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™
PROFET + 24V
BTT6200-4ESA
Feature list
•
•
•
•
•
•
•
•
Quad channel device
Very low stand-by current
3.3 V and 5 V compatible logic inputs
Electrostatic discharge protection (ESD)
Optimized electromagnetic compatibility
Logic ground independent from load ground
Very low power DMOS leakage current in OFF state
Green product (RoHS compliant)
Potential applications
•
•
•
•
Suitable for resistive, inductive and capacitive loads
Replaces electromechanical relays, fuses and discrete circuits
Most suitable for loads with high inrush current, such as lamps
Suitable for 12 V and 24 V trucks and transportation systems
VBAT
Voltage Regulator
OUT
VS
GND
T1
Z
CVDD
CVS
VDD
VS
RDEN
I/O
DEN
OUT0
OUT1
COUT
Relay
I/O
I/O
RDSEL
DSEL0
DSEL1
86
85
30
87
RDSEL
COUT
RIN
RIN
RIN
RIN
I/O
I/O
I/O
I/O
IN0
IN1
IN2
IN3
Micro
controller
+
-
OUT2
OUT3
COUT
E.C.U.
OT3
OUT4
COUT
RSENSE
IS
A/D
GND
LED
R5W
GND
CSENSE
D
Page-1
Figure 1
Application Diagram with BTT6200-4ESA
Product Type
Package
Marking
BTT62004ESA
BTT6200-4ESA
PG-TSDSO-24
Datasheet
Please read the Important Notice and Warnings at the end of this document
Rev. 1.00
www.infineon.com
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Product summary
Product summary
The BTT6200-4ESA is a 200 mΩ quad channel Smart High-Side Power Switch, embedded in a PG-TSDSO-24
package, providing protective functions and diagnosis.
The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is
integrated in Smart6 HV technology. It is specially designed to drive lamps up to R10 W 24 V or R5 W 12 V, as well
as LEDs in the harsh automotive environment.
Table 1
Product summary
Parameter
Symbol
VS(OP)
Value
5 V to 36 V
65 V
Operating voltage range
Maximum supply voltage
VS(LD)
Maximum ON state resistance at TJ = 150°C per channel
Nominal load current (one channel active)
Nominal load current (all channels active)
Typical current sense ratio
RDS(ON)
IL(NOM)1
IL(NOM)2
kILIS
400 mΩ
1.5 A
1 A
300
Minimum current limitation
IL5(SC)
9 A
Maximum standby current with load at TJ = 25°C
IS(OFF)
500 nA
Diagnostic functions
•
•
•
•
•
•
Proportional load current sense multiplexed for the 4 channels
Open load detection in ON and OFF
Short circuit to battery and ground indication
Overtemperature switch off detection
Stable diagnostic signal during short circuit
Enhanced kILIS dependency with temperature and load current
Protection functions
•
•
•
•
•
•
Stable behavior during undervoltage
Reverse polarity protection with external components
Secure load turn-off during logic ground disconnection with external components
Overtemperature protection with latch
Overvoltage protection with external components
Enhanced short circuit operation
Product validation
Qualified for Automotive Applications.
Product validation according to AEC-Q100/101.
Datasheet
2
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Table of contents
Table of contents
Feature list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Potential applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Product summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Product validation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Block diagram reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1
2
3
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.1
3.2
3.3
4
4.1
4.2
4.3
4.3.1
4.3.2
Electrical characteristics and parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
PCB set-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5
Power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output ON-state resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn ON/OFF characteristics with resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Inductive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Output clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Maximum load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Inverse current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical characteristics - power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.1
5.2
5.3
5.3.1
5.3.2
5.4
5.5
6
Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Loss of ground protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Undervoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Overload protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
Temperature limitation in the power DMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Electrical characteristics for the protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.1
6.2
6.3
6.4
6.5
6.5.1
6.5.2
6.6
7
Diagnostic functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.1
IS pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
Datasheet
3
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Table of contents
7.2
SENSE signal in different operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.3
SENSE signal in nominal current range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SENSE signal variation as a function of temperature and load current . . . . . . . . . . . . . . . . . . . . . .28
SENSE signal timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
SENSE signal in open load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Open load in ON diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30
Open load in OFF diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Open load diagnostic timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32
SENSE signal in short circuit to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
SENSE signal in case of overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SENSE signal in case of inverse current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Electrical characteristics diagnostic function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7.3.1
7.3.2
7.3.3
7.3.3.1
7.3.3.2
7.3.3.3
7.3.4
7.3.5
7.3.6
7.4
8
Input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Input circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
DEN / DSEL0, 1 pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
Input pin voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
8.1
8.2
8.3
8.4
9
Characterization results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
General product characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Power stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Protection functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Diagnostic mechanism . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
Input pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1
9.2
9.3
9.4
9.5
10
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
10.1
Further application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
11
Package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Datasheet
4
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Description
1
Description
The BTT6200-4ESA is a 200 mΩ quad channel Smart High-Side Power Switch, embedded in a PG-TSDSO-24
package, providing protective functions and diagnosis.
The power transistor is built by an N-channel vertical power MOSFET with charge pump. The device is
integrated in Smart6 HV technology. It is specially designed to drive lamps up to R10 W 24 V or R5 W 12 V, as well
as LEDs in the harsh automotive environment.
Datasheet
5
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Block diagram reference
2
Block diagram reference
Channel 0
VS
voltage sensor
internal
power
supply
over
temperature
T
clamp for
inductive load
gate control
&
charge pump
IN0
driver
logic
over current
switch limit
DEN
ESD
protection
load current sense and
OUT 0
open load detection
IS
forward voltage drop detection
VS
Channel 1
T
IN1
Control and protection circuit equivalent to channel 0
DSEL0
DSEL1
OUT 1
Channel 2
T
Control and protection circuit equivalent to channel 0
IN2
OUT 2
Channel 3
T
Control and protection circuit equivalent to channel 0
IN3
OUT 3
GND
Block diagram DxS.vsd
Figure 2
Block diagram for BTT6200-4ESA
Datasheet
6
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Pin configuration
3
Pin configuration
3.1
Pin assignment
NC
IN0
NC
GND
IN1
DEN
IS
DSEL0
IN2
IN3
DSEL1
NC
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
OUT0
NC
NC
NC
OUT1
NC
NC
OUT2
NC
NC
NC
OUT3
9
10
11
12
PG-TSDSO-24-21_Pinout.vsd
Figure 3
Pin configuration
3.2
Pin definitions and functions
Table 2
Pin
Pin definitions and functions
Symbol
Function
1, 3, 12, 14, 15, 16,
18, 19 , 21, 22, 23
NC
Not Connected; No internal connection to the chip
2
4
5
6
IN0
INput channel 0; Input signal for channel 0 activation
GrouND; Ground connection
GND
IN1
INput channel 1; Input signal for channel 1 activation
DEN
Diagnostic ENable; Digital signal to enable/disable the diagnosis of
the device
7
8
IS
Sense; Sense current of the selected channel
DSEL0
Diagnostic SELection; Digital signal to select the channel to be
diagnosed
9
IN2
INput channel 2; Input signal for channel 2 activation
INput channel 3; Input signal for channel 3 activation
10
11
IN3
DSEL1
Diagnostic SELection; Digital signal to select the channel to be
diagnosed
13
17
20
OUT3
OUT2
OUT1
OUTput 3; Protected high side power output channel 3
OUTput 2; Protected high side power output channel 2
OUTput 1; Protected high side power output channel 1
Datasheet
7
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Pin configuration
Table 2
Pin definitions and functions (continued)
Pin
Symbol
OUT0
VS
Function
24
OUTput 0; Protected high side power output channel 0
Voltage Supply; Battery voltage
Cooling tab
3.3
Voltage and current definition
Figure 4 shows all terms used in this data sheet, with associated convention for positive values.
VDS3
VDS1
VDS2
VDS0
I S
VS
VS
IIN0
IN0
IN1
IOUT0
VIN0
OUT0
OUT1
OUT2
OUT3
IIN1
VIN1
IIN2
IOUT1
IN2
IN3
DEN
VIN2
IIN3
IDEN
VIN3
IOUT2
VDEN
IDSEL0
DSEL0
DSEL1
IDSEL1
IIS
VDSEL0
IOUT3
VDSEL1
IS
VIS
GND
VOUT0
VOUT2
VOUT1
VOUT3
IGND
voltage and current convention.vsd
Figure 4
Voltage and current definition
Datasheet
8
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Electrical characteristics and parameters
4
Electrical characteristics and parameters
4.1
Absolute maximum ratings
Table 3
Absolute maximum ratings1)
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Number
Min.
Max.
Supply voltages
Supply voltage
VS
-0.3
–
48
V
V
–
P_4.1.1
P_4.1.2
Reverse polarity voltage
-VS(REV)
0
–
28
t < 2 min
TA = 25°C
RL ≥ 47 Ω
ZGND = Diode
+27 Ω
Supply voltage for short
circuit protection
VBAT(SC)
0
–
36
V
RSupply = 10 mΩ
LSupply = 5 µH
RECU= 20 mΩ
RCable= 16 mΩ/m
LCable= 1 µH/m,
l = 0 or 5 m
P_4.1.3
See Chapter 6 and
Figure 29
Supply voltage for Load dump VS(LD)
protection
–
–
–
–
–
65
V
2) RI = 2 Ω
RL = 47 Ω
P_4.1.12
P_4.1.4
Short circuit capability
3)
Permanent short circuit
IN pin toggles
nRSC1
100
k cycles
V
_
Input pins
Voltage at INPUT pins
VIN
-0.3
–
6
7
–
P_4.1.13
t < 2 min
Current through INPUT pins
Voltage at DEN pin
IIN
-2
–
–
2
mA
V
–
P_4.1.14
P_4.1.15
VDEN
-0.3
–
6
7
–
t < 2 min
Current through DEN pin
IDEN
-2
–
2
mA
–
P_4.1.16
1
Not subject to production test. Specified by design.
VS(LD) is setup without the DUT connected to the generator per ISO 7637-1.
Threshold limit for short circuit failures: 100 ppm. Please refer to the legal disclaimer for short-circuit
capability at the end of this document.
2
3
Datasheet
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BTT6200-4ESA
Electrical characteristics and parameters
Table 3
Absolute maximum ratings1) (continued)
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit
Note or Test
Condition
Number
Min.
-0.3
–
Max.
Voltage at DSEL pin
VDSEL
IDSEL
–
6
7
V
–
P_4.1.17
P_4.1.18
t < 2 min
Current through DSEL pin
Sense pin
-2
–
2
mA
–
Voltage at IS pin
VIS
IIS
-0.3
-25
–
–
VS
V
–
–
P_4.1.19
P_4.1.20
Current through IS pin
50
mA
Power stage
Load current
| IL |
–
–
–
–
IL(LIM)
A
–
P_4.1.21
P_4.1.22
Power dissipation (DC)
PTOT
1.8
W
TA = 85°C
TJ < 150°C
Maximum energy dissipation EAS
Single pulse (one channel)
–
–
–
20
65
mJ
IL(0) = 1 A
TJ(0) = 150°C
VS = 28 V
P_4.1.23
Voltage at power transistor
Currents
VDS
–
–
V
–
P_4.1.26
P_4.1.27
Current through ground pin
I GND
-20
-150
20
20
mA
–
t < 2 min
Temperatures
Junction temperature
Storage temperature
ESD susceptibility
ESD susceptibility (all pins)
TJ
-40
-55
–
–
150
150
°C
°C
–
–
P_4.1.28
P_4.1.30
TSTG
VESD
-2
-4
–
–
2
4
kV
kV
4) HBM
4) HBM
P_4.1.31
P_4.1.32
ESD susceptibility OUT pin vs. VESD
GND and VS connected
ESD susceptibility
VESD
VESD
-500
-750
–
–
500
750
V
V
5) CDM
5) CDM
P_4.1.33
P_4.1.34
ESD susceptibility pin
(corner pins)
Notes:
1.
Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
1
4
5
Not subject to production test. Specified by design.
ESD susceptibility Human Body Model "HBM" according to AEC Q100-002
ESD susceptibility Charged Device Model "CDM" according to AEC Q100-011
Datasheet
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Electrical characteristics and parameters
2.
Integrated protection functions are designed to prevent IC destruction under fault conditions described in
the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions
are not designed for continuous repetitive operation.
4.2
Functional range
Table 4
Functional range
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
28
Unit Note or Test
Condition
Number
Min.
Max.
36
Nominal operating voltage
Extended operating voltage
VNOM
8
5
V
V
–
7)
P_4.2.1
P_4.2.2
VS(OP)
–
48
V = 4.5 V
IN
RL = 47 Ω
VDS < 0.5 V
6)
Minimum functional supply
voltage
VS(OP)_MIN
3.8
4.3
3.5
5
V
V
V
= 4.5 V
P_4.2.3
IN
RL = 47 Ω
From IOUT = 0 A
to
VDS < 0.5 V; see
Figure 16
6)
Undervoltage shutdown
VS(UV)
3
4.1
V = 4.5 V
IN
P_4.2.4
VDEN = 0 V
RL = 47 Ω
From VDS < 1 V;
to IOUT = 0 A
See Chapter 9.1
and Figure 16
7)
Undervoltage shutdown
hysteresis
VS(UV)_HYS
IGND_1
–
–
850
2
–
4
mV
mA
–
P_4.2.13
P_4.2.5
Operating current
One channel active
VIN = 5.5 V
VDEN = 5.5 V
Device in RDS(ON)
VS = 36 V
See Chapter 9.1
7
Not subject to production test. Specified by design.
Test at TJ = -40°C only.
6
Datasheet
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Electrical characteristics and parameters
Table 4
Functional range (continued)
TJ = -40°C to 150°C; (unless otherwise specified)
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
Operating current
All channels active
IGND_4
–
–
–
–
6
9
mA
VIN = 5.5 V
P_4.2.6
VDEN = 5.5 V
Device in RDS(ON)
VS = 36 V
See Chapter 9.1
6) VS = 36 V
VOUT = 0 V
VIN floating
VDEN floating
TJ ≤ 85 °C
Standby current for whole
device with load (ambient)
IS(OFF)
0.1
0.5
20
–
µA
P_4.2.7
P_4.2.10
P_4.2.8
Maximum standby current for
whole device with load
IS(OFF)_150
–
µA
VS = 36 V
VOUT = 0 V
VIN floating
VDEN floating
TJ = 150 °C
7) VS = 36 V
VOUT = 0 V
Standby current for whole
device with load, diagnostic
active
IS(OFF_DEN)
0.6
mA
VIN floating
VDEN = 5.5 V
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal resistance
Table 5
Thermal resistance
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
8)
Junction to case
RthJC
RthJA
–
–
3
–
–
K/W
P_4.3.1
P_4.3.2
8)9)
Junction to ambient
All channels active
28
K/W
6
Test at TJ = -40°C only.
Not subject to production test. Specified by design.
Not subject to production test. Specified by design.
7
8
Datasheet
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Electrical characteristics and parameters
4.3.1
PCB set-up
70µm
35µm
1.5mm
0.3mm
PCB 2s2p.vsd
Figure 5
2s2p PCB cross section
Figure 6
PC board top and bottom view for thermal simulation with 600 mm2 cooling area
9
Specified Rthja value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board with 1
W power dissipation equally dissipated for all channel at TA = 105°C ; The product (chip + package) was
simulated on a 76.4 mm x 114.3 mm x 1.5 mm board with 2 inner copper layers (2 x 70 μm Cu, 2 x 35 μm
Cu). Where applicable, a thermal via array under the exposed pad contacts the first inner copper layer.
Please refer to Figure 5 .
Datasheet
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Electrical characteristics and parameters
4.3.2
Thermal impedance
BTT6200-4ESA
100
10
1
2s2p
1s0p - 600 mm²
1s0p - 300 mm²
1s0p - footprint
0,1
0,0001
0,001
0,01
0,1
1
10
100
1000
Time (s)
Figure 7
Typical thermal impedance. 2s2p PCB set-up according to Figure 5
BTT6200-4ESA
120
1s0p - Tambient = 105°C
110
100
90
80
70
60
50
40
30
0
100
200
300
400
500
600
Cooling area (mm²)
Figure 8
Typical thermal resistance. PCB set-up 1s0p
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Power stage
5
Power stage
The power stages are built using an N-channel vertical power MOSFET (DMOS) with charge pump.
5.1
Output ON-state resistance
The ON-state resistance RDS(ON) depends on the supply voltage as well as the junction temperature TJ. Figure 9
shows the dependencies in terms of temperature and supply voltage for the typical ON-state resistance. The
behavior in reverse polarity is described in Chapter 6.4.
Figure 9
Typical ON-state resistance
A high signal at the input pin (see Chapter 8) causes the power DMOS to switch ON with a dedicated slope,
which is optimized in terms of EMC emission.
5.2
Turn ON/OFF characteristics with resistive load
Figure 10 shows the typical timing when switching a resistive load.
IN
VIN_H
VIN_L
t
VOUT
dV/dt ON
dV/dt OFF
tON
90% VS
tOFF_delay
70% VS
30% VS
tON_delay
tOFF
10% VS
t
Switching times.vsd
Figure 10
Switching a resistive load timing
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Power stage
5.3
Inductive load
5.3.1
Output clamping
When switching OFF inductive loads with high side switches, the voltage VOUT drops below ground potential,
because the inductance intends to continue driving the current. To prevent the destruction of the device by
avalanche due to high voltages, there is a voltage clamp mechanism ZDS(AZ) implemented that limits negative
output voltage to a certain level (VS - VDS(AZ)). Please refer to Figure 11 and Figure 12 for details. Nevertheless,
the maximum allowed load inductance is limited.
VS
ZDS(AZ)
VDS
INx
LOGIC
IL
VBAT
GND
ZGND
OUTx
VOUT
VIN
L, RL
Output_clamp.vsd
Figure 11
Output clamp
IN
t
VOUT
VS
t
VS-VDS(AZ)
IL
t
Switching an inductance.vsd
Figure 12
Switching an inductive load timing
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Power stage
5.3.2
Maximum load inductance
During demagnetization of inductive loads, energy has to be dissipated in the BTT6200-4ESA. This energy can
be calculated with following equation:
V
− V
R
R ⋅ I
− V
L
R
L
S
DS AZ
L
L
L
E = VDS AZ
⋅
⋅
⋅ ln 1 −
+ IL
DS AZ
V
S
Equation 1
The following equation simplifies under the assumption of RL = 0 Ω.
VS
1
E = ⋅ L ⋅ I2 ⋅ 1 −
2
VS − VDS AZ
Equation 2
The energy, which is converted into heat, is limited by the thermal design of the component. See Figure 13 for
the maximum allowed energy dissipation as a function of the load current.
Figure 13
Maximum energy dissipation single pulse, TJ_START = 150°C; VS = 28 V
5.4
Inverse current capability
In case of inverse current, meaning a voltage VINV at the OUTput higher than the supply voltage VS, a current IINV
will flow from output to VS pin via the body diode of the power transistor (please refer to Figure 14). The output
stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that particular
case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current IINV should not
be higher than IL(INV). If the channel is OFF, the diagnostic will detect an open load at OFF. If the affected channel
is ON, the diagnostic will detect open load at ON (the overtemperature signal is inhibited). At the appearance of
VINV, a parasitic diagnostic can be observed. Aꢀer, the diagnosis is valid and reflects the output state. At VINV
vanishing, the diagnosis is valid and reflects the output state. During inverse current, no protection functions
are available.
Datasheet
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Power stage
VBAT
VS
Gate
driver
Device
logic
VINV
INV
Comp.
IL(INV)
OUT
GND
ZGND
inverse current.vsd
Figure 14
Inverse current circuitry
5.5
Electrical characteristics - power stage
Table 6
Electrical characteristics: Power stage
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
ON-state resistance per channel RDS(ON)_150 300
Max.
400
360
mΩ
IL = IL4 = 1 A
VIN = 4.5 V
P_5.5.1
TJ = 150°C
See Figure 9
ON-state resistance per channel RDS(ON)_25
–
–
200
1.5
–
–
mΩ
A
10)TJ = 25 °C
10) TA = 85°C
TJ < 150°C
P_5.5.21
P_5.5.2
Nominal load current One
channel active
IL(NOM)1
Nominal load current All
channels active
IL(NOM)2
–
–
1
–
A
P_5.5.3
P_5.5.4
Output voltage drop limitation at VDS(NL)
10
22
mV
IL = IL0 = 25 mA
small load currents
See Chapter 9.3
Drain to source clamping voltage VDS(AZ)
65
–
70
75
V
IDS = 5 mA
See Figure 12
See Chapter 9.1
11)
P_5.5.5
P_5.5.6
VDS(AZ) = [VS - VOUT
]
Output leakage current per
IL(OFF)
0.1
0.5
µA
V floating
IN
channel TJ ≤ 85 °C
VOUT = 0 V
TJ ≤ 85°C
10
Not subject to production test, specified by design.
Test at TJ = -40°C only
11
Datasheet
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Power stage
Table 6
Electrical characteristics: Power stage (continued)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
Output leakage current per
channel TJ = 150 °C
IL(OFF)_150
–
–
1
5
–
µA
VIN floating
VOUT = 0 V
TJ = 150°C
P_5.5.8
Inverse current capability
IL(INV)
1
A
10)VS< VOUTX See P_5.5.9
Figure 14
Slew rate
30% to 70% VS
dV/dtON
0.3
0.8
1.3
V/µs RL = 47 Ω
VS = 28 V
P_5.5.11
P_5.5.12
P_5.5.13
See Figure 10
Slew rate
70% to 30% VS
-dV/dtOFF
0.3
0.8
0
1.3
V/µs
See Chapter 9.1
Slew rate matching
ΔdV/dt
-0.15
0.15
V/µs
dV/dtON - dV/dtOFF
Turn-ON time to VOUT = 90% VS tON
Turn-OFF time to VOUT = 10% VS tOFF
20
70
70
0
150
150
50
µs
µs
µs
P_5.5.14
P_5.5.15
P_5.5.16
20
Turn-ON / OFF matching
ΔtSW
-50
tOFF - tON
Turn-ON time to VOUT = 10% VS tON_delay
Turn-OFF time to VOUT = 90% VS tOFF_delay
–
–
–
35
70
70
–
µs
µs
µJ
P_5.5.17
P_5.5.18
P_5.5.19
35
Switch ON energy
EON
190
10) RL = 47 Ω
VOUT = 90% VS
VS = 36 V
See Chapter 9.1
Switch OFF energy
EOFF
–
210
–
µJ
10) RL = 47 Ω
VOUT = 10% VS
VS = 36 V
P_5.5.20
See Chapter 9.1
10
Not subject to production test, specified by design.
Datasheet
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Protection functions
6
Protection functions
The device provides integrated protection functions. These functions are designed to prevent the destruction of
the IC from fault conditions described in the data sheet. Fault conditions are considered as “outside” normal
operating range. Protection functions are designed for neither continuous nor repetitive operation.
6.1
Loss of ground protection
In case of loss of the module ground and the load remains connected to ground, the device protects itself by
automatically turning OFF (when it was previously ON) or remains OFF, regardless of the voltage applied on IN
pins.
In case of loss of device ground, it’s recommended to use input resistors between the microcontroller and the
BTT6200-4ESA to ensure switching OFF of channels.
In case of loss of module or device ground, a current (IOUT(GND)) can flow out of the DMOS. Figure 15 sketches
the situation.
ZGND is recommended to be a resistor in series to a diode .
ZIS(AZ)
VS
ZD(AZ)
VBAT
ZDS(AZ)
IS
RSENSE
DSEL0
DSEL1
DEN
RDSEL
RDSEL
RDEN
LOGIC
INx
RIN
IOUT(GND)
OUTx
ZDESD
GND
RIS
IS
ZGND
Loss of ground protection.vsd
Figure 15
Loss of ground protection with external components
6.2
Undervoltage protection
Between VS(UV) and VS(OP), the undervoltage mechanism is triggered. VS(OP) represents the minimum voltage
where the switching ON and OFF can takes place. VS(UV) represents the minimum voltage the switch can hold
ON. If the supply voltage is below the undervoltage mechanism VS(UV), the device is OFF (turns OFF). As soon as
the supply voltage is above the undervoltage mechanism VS(OP), then the device can be switched ON. When the
switch is ON, protection functions are operational. Nevertheless, the diagnosis is not guaranteed until VS is in
the VNOM range. Figure 16 illustrates the undervoltage mechanism.
Datasheet
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Protection functions
VOUT
undervoltage behavior.vsd
VS
VS(UV)
VS(OP)
Figure 16
Undervoltage behavior
6.3
Overvoltage protection
There is an integrated clamp mechanism for overvoltage protection (ZD(AZ)). To guarantee this mechanism
operates properly in the application, the current in the Zener diode has to be limited by a ground resistor.
Figure 17 shows a typical application to withstand overvoltage issues. In case of supply voltage higher than
VS(AZ), the power transistor switches ON and in addition the voltage across the logic section is clamped. As a
result, the internal ground potential rises to VS - VS(AZ). Due to the ESD Zener diodes, the potential at pin INx,
DSELx, and DEN rises almost to that potential, depending on the impedance of the connected circuitry. In the
case the device was ON, prior to overvoltage, the BTT6200-4ESA remains ON. In the case the BTT6200-4ESA was
OFF, prior to overvoltage, the power transistor can be activated. In the case the supply voltage is in above
VBAT(SC) and below VDS(AZ), the output transistor is still operational and follows the input. If at least one channel
is in the ON state, parameters are no longer guaranteed and lifetime is reduced compared to the nominal supply
voltage range. This especially impacts the short circuit robustness, as well as the maximum energy EAS
capability. ZGND is recommended to be a resistor in series to a diode.
Datasheet
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Protection functions
ISOV
ZIS(AZ)
VS
ZD(AZ)
VBAT
ZDS(AZ)
IS
RSENSE
DSEL0
DSEL1
DEN
RDSEL
RDSEL
RDEN
LOGIC
INx
RIN
OUTx
ZDESD
GND
RIS
ZGND
Overvoltage protection.vsd
Figure 17
Overvoltage protection with external components
6.4
Reverse polarity protection
In case of reverse polarity, the intrinsic body diodes of the power DMOS causes power dissipation. The current
in this intrinsic body diode is limited by the load itself. Additionally, the current into the ground path and the
logic pins has to be limited to the maximum current described in Chapter 4.1 with an external resistor. Figure
18 shows a typical application. RGND resistor is used to limit the current in the Zener protection of the device.
Resistors RDSEL, RDEN, and RIN are used to limit the current in the logic of the device and in the ESD protection
stage. RSENSE is used to limit the current in the sense transistor which behaves as a diode. The recommended
value for RDEN = RDSEL = RIN = RSENSE = 10 kΩ. It is recommended to use a resistor in series to a diode in the
ground path.
During reverse polarity, no protection functions are available.
Datasheet
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Protection functions
Microcontroller
protection diodes
ZIS(AZ)
VS
ZD(AZ)
ZDS(AZ)
IS
RSENSE
VDS(REV)
DSEL0
DSEL1
RDSEL0
RDSEL1
RDEN
RIN
DEN
INx
LOGIC
-VS(REV)
OUTx
ZDESD
GND
IS
RGND
L,RL
RIS
D
Reverse Polarity.vsd
Figure 18
Reverse polarity protection with external components
6.5
Overload protection
In case of overload, such as high inrush of cold lamp filament, or short circuit to ground, the BTT6200-4ESA
offers several protection mechanisms.
6.5.1
Current limitation
At first step, the instantaneous power in the switch is maintained at a safe value by limiting the current to the
maximum current allowed in the switch IL(SC). During this time, the DMOS temperature increases, which affects
the current flowing in the DMOS.
6.5.2
Temperature limitation in the power DMOS
Each channel incorporates both an absolute (TJ(SC)) and a dynamic (TJ(SW)) temperature sensor. Activation of
either sensor will cause an overheated channel to switch OFF to prevent destruction. Any protective switch OFF
latches the output until the temperature has reached an acceptable value which is depicted in Figure 19.
No retry strategy is implemented such that when the DMOS temperature has cooled down enough, the switch is
switched ON again. Only the IN pin signal toggling can re-activate the power stage (latch behavior).
Datasheet
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Protection functions
IN
t
IL
LOAD CURRENT BELOW
LIMITATION PHASE
LOAD CURRENT LIMITATION PHASE
IL(x)SC
IL(NOM)
t
TDMOS
TJ(SC)
Temperature
protection phase
TJ(SW)
TA
tsIS(FAULT)
t
t
tsIS(OC_blank)
IIS
IIS(FAULT)
IL(NOM) / kILIS
0A
VDEN
tsIS(OFF)
0V
t
Hard start.vsd
Figure 19
Overload protection
Note:
For better understanding, the time scale is not linear. The real timing of this drawing is application
dependant and cannot be described.
Datasheet
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Protection functions
6.6
Electrical characteristics for the protection functions
Table 7
Electrical Characteristics: Protection
VS = 8 V to 36 V, TJ = -40°C to 150°C, (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Unit Note or Test
Condition
Number
Min.
Typ. Max.
Loss of ground
Output leakage current while
GND disconnected
IOUT(GND)
VDS(REV)
VS(AZ)
–
0.1
650
70
–
mA
mV
V
12)13)VS = 28 V
See Figure 15
P_6.6.1
P_6.6.2
P_6.6.3
Reverse polarity
Drain source diode voltage
during reverse polarity
200
65
700
75
14)IL = - 1 A
See Figure 18
Overvoltage
Overvoltage protection
ISOV = 5 mA
See Figure 17
Overload condition
15)
Load current limitation
IL5(SC)
9
–
11
80
14
–
A
K
V
= 5 V See
P_6.6.4
P_6.6.8
DS
Figure 19 and
Chapter 9.3
16)See Figure 19
Dynamic temperature increase ΔTJ(SW)
while switching
Thermal shutdown temperature TJ(SC)
150
–
170
30
200
–
°C
K
14)See Figure 19
13)
P_6.6.10
P_6.6.11
Thermal shutdown hysteresis
ΔTJ(SC)
12
All pins are disconnected except VS and OUT.
Not Subject to production test, specified by design.
Test at TJ = +150°C only.
Test at TJ = -40°C only.
Functional test only
13
14
15
16
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Diagnostic functions
7
Diagnostic functions
For diagnosis purposes, the BTT6200-4ESA provides a combination of digital and analog signals at pin IS. These
signals are called SENSE. In case the diagnostic is disabled via DEN, pin IS becomes high impedance. In case
DEN is activated, the sense current of the channel X is enabled/disabled via associated pins DSEL0 and DSEL1.
Table 8 gives the truth table.
Table 8
Diagnostic truth table
DEN
DSEL1
DSEL0
IS
Z
0
1
1
1
1
don't care
don't care
Z
Z
Z
0
0
1
1
0
1
0
1
IIS(0)
0
0
0
0
IIS(1)
0
0
0
0
IIS(2)
0
0
0
0
IIS(3)
7.1
IS pin
The BTT6200-4ESA provides a sense signal called IIS at pin IS. As long as no “hard” failure mode occurs (short
circuit to GND / current limitation / overtemperature / excessive dynamic temperature increase or open load at
OFF) a proportional signal to the load current (ratio kILIS = IL / IIS) is provided. The complete IS pin and diagnostic
mechanism is described in Figure 20. The accuracy of the sense current depends on temperature and load
current. The sense pin multiplexes the currents IIS(0), IIS(1), IIS(2) and IIS(3) via the pins DSEL0 and DSEL1. Thanks to
this multiplexing, the matching between kILISCHANNEL0, kILISCHANNEL1, kILISCHANNEL2 and kILISCHANNEL3 is optimized.
Due to the ESD protection, in connection to VS, it is not recommended to share the IS pin with other devices if
these devices are using another battery feed. The consequence is that the unsupplied device would be fed via
the IS pin of the supplied device.
VS
IIS3
IL3 / kILIS
=
IIS1
IL1 / kILIS
=
IIS0
IL0 / kILIS
=
IIS2
IL2 / kILIS
=
IIS(FAULT)
ZIS(AZ)
0
1
0
1
FAULT
1
0
IS
DEN
0
1
FAULT
DSEL1
Sense schematic.vsd
DSEL0
Figure 20
Diagnostic block diagram
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7.2
SENSE signal in different operating modes
Table 9 gives a quick reference for the state of the IS pin during device operation.
Table 9
Sense signal, function of operation mode
Operation mode Input level
channel x
DEN17)
Output level
Diagnostic
output
Normal operation OFF
H
Z
Z
Z
Short circuit to
GND
~GND
Overtemperature
Short circuit to VS
Open load
Z
Z
VS
IIS(FAULT)
Z
18)
< VOL(OFF)
18)
> VOL(OFF)
IIS(FAULT)
IIS(FAULT)
IIS = IL / kILIS
IIS(FAULT)
IIS(FAULT)
Inverse current
~VINV
~VS
Normal operation ON
Current limitation
<VS
Short circuit to
GND
~GND
Overtemperature
Z
IIS(FAULT)
TJ(SW) event
Short circuit to VS
Open load
VS
IIS < IL / kILIS
IIS < IIS(OL)
19)
~VS
20)
Inverse current
Underload
~VINV
IIS < IIS(OL)
21)
~VS
IIS(OL) < IIS < IL /
kILIS
Don't care
Don't care
L
Don't care
Z
17
The table doesn’t indicate but it is assumed that the appropriate channel is selected via the DSEL pins.
Stable with additional pull-up resistor.
18
19
20
21
The output current has to be smaller than IL(OL)
Aꢀer maximum tINV
The output current has to be higher than IL(OL)
.
.
.
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7.3
SENSE signal in nominal current range
Figure 21 shows the current sense as a function of the load current in the power DMOS. Usually, a pull-down
resistor RIS is connected to the current sense IS pin. This resistor has to be higher than 560 Ω to limit the power
losses in the sense circuitry. A typical value is 1.2 kΩ. The blue curve represents the ideal sense current,
assuming an ideal kILIS factor value. The red curves shows the accuracy the device provides across full
temperature range at a defined current.
Figure 21
Current sense for nominal load
7.3.1
SENSE signal variation as a function of temperature and load
current
In some applications a better accuracy is required at smaller currents. To achieve this accuracy requirement, a
calibration on the application is possible. To avoid multiple calibration points at different load and temperature
conditions, the BTT6200-4ESA allows limited derating of the kILIS value, at a given point (IL3; TJ = +25°C). This
derating is described by the parameter ΔkILIS. Figure 22 shows the behavior of the sense current, assuming one
calibration point at nominal load at +25°C.
The blue line indicates the ideal kILIS ratio.
The green lines indicate the derating on the parameter across temperature and voltage, assuming one
calibration point at nominal temperature and nominal battery voltage.
The red lines indicate the kILIS accuracy without calibration.
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Figure 22
Improved current sense accuracy with one calibration point at 0.2 A
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Diagnostic functions
7.3.2
SENSE signal timing
Figure 23 shows the timing during settling and disabling of the SENSE.
VINx
t
ILx
tONx
tOFFx
tONx
90% of
IL static
t
VDEN
t
IIS
tsIS(LC)
tsIS(chC)
tsIS(OFF)
tsIS(ON)
tsIS(ON_DEN)
90% of
IIS static
t
t
VDSEL
VINy
t
ILy
tONy
t
current sense settling disabling time.vsd
Figure 23
Current sense settling / disabling timing
7.3.3
SENSE signal in open load
7.3.3.1
Open load in ON diagnostic
If the channel is ON, a leakage current can still flow through an open load, for example due to humidity. The
parameter IL(OL) gives the threshold of recognition for this leakage current. If the current IL flowing out the
power DMOS is below this value, the device recognizes a failure, if the DEN (and DSEL) is selected. In that case,
the SENSE current is below IIS(OL). Otherwise, the minimum SENSE current is given above parameter IIS(OL)
.
Figure 24 shows the SENSE current behavior in this area. The red curve shows a typical product curve. The blue
curve shows the ideal current sense.
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IIS
IIS(OL)
IL
IL(OL)
Sense for OL.vsd
Figure 24
Current sense ratio for low currents
7.3.3.2
Open load in OFF diagnostic
For open load diagnosis in OFF-state, an external output pull-up resistor (ROL) is recommended. For the
calculation of pull-up resistor value, the leakage currents and the open load threshold voltage VOL(OFF) have to
be taken into account. Figure 25 gives a sketch of the situation. Ileakage defines the leakage current in the
complete system, including IL(OFF) (see Chapter 5.5) and external leakages, e.g, due to humidity, corrosion, etc...
in the application.
To reduce the stand-by current of the system, an open load resistor switch SOL is recommended. If the channel x
is OFF, the output is no longer pulled down by the load and VOUT voltage rises to nearly VS. This is recognized by
the device as an open load. The voltage threshold is given by VOL(OFF). In that case, the SENSE signal is switched
to the IIS(FAULT)
.
An additional RPD resistor can be used to pull VOUT to 0 V. Otherwise, the OUT pin is floating. This resistor can be
used as well for short circuit to battery detection, see Chapter 7.3.4
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Vbat
SOL
VS
IIS(FAULT)
OL
comp.
OUT
IS
ILOFF
Ileakage
GND
ZGND
VOL(OFF)
Open Load in OFF.vsd
Figure 25
Open load detection in OFF electrical equivalent circuit
7.3.3.3
Open load diagnostic timing
Figure 26 shows the timing during either Open Load in ON or OFF condition when the DEN pin is HIGH. Please
note that a delay tsIS(FAULT_OL_OFF) has to be respected aꢀer the falling edge of the input, when applying an open
load in OFF diagnosis request, otherwise the diagnosis can be wrong.
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Diagnostic functions
Load is present
Open load
VIN
VOUT
t
VS-VOL(OFF)
shutdown with load
RDS(ON) x IL
t
t
IOUT
tsIS(FAULT_OL_ON_OFF)
IIS
tsIS(LC)
t
Error Settling Disabling Time.vsd
Figure 26
Sense signal in open load timing
7.3.4
SENSE signal in short circuit to VS
In case of a short circuit between the OUTput-pin and the VS pin, all or portion (depending on the short circuit
impedance) of the load current will flow through the short circuit. As a result, a lower current compared to the
normal operation will flow through the DMOS of the BTT6200-4ESA, which can be recognized at the current
sense signal. The open load at OFF detection circuitry can also be used to distinguish a short circuit to VS. In
that case, an external resistor to ground RSC_VS is required. Figure 27 gives a sketch of the situation.
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Diagnostic functions
Vbat
VS
IIS(FAULT)
VBAT
OL
comp.
IS
OUT
GND
ZGND
VOL(OFF)
RSC_VS
RIS
Short circuit to Vs.vsd
Figure 27
Short circuit to battery detection in OFF electrical equivalent circuit
7.3.5
SENSE signal in case of overload
An overload condition is defined by a current flowing out of the DMOS reaching the current limitation and / or
the absolute dynamic temperature swing TJ(SW) is reached, and / or the junction temperature reaches the
thermal shutdown temperature TJ(SC). Please refer to Chapter 6.5 for details.
In that case, the SENSE signal given is by IIS(FAULT) when the diagnostic is selected.
The device has a thermal latch behavior, such that when the overtemperature or the exceed dynamic
temperature condition has disappeared, the DMOS is reactivated only when the IN is toggled LOW to HIGH. If
the DEN pin is activated, and DSEL pin is selected to the correct channel, the SENSE follows the output stage. If
no reset of the latch occurs, the device remains in the latching phase and IIS(FAULT) at the IS pin, even though the
DMOS is OFF.
7.3.6
SENSE signal in case of inverse current
In the case of inverse current, the sense signal of the affected channel will indicate open load in OFF state and
indicate open load in ON state. The unaffected channels indicate normal behavior as long as the IINV current
does not exceed the maximum value specified in Chapter 5.4.
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Diagnostic functions
7.4
Electrical characteristics diagnostic function
Table 10
Electrical characteristics: Diagnostics
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
Load condition threshold for diagnostic
22)
Open load detection threshold in VS - VOL(OFF)
OFF state
4
5
–
–
6
V
V
= 0 V
P_7.5.1
P_7.5.2
IN
VDEN = 4.5 V
See Figure 26
Open load detection threshold in IL(OL)
ON state
15
mA VIN = VDEN = 4.5 V
IIS(OL) = 33 μA
See Figure 24
See Chapter 9.4
Sense pin
22)
IS pin leakage current when
sense is disabled
IIS_(DIS)
–
1
0.02
–
1
µA
V
V
= 4.5 V
P_7.5.4
P_7.5.6
IN
VDEN = 0 V
IL = IL4 = A
Sense signal saturation voltage
VS- VIS
3.5
VIN = 0 V
(RANGE)
VOUT = VS > 10 V
VDEN = 4.5 V
IIS = 6 mA
See Chapter 9.4
Sense signal maximum current in IIS(FAULT)
fault condition
6
15
70
35
75
mA VIS = VIN = VDSEL = 0 V P_7.5.7
VOUT = VS > 10 V
VDEN = 4.5 V
See Figure 20
See Chapter 9.4
Sense pin maximum voltage VS
to IS
VIS(AZ)
65
V
IIS = 5 mA
P_7.5.3
See Figure 20
Current sense ratio signal in the nominal area, stable load current condition
22
DSEL pin select channel 0 only.
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Table 10
Electrical characteristics: Diagnostics (continued)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
Current sense ratio
IL0 = 10 mA
kILIS0
kILIS1
kILIS2
kILIS3
kILIS4
ΔkILIS
-50% 330
-40% 300
-15% 300
-11% 300
+50%
VIN = 4.5 V
VDEN = 4.5 V
See Figure 21
TJ = -40°C; 150°C
P_7.5.8
P_7.5.9
P_7.5.10
P_7.5.11
P_7.5.12
Current sense ratio
IL1 = 0.05 A
+40%
+15%
+11%
+9%
+8
Current sense ratio
IL2 = 0.2 A
Current sense ratio
IL3 = 0.5 A
Current sense ratio
IL4 = 1 A
-9%
-8
300
0
23)
kILIS derating with current and
%
k
versus kILIS2 P_7.5.17
ILIS3
temperature
See Figure 22
Diagnostic timing in normal condition
23)
Current sense settling time to
kILIS function stable aꢀer positive
input slope on both INput and
DEN
tsIS(ON)
–
–
150
µs
V
= VIN = 0 to
P_7.5.18
DEN
4.5 V
VS = 28 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 0.5 A
See Figure 23
22)
Current sense settling time with tsIS(ON_DEN)
load current stable and transition
of the DEN
–
–
–
–
10
15
µs
µs
V
= 0 to 4.5 V
P_7.5.19
P_7.5.20
DEN
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 0.5 A
See Figure 23
22)
Current sense settling time to IIS tsIS(LC)
stable aꢀer positive input slope
on current load
V
= 4.5 V
DEN
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL2 = 0.2 A to
IL = L3
I = 0.5 A
See Figure 23
Diagnostic timing in open load condition
23
Not subject to production test, specified by design. Current sense settling time to
DSEL pin select channel 0 only.
22
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Diagnostic functions
Table 10
Electrical characteristics: Diagnostics (continued)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
–
Unit Note or Test
Condition
Number
Min.
Max.
50
22)
Current sense settling time to IIS tsIS(FAULT_OL
stable for open load detection in
OFF state
–
–
µs
V
= 0 to 4.5 V
P_7.5.22
DEN
_OFF)
RIS = 1.2 kΩ
CSENSE < 100 pF
VOUT = VS = 28 V
23)
Current sense settling time to IIS tsIS(FAULT_OL
150
–
µs
V
= 4.5 to 0 V
P_7.5.23
IN
stable for open load detection in
ON-OFF transition
_ON_OFF)
VDEN = 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VOUT = VS = 28 V See
Figure 26
Diagnostic timing in overload condition
24)25)26)
Current sense settling time to IIS tsIS(FAULT)
–
–
150
µs
V = VDEN = 0 P_7.5.24
IN
stable for overload detection
to 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VDS = 5 V
See Figure 19
Current sense over current
blanking time
tsIS(OC_blank
)
–
–
350
–
µs
µs
VIN = VDEN = 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
VDS = 5 V to 0 V
See Figure 19
P_7.5.32
P_7.5.25
Diagnostic disable time
DEN transition to
IIS < 50% IL /kILIS
tsIS(OFF)
–
20
VIN = 4.5 V
VDEN = 4.5 V to 0 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL = IL3 = 0.5 A
See Figure 23
22
DSEL pin select channel 0 only.
Not subject to production test, specified by design. Current sense settling time to
DSEL pin select channel 0 only.
Test at TJ = -40°C only.
Functional Test only.
23
24
25
26
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Table 10
Electrical characteristics: Diagnostics (continued)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28 V, TJ = 25°C
Parameter
Symbol
Values
Typ.
–
Unit Note or Test
Condition
Number
Min.
Max.
20
Current sense settling time from tsIS(ChC)
one channel to another
–
µs
VIN0 = VIN1 = 4.5 V
VDEN = 4.5 V
P_7.5.26
VDSEL = 0 to 4.5 V
RIS = 1.2 kΩ
CSENSE < 100 pF
IL(OUT0) = IL3 = 0.5 A
IL(OUT1) = L2
I = 0.2 A
See Figure 23
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Input pins
8
Input pins
8.1
Input circuitry
The input circuitry is compatible with 3.3 V and 5 V microcontrollers. The concept of the input pin is to react to
voltage thresholds. An implemented Schmitt trigger avoids any undefined state if the voltage on the input pin is
slowly increasing or decreasing. The output is either OFF or ON but cannot be in a linear or undefined state. The
input circuitry is compatible with PWM applications. Figure 28 shows the electrical equivalent input circuitry. In
case the pin is not needed, it must be leꢀ opened, or must be connected to device ground (and not module
ground) via a 10 kΩ input resistor.
IN
GND
Input circuitry.vsd
Figure 28
Input pin circuitry
8.2
DEN / DSEL0, 1 pin
The DEN / DSEL0, 1 pins enable and disable the diagnostic functionality of the device. The pins have the same
structure as the INput pins, please refer to Figure 28.
8.3
Input pin voltage
The IN, DSEL and DEN use a comparator with hysteresis. The switching ON / OFF takes place in a defined region,
set by the thresholds VIN(L) Max. and VIN(H) Min. The exact value where the ON and OFF take place are unknown
and depends on the process, as well as the temperature. To avoid cross talk and parasitic turn ON and OFF, a
hysteresis is implemented. This ensures a certain immunity to noise.
8.4
Electrical characteristics
Table 11
Electrical characteristics: Input pins
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
INput pins characteristics
Low level input voltage range
VIN(L)
-0.3
–
0.8
V
V
See Chapter 9.5 P_8.4.1
See Chapter 9.5 P_8.4.2
High level input voltage range VIN(H)
2
–
6
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Input pins
Table 11
Electrical characteristics: Input pins (continued)
VS = 8 V to 36 V, TJ = -40°C to 150°C (unless otherwise specified).
Typical values are given at VS = 28V, TJ = 25°C
Parameter
Symbol
Values
Typ.
Unit Note or Test
Condition
Number
Min.
Max.
Input voltage hysteresis
VIN(HYS)
–
250
–
mV
27) See Chapter
9.5
P_8.4.3
Low level input current
High level input current
IIN(L)
IIN(H)
1
2
10
10
25
25
µA
µA
VIN = 0.8 V
P_8.4.4
P_8.4.5
VIN = 5.5 V
See Chapter 9.5
DEN Pin
Low level input voltage range
VDEN(L)
-0.3
2
–
0.8
6
V
–
P_8.4.6
P_8.4.7
P_8.4.8
P_8.4.9
P_8.4.10
High level input voltage range VDEN(H)
–
V
–
27)
Input voltage hysteresis
Low level input current
High level input current
DSEL Pins
VDEN(HYS)
IDEN(L)
–
250
10
10
–
mV
µA
µA
1
25
25
VDEN = 0.8 V
VDEN = 5.5 V
IDEN(H)
2
Low level input voltage range
VDSEL(L)
-0.3
2
–
0.8
6
V
–
P_8.4.11
P_8.4.12
P_8.4.13
P_8.4.14
P_8.4.15
High level input voltage range VDSEL(H)
–
V
–
27)
Input voltage hysteresis
Low level input current
High level input current
VDSEL(HYS)
IDSEL(L)
–
250
10
10
–
mV
µA
µA
1
25
25
VDSEL = 0.8 V
VDSEL = 5.5 V
IDSEL(H)
2
27
Not subject to production test, specified by design.
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Characterization results
9
Characterization results
The characterization has been performed on 3 lots, with 3 devices each. Characterization has been performed at
8 V, 28 V and 36 V overtemperature range.
9.1
General product characteristics
P_4.2.3
P_4.2.4
Minimum functional supply voltage VS(OP)_MIN = f(TJ) Undervoltage threshold VS(UV) = f(TJ)
5.000
4.900
4.800
4.700
4.600
4.500
4.000
3.900
3.800
3.700
3.600
3.500
[V]
[V]
3.400
3.300
3.200
3.100
3.000
4.400
4.300
4.200
4.100
4.000
8V
8V
28V
36V
28V
36V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
P_4.2.6
P_4.2.7, P_4.2.10
Current consumption for whole device with load -
all channels active IGND_2 = f(TJ; VS)
Standby current for whole device with load IS(OFF)
f(TJ; VS)
=
7.000
6.000
5.000
4.000
4.000
3.500
3.000
2.500
2.000
[µA]
[mA]
3.000
1.500
2.000
1.000
8V
8V
1.000
0.500
0.000
28V
36V
28V
36V
0.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
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Characterization results
9.2
Power stage
P_5.5.4
P_5.5.5
Output voltage drop limitation at low load current: Drain to source clamp voltage VDS(AZ)= f(TJ)
VDS(NL) = f(TJ) and VDS(NL) = f(VS)
12.000
11.500
11.000
10.500
10.000
9.500
75.000
74.000
73.000
72.000
71.000
70.000
[V]
[mV]
69.000
68.000
67.000
66.000
65.000
9.000
8.500
8.000
7.500
7.000
8V
8V
28V
36V
28V
36V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
P_5.5.11
P_5.5.12
Slew rate at turn ON dV / dtON = f(TJ; VS) = RL= 47 Ω
Slew rate at turn OFF-dV / dtOFF = f(TJ; VS) = RL= 47 Ω
1.000
0.900
0.800
0.700
0.600
1.000
0.900
0.800
0.700
0.600
0.500
[V/µs]
0.500
[V/µs]
0.400
0.400
0.300
0.300
0.200
0.200
8V
8V
28V
28V
0.100
0.100
36V
36V
0.000
0.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Datasheet
42
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Characterization results
P_5.5.14
P_5.5.15
Turn ONtON = f(TJ; VS) = RL= 47 Ω
Turn OFF tOFF = f(TJ; VS) = RL= 47 Ω
80.000
90.000
80.000
70.000
60.000
50.000
70.000
60.000
50.000
40.000
[µs]
40.000
[ms]
30.000
20.000
10.000
0.000
30.000
20.000
10.000
0.000
8V
8V
28V
36V
28V
36V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
P_5.5.19
P_5.5.20
Switch ON energy EON = f(TJ; VS) = RL= 47 Ω
Switch OFF energy EOFF = f(TJ; VS) = RL= 47 Ω
2.50E-04
3.00E-04
2.50E-04
2.00E-04
2.00E-04
1.50E-04
1.50E-04
[µJ]
[µJ]
1.00E-04
1.00E-04
5.00E-05
5.00E-05
0.00E+00
8V
8V
28V
36V
28V
36V
0.00E+00
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Datasheet
43
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Characterization results
9.3
Protection functions
P_6.6.4
Overload condition in the low voltage area IL5(SC)
=
f(TJ; VS)
12.000
10.000
8.000
6.000
[A]
4.000
2.000
0.000
8V
28V
36V
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Datasheet
44
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Characterization results
9.4
Diagnostic mechanism
P_7.5.2
Current sense at no loadIIS = f(TJ; VS)IL= 0
Open load detection ON state threshold IL(OL)= f(TJ)
1.400
11.000
10.500
10.000
9.500
1.200
1.000
0.800
9.000
[mA]
[µA]
0.600
8.500
0.400
0.200
0.000
8.000
8V
8V
7.500
7.000
28V
36V
28V
36V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
P_7.5.3
P_7.5.7
Sense signal at maximum voltageVIS(AZ) = f(TJ; VS)
Sense signal maximum current in fault condition
IIS(FAULT)= f(TJ;VS)
75.000
74.000
73.000
72.000
71.000
20.000
18.000
16.000
14.000
12.000
10.000
70.000
[V]
[mA]
8.000
6.000
69.000
68.000
4.000
67.000
8V
8V
28V
28V
2.000
66.000
36V
36V
0.000
65.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Datasheet
45
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Characterization results
9.5
Input pins
P_8.4.1
P_8.4.2
Input voltage threshold VIN(L) = f(TJ;VS)
Input voltage threshold VIN(H) = f(TJ;VS)
1.340
1.320
1.300
1.280
1.260
1.240
1.530
1.520
1.510
1.500
1.490
[V]
[V]
1.220
1.480
1.470
1.200
1.180
1.160
1.140
1.120
8V
8V
1.460
1.450
28V
36V
28V
36V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
P_8.4.3
P_8.4.5
Input voltage hysteresis VIN(HYS) = f(TJ;VS)
Input current high level IIN(H) = f(TJ;VS)
350.000
16.000
14.000
12.000
10.000
300.000
250.000
200.000
8.000
[µA]
[mV]
150.000
6.000
4.000
2.000
0.000
100.000
8V
8V
50.000
28V
36V
28V
36V
0.000
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Temperature [°C]
Temperature [°C]
Datasheet
46
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Application information
10
Application information
Note:
The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device.
VBAT
Voltage Regulator
OUT
VS
GND
T1
Z
CVDD
CVS
VDD
VS
RDEN
I/O
DEN
OUT0
OUT1
COUT
Relay
I/O
I/O
RDSEL
DSEL0
DSEL1
86
85
30
87
RDSEL
COUT
RIN
RIN
RIN
RIN
I/O
I/O
I/O
I/O
IN0
IN1
IN2
IN3
Micro
controller
+
-
OUT2
OUT3
COUT
E.C.U.
OT3
OUT4
COUT
RSENSE
IS
A/D
GND
LED
R5W
GND
CSENSE
D
Page-1
Figure 29
Application diagram with BTT6200-4ESA
Note:
This is a very simplified example of an application circuit. The function must be verified in the real
application.
Table 12
Bill of material
Reference
Value
Purpose
RIN
10 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Guarantee BTT6200-4ESA channels OFF during loss of ground
RDSEL
RDEN
10 kΩ
10 kΩ
Protection of the microcontroller during overvoltage, reverse polarity
Protection of the microcontroller during overvoltage, reverse polarity
Datasheet
47
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Application information
Table 12
Bill of material (continued)
Reference
Value
Purpose
RPD
47 kΩ
Polarization of the output for short circuit to VS detection. Improve
BTT6200-4ESA immunity to electromagnetic noise
ROL
1.5 kΩ
1.2 kΩ
10 kΩ
Polarization of the output during open load in OFF detection
Sense resistor
RIS
RSENSE
Overvoltage, reverse polarity, loss of ground. Value to be tuned with
microcontroller specification.
CSENSE
COUT
RLED
RGND
D
100 pF
10 nF
680 Ω
27 Ω
Sense signal filtering
Protection of the device during ESD and BCI
Overvoltage protection of the LED. Value to be tuned with LED specification
Protection of the BTT6200-4ESA during overvoltage
Protection of the BTT6200-4ESA during reverse polarity
Protection of the device during overvoltage
BAS21
Z
58 V Zener
diode
CVS
T1
100 nF
Filtering of voltage spikes at the battery line
Dual NPN/PNP Switch the battery voltage for open load in OFF diagnostic
10.1
Further application information
•
•
•
Please contact us to get the pin FMEA
Existing App. Notes
For further information you may visit www.infineon.com
Datasheet
48
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Package outlines
11
Package outlines
1)
8.65±0.1
1)
3.9±0.1
D
0.1
0.1
2x
2x
0.67±0.25
6±0.2
C
0.08 C
24x
SEATING COPLANARITY
PLANE
0.2 D
24x
2)
0.25±0.05
0.25
A
A-B C
24x
BOTTOM VIEW
D
0.15
24
13
13
24
1
12
12
1
INDEX
MARKING
6.4±0.1
B
0.15
A-B
0.65
1) DOES NOT INCLUDE PLASTIC OR METAL PROTRUSION OF 0.15 MAX. PER SIDE
2) DAMBAR PROTUSION SHALL BE MAXIMUM 0.1MM TOTAL IN EXCESS OF LEAD WIDTH
ALL DIMENSIONS ARE IN UNITS MM
THE DRAWING IS IN COMPLIANCE WITH ISO 128 & PROJECTION METHOD 1 [
]
Figure 30
PG-TSDSO-24 (Plastic dual small outline package)(RoHS-compliant)
Green product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-
free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Legal disclaimer for short-circuit capability
Infineon disclaims any warranties and liablilities, whether expressed or implied, for any short-circuit failures
below the threshold limit.
Datasheet
49
Rev. 1.00
2019-03-09
™
PROFET + 24V
BTT6200-4ESA
Revision history
Revision history
Document
version
Date of
release
Description of changes
1.00
2019-03-09
Datasheet created
Datasheet
50
Rev. 1.00
2019-03-09
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
Edition 2019-03-09
Published by
IMPORTANT NOTICE
WARNINGS
The information given in this document shall in no
event be regarded as a guarantee of conditions or
characteristics (“Beschaffenheitsgarantie”) .
With respect to any examples, hints or any typical values
stated herein and/or any information regarding the
application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities of
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Document reference
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