BTS728L2T [INFINEON]
Buffer/Inverter Based Peripheral Driver, 6A, MOS, PDSO20, PLASTIC, SO-20;
| 型号： | BTS728L2T |
| 厂家： | 
Infineon |
| 描述： | Buffer/Inverter Based Peripheral Driver, 6A, MOS, PDSO20, PLASTIC, SO-20 驱动 光电二极管 接口集成电路 |
| 文件： | 总14页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
PROFET BTS 728 L2
Smart High-Side Power Switch
Two Channels: 2 x 60mΩ
Status Feedback
Product Summary
Package
Operating Voltage
Vbb(on)
4.75...41V
two parallel
P-DSO-20-9
Active channels one
On-state Resistance
Nominal load current
Current limitation
RON
60mΩ
30mΩ
6.0A
17A
IL(NOM)
4.0A
17A
IL(SCr)
General Description
•
N channel vertical power MOSFET with charge pump, ground referenced CMOS compatible input and
diagnostic feedback, monolithically integrated in Smart SIPMOS technology.
Providing embedded protective functions
•
Applications
•
•
•
•
µC compatible high-side power switch with diagnostic feedback for 5V, 12V and 24V grounded loads
All types of resistive, inductive and capacitve loads
Most suitable for loads with high inrush currents, so as lamps
Replaces electromechanical relays, fuses and discrete circuits
Basic Functions
•
•
•
•
•
•
•
Very low standby current
CMOS compatible input
Improved electromagnetic compatibility (EMC)
Fast demagnetization of inductive loads
Stable behaviour at undervoltage
Wide operating voltage range
Logic ground independent from load ground
Block Diagram
Protection Functions
•
•
•
•
•
Short circuit protection
Vbb
Overload protection
Current limitation
Thermal shutdown
IN1
Logic
Channel
1
Overvoltage protection (including load dump) with external
resistor
ST1
OUT 1
Load 1
OUT 2
Load 2
•
•
•
Reverse battery protection with external resistor
Loss of ground and loss of Vbb protection
Electrostatic discharge protection (ESD)
IN2
Logic
Channel
2
ST2
Diagnostic Function
PROFET
•
•
•
Diagnostic feedback with open drain output
Open load detection in ON-state
GND
Feedback of thermal shutdown in ON-state
Semiconductor Group
1 of 14
2003-Oct-01
BTS 728 L2
Functional diagram
overvoltage
protection
current limit
gate
control
+
VBB
charge
pump
internal
clamp for
logic
inductive load
OUT1
LOAD
temperature
sensor
IN1
ESD
Open load
detection
ST1
GND1
Channel 1
IN2
ST2
Control and protection circuit
of
channel 2
GND2
OUT2
PROFET
Pin configuration
Pin Definitions and Functions
(top view)
Pin
Symbol Function
1,10,
11,12,
15,16,
19,20
3
V
Positive power supply voltage. Design the
wiring for the simultaneous max. short circuit
currents from channel 1 to 2 and also for low
thermal resistance
Input 1,2, activates channel 1,2 in case of
logic high signal
Output 1,2, protected high-side power output
of channel 1,2. Design the wiring for the max.
short circuit current
Diagnostic feedback 1,2 of channel 1,2,
open drain, low on failure
V
1 •
2
3
4
5
6
7
8
9
20 V
19 V
18 OUT1
17 OUT1
bb
bb
bb
GND1
IN1
ST1
N.C.
GND2
IN2
bb
IN1
IN2
OUT1
OUT2
16 V
bb
7
15 V
bb
17,18
13,14
14 OUT2
13 OUT2
ST2
N.C.
12 V
bb
4
8
ST1
ST2
V
10
11 V
bb
bb
2
6
5,9
GND1
GND2
N.C.
Ground 1 of chip 1 (channel 1)
Ground 2 of chip 2 (channel 2)
Not Connected
Semiconductor Group
2
2003-Oct-01
BTS 728 L2
Maximum Ratings at Tj = 25°C unless otherwise specified
Parameter
Symbol
Values
Unit
Supply voltage (overvoltage protection see page 4)
Vbb
Vbb
43
24
V
Supply voltage for full short circuit protection
Tj,start =-40 ...+150°C
V
Load current (Short-circuit current, see page 5)
IL
self-limited
60
A
V
3)
Load dump protection1) VLoadDump = VA + Vs, VA = 13.5 V VLoaddump
RI2) = 2 Ω, td = 200 ms; IN= low or high,
each channel loaded with RL = 8.0 Ω,
Operating temperature range
Storage temperature range
Power dissipation (DC)4)
(all channels active)
Tj
Tstg
-40 ...+150
-55 ...+150
°C
W
Ta = 25°C: Ptot
Ta = 85°C:
3.7
1.9
Maximal switchable inductance, single pulse
Vbb =12V, Tj,start =150°C4),
19.9
22.3
mH
kV
IL = 4.0 A, EAS = 220 mJ, 0Ω
IL = 6.0 A, EAS = 540 mJ, 0Ω
see diagrams on page 9
one channel: ZL
two parallel channels:
Electrostatic discharge capability (ESD)
(Human Body Model)
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5kΩ; C=100pF
IN:
VESD
1.0
4.0
8.0
ST:
Input voltage (DC)
VIN
IIN
IST
-10 ... +16
±2.0
V
mA
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
±5.0
Thermal Characteristics
Parameter and Conditions
Symbol
Values
typ
Unit
min
Max
Thermal resistance
junction - soldering point4),5)
junction - ambient4)
each channel: Rthjs
K/W
--
--
--
-- 13.5
Rthja
one channel active:
all channels active:
41
34
--
--
1)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω
resistor for the GND connection is recommended.
2)
3)
4)
R = internal resistance of the load dump test pulse generator
I
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for V
bb
connection. PCB is vertical without blown air. See page 14
5)
Soldering point: upper side of solder edge of device pin 15. See page 14
Semiconductor Group
3
2003-Oct-01
BTS 728 L2
Electrical Characteristics
Parameter and Conditions, each of the two channels
Symbol
Values
Unit
mΩ
A
at Tj = -40...+150°C, V = 12 V unless otherwise specified
bb
min
--
typ
Max
Load Switching Capabilities and Characteristics
On-state resistance (V to OUT); I = 2 A, V ≥ 7V
L
bb
bb
each channel,
Tj = 25°C: RON
Tj = 150°C:
50
100
60
120
two parallel channels, Tj = 25°C:
see diagram, page 10
25
30
--
Nominal load current
one channel active: IL(NOM)
two parallel channels active:
3.6
5.5
4.0
6.0
6)
Device on PCB , T = 85°C, T ≤ 150°C
a
j
Output current while GND disconnected or pulled up7);
IL(GNDhigh)
--
--
2
mA
V
= 30 V, V = 0, see diagram page 8
IN
bb
Turn-on time8)
Turn-off time
RL = 12 Ω
IN
IN
to 90% VOUT: ton
to 10% VOUT: toff
30
30
100
100
200
200
µs
Slew rate on8)
10 to 30% VOUT, RL = 12 Ω
Tj = -40°C: dV/dton
Tj = 25°C...150°C:
0.15
0.15
--
--
1 V/µs
0.8
Slew rate off8)
70 to 40% VOUT, RL = 12 Ω
Tj = -40°C: -dV/dtoff
Tj = 25°C...150°C:
0.15
0.15
--
--
1 V/µs
0.8
Operating Parameters
Operating voltage
Tj=-40 Vbb(on)
Tj=25...150°C:
Tj =-40°C: Vbb(AZ)
Tj =25...150°C:
4.75
--
--
41
43
V
V
Overvoltage protection9)
41
43
--
47
--
52
Ibb = 40 mA
Standby current10
)
Tj =-40°C...25°C: Ibb(off)
Tj =150°C:
--
--
10
--
18
50
µA
µA
VIN = 0; see diagram page 10
Leakage output current (included in Ibb(off)
VIN = 0
)
IL(off)
--
1
10
Operating current 11), VIN = 5V,
IGND
--
--
0.8
1.6
1.5
3.0
mA
IGND = IGND1 + IGND2
,
one channel on:
two channels on:
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for V
connection. PCB is vertical without blown air. See page 14
not subject to production test, specified by design
See timing diagram on page 11.
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150Ω
6)
bb
7)
8)
9)
resistor for the GND connection is recommended). See also V
in table of protection functions and
ON(CL)
circuit diagram on page 8.
Measured with load; for the whole device; all channels off
10)
11)
Add I , if I > 0
ST
ST
Semiconductor Group
4
2003-Oct-01
BTS 728 L2
Parameter and Conditions, each of the two channels
Symbol
Values
Unit
at Tj = -40...+150°C, V = 12 V unless otherwise specified
bb
min
typ
Max
Protection Functions12)
Current limit, (see timing diagrams, page 12)
Tj =-40°C: IL(lim)
Tj =25°C:
Tj =+150°C:
21
17
12
28
22
16
36
31
24
A
A
Repetitive short circuit current limit,
Tj = Tjt
each channel IL(SCr)
two parallel channels
--
--
17
17
--
--
(see timing diagrams, page 12)
Initial short circuit shutdown time
Tj,start =25°C: toff(SC)
--
2.4
--
ms
V
(see timing diagrams on page 12)
Output clamp (inductive load switch off)13)
at V
ON(CL)
= V - V
bb OUT
, I = 40 mA
Tj =-40°C: VON(CL)
Tj =25°C...150°C:
41
43
--
47
--
--
52
--
L
Thermal overload trip temperature
Thermal hysteresis
Tjt
150
--
°C
K
∆Tjt
10
--
Reverse Battery
Reverse battery voltage 14)
-Vbb
--
--
--
32
--
V
Drain-source diode voltage (V > V
)
-VON
600
mV
out
bb
IL =-4.0A, Tj =+150°C
12)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
13)
14)
If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest
V
ON(CL)
Requires a 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Power dissipation is higher compared to normal operating
conditions due to the voltage drop across the drain-source diode. The temperature protection is not active
during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and
circuit page 8).
Semiconductor Group
5
2003-Oct-01
BTS 728 L2
Parameter and Conditions, each of the two channels
Symbol
Values
Unit
at Tj = -40...+150°C, V = 12 V unless otherwise specified
bb
min
typ
Max
Diagnostic Characteristics
Open load detection current, (on-condition)
10
--
500
6
mA
each channel I L (OL)
1
Input and Status Feedback15)
Input resistance
(see circuit page 8)
RI
2.5
3.5
kΩ
Input turn-on threshold voltage
Input turn-off threshold voltage
Input threshold hysteresis
VIN(T+)
VIN(T-)
1.7
1.5
--
--
--
3.2
--
V
V
∆ VIN(T)
0.5
--
--
V
Off state input current
On state input current
VIN = 0.4 V: IIN(off)
VIN = 5 V: IIN(on)
1
50
90
900
µA
µA
µs
20
100
50
520
Delay time for status with open load after switch
off; (see diagram on page 13)
td(ST OL4)
Status invalid after positive input slope
(open load)
td(ST)
--
--
500
µs
Status output (open drain)
Zener limit voltage
ST low voltage
IST = +1.6 mA: VST(high)
IST = +1.6 mA: VST(low)
5.4
--
6.1
--
--
0.4
V
15)
If ground resistors R
are used, add the voltage drop across these resistors.
GND
Semiconductor Group
6
2003-Oct-01
BTS 728 L2
Truth Table
Channel 1
Input 1 Output 1
Input 2 Output 2
Status 1
Status 2
BTS 728L2
Channel 2
level
level
Normal
operation
Open load
L
H
L
H
L
L
H
Z
H
L
L
H
H
H
L
H
L
Overtem-
perature
H
L = "Low" Level
H = "High" Level
X = don't care
Z = high impedance, potential depends on external circuit
Status signal valid after the time delay shown in the timing diagrams
Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel. The
status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor.
Terms
I
bb
V
Leadframe
Leadframe
bb
I
I
IN2
IN1
V
V
bb
bb
IN1
ST1
R
IN2
ST2
R
3
4
7
8
I
I
V
V
ON2
L1
17,18
L2
13,14
ON1
OUT1
OUT2
PROFET
Chip 1
PROFET
Chip 2
I
I
ST2
ST1
V
V
V
GND1
V
GND2
ST1
ST2
IN1
IN2
2
6
I
I
V
V
OUT2
GND1
GND2
OUT1
GND1
GND2
Leadframe (V ) is connected to pin 1,10,11,12,15,16,19,20
bb
External R
optional; two resistors R
, R
GND1
=150 Ω or a single resistor R =75 Ω for reverse
GND
GND
GND2
battery protection up to the max. operating voltage.
Semiconductor Group
7
2003-Oct-01
BTS 728 L2
Input circuit (ESD protection), IN1 or IN2
Overvolt. and reverse batt. protection
+ 5V
+ V
bb
R
I
R
IN
ST
V
Z2
R
I
IN
ESD-ZDI
I
I
Logic
ST
OUT
R
GND
ST
V
Z1
PRO FET
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
GND
R
Load
R
GND
Signal GND
Load GND
Status output, ST1 or ST2
V
Z1
= 6.1 V typ., V = 47 V typ., R
= 150 Ω,
GND
Z2
R
= 15 kΩ, R = 3.5 kΩ typ.
+5V
ST
I
In case of reverse battery the load current has to be
limited by the load. Temperature protection is not
active
R
ST(ON)
ST
Open-load detection OUT1 or OUT2
ESD-
ZD
ON-state diagnostic
GND
Open load, if V < R ·I
; IN high
ON
ON L(OL)
ESD-Zener diode: 6.1 V typ., max 5.0 mA; R
ST(ON)
at 1.6 mA. The use of ESD zener diodes as voltage clamp at
DC conditions is not recommended.
< 375 Ω
+ V
bb
VON
ON
Inductive and overvoltage output clamp,
OUT1 or OUT2
OUT
+V
bb
Open load
detection
Logic
unit
V
Z
V
ON
OUT
GND disconnect
Power GND
V
bb
IN
V
ON
clamped to V = 47 V typ.
ON(CL)
OUT
PROFET
ST
GND
V
V
V
V
bb
IN
ST
GND
Any kind of load. In case of IN=high is V
OUT
≈ V -V .
IN IN(T+)
Due to V
> 0, no V = low signal available.
ST
GND
Semiconductor Group
8
2003-Oct-01
BTS 728 L2
GND disconnect with GND pull up
Inductive load switch-off energy
dissipation
E
bb
V
bb
IN
E
AS
E
E
OUT
Load
L
PROFET
V
bb
IN
ST
GND
OUT
PROFET
L
=
ST
V
V
V
GND
V
IN ST
GND
bb
Z
L
{
E
R
R
Any kind of load. If V
> V - V
IN IN(T+)
device stays off
L
GND
Due to V
> 0, no V = low signal available.
ST
GND
Energy stored in load inductance:
2
L
1
V
disconnect with energized inductive
E = / ·L·I
bb
L
2
load
While demagnetizing load inductance, the energy
dissipated in PROFET is
E
= Ebb + EL - ER= VON(CL)·i (t) dt,
AS
L
V
high
bb
IN
with an approximate solution for R > 0Ω:
L
OUT
PROFET
I ·L
L
2·R
I ·R
L L
OUT(CL)
E
AS
=
(V +|V
|) ln (1+
OUT(CL)
)
bb
|V
|
ST
L
GND
Maximum allowable load inductance for
a single switch off (one channel)
V
bb
4)
L = f (I ); T
= 150°C, V = 12 V, R = 0 Ω
L
j,start
bb
L
For inductive load currents up to the limits defined by ZL
(max. ratings and diagram on page 9) each switch is
protected against loss of V
Z [mH]
L
.
bb
1000
100
10
Consider at your PCB layout that in the case of Vbb dis-
connection with energized inductive load all the load current
flows through the GND connection.
1
2
3
4
5
6
7
8
9
10 11 12
I
[A]
L
Semiconductor Group
9
2003-Oct-01
BTS 728 L2
Typ. on-state resistance
Typ. standby current
R
= f (V ,T ); I = 2 A, IN = high
L
ON
bb j
I
= f (T ); V = 9...34 V, IN1,2 = low
bb
bb(off)
j
R
[mOhm]
ON
I
[µA]
bb(off)
45
40
35
30
25
20
15
10
5
125
100
75
50
25
0
Tj = 150°C
25°C
-40°C
0
-50
0
50
100
150
200
3
5
7
9
30
40
V
bb
[V]
T [°C]
j
Semiconductor Group
10
2003-Oct-01
BTS 728 L2
Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and
channel 2
Figure 1a: V turn on:
bb
IN1
Figure 2b: Switching a lamp:
IN2
IN
V
bb
ST
V
OUT1
V
V
OUT2
OUT
ST1 open drain
ST2 open drain
I
L
t
t
The initial peak current should be limited by the lamp and not by the
current limit of the device.
Figure 2a: Switching a resistive load,
turn-on/off time and slew rate definition:
Figure 2c: Switching an inductive load
IN
IN
VOUT
90%
ST
t
dV/dtoff
on
t
dV/dton
V
off
OUT
10%
IL
I
L
I
L(OL)
t
t
Semiconductor Group
11
2003-Oct-01
BTS 728 L2
*) if the time constant of load is too large, open-load-status may
occur
Figure 4a: Overtemperature:
Figure 3a: Turn on into short circuit:
shut down by overtemperature, restart by cooling
Reset if T <T
j
jt
IN1
IN
other channel: normal operation
ST
I
L1
I
L(lim)
V
OUT
I
L(SCr)
T
t
J
off(SC)
ST
t
t
Heating up of the chip may require several milliseconds, depending
on external conditions
Figure 5a: Open load: detection in ON-state, open
load occurs in on-state
Figure 3b: Turn on into short circuit:
shut down by overtemperature, restart by cooling
(two parallel switched channels 1 and 2)
IN
IN1/2
t
t
d(ST OL)
d(ST OL)
I
+ I
ST
V
L1 L2
2xI
L(lim)
OUT
I
L(SCr)
normal
normal
open
I
L
t
off(SC)
ST1/2
t
t
td(ST OL) = 10 µs typ.
ST1 and ST2 have to be configured as a 'Wired OR' function
ST1/2 with a single pull-up resistor.
Semiconductor Group
12
2003-Oct-01
BTS 728 L2
Figure 5b: Open load: turn on/off to open load
IN
d(STOL4)
ST
I
L
Semiconductor Group
13
2003-Oct-01
BTS 728 L2
Package and Ordering Code
Published by
Standard: P-DSO-20-9
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
Sales Code
BTS 728 L2
Ordering Code
Q67060-S7014-A2
© Infineon Technologies AG 2001
All Rights Reserved.
All dimensions in millimetres
Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives worldwide
(see address list).
Warnings
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Definition of soldering point with temperature T :
upper side of solder edge of device pin 15.
s
Infineon Technologies Components may only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system, or
to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.
Pin 15
Printed circuit board (FR4, 1.5mm thick, one layer
70µm, 6cm2 active heatsink area) as a reference for
max. power dissipation P , nominal load current
tot
I
and thermal resistance R
L(NOM)
thja
Semiconductor Group
14
2003-Oct-01
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