BTS612N1E3128ANTMA1 [INFINEON]
Buffer/Inverter Based Peripheral Driver, 7.5A, MOS, PSSO6, TO-220AB, 7 PIN;
| 型号： | BTS612N1E3128ANTMA1 |
| 厂家： | 
Infineon |
| 描述： | Buffer/Inverter Based Peripheral Driver, 7.5A, MOS, PSSO6, TO-220AB, 7 PIN 驱动 接口集成电路 |
| 文件： | 总15页 (文件大小：308K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
PROFET
BTS612N1
Smart Two Channel Highside Power Switch
Features
•
•
•
•
•
•
•
•
Product Summary
Overvoltage protection Vbb(AZ)
Overload protection
Current limitation
Short circuit protection
Thermal shutdown
Overvoltage protection (including load dump)
Fast demagnetization of inductive loads
43
V
V
5.0 ... 34 V
both
parallel
Operating voltage
bb(on)
channels: each
On-state resistance RON
Load current (ISO) IL(ISO)
200
2.3
4
100
4.4
4
mΩ
A
1
)
Reverse battery protection
Undervoltage and overvoltage shutdown with
auto-restart and hysteresis
Current limitation
IL(SCr)
A
•
•
•
•
•
Open drain diagnostic output
Open load detection in OFF-state
CMOS compatible input
Loss of ground and loss of V protection
Electrostatic discharge (ESD) protection
TO-220AB/7
bb
7
7
7
1
1
Application
1
Straight leads
SMD
Standard
•
µC compatible power switch with diagnostic
feedback for 12 V and 24 V DC grounded loads
All types of resistive, inductive and capacitve loads
•
•
Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions.
+ V
bb
4
Current
limit 1
Gate 1
Voltage
source
Overvoltage
protection
protection
V
Logic
OUT1
Limit for
Level shifter
Rectifier 1
Voltage
sensor
unclamped
ind. loads 1
1
7
Temperature
sensor 1
3
6
IN1
IN2
Charge
pump 1
Open load
Short to Vbb
detection 1
Logic
ESD
Charge
pump 2
5
Gate 2
protection
ST
Current
limit 2
OUT2
Level shifter
Rectifier 2
Limit for
unclamped
ind. loads 2
Load
Temperature
sensor 2
Open load
Short to Vbb
detection 2
GND
PROFET
2
Signal GND
Load GND
1)
With external current limit (e.g. resistor R =150 Ω) in GND connection, resistor in series with ST
GND
connection, reverse load current limited by connected load.
Semiconductor Group
1 of 15
2003-Oct-01
BTS612N1
Pin
1
Symbol
OUT1 (Load, L)
GND
Function
Output 1, protected high-side power output of channel 1
Logic ground
2
3
IN1
Input 1, activates channel 1 in case of logical high signal
4
V
Positive power supply voltage,
the tab is shorted to this pin
bb
Diagnostic feedback: open drain, low on failure
5
6
7
ST
IN2
Input 2, activates channel 2 in case of logical high signal
Output 2, protected high-side power output of channel 2
OUT2 (Load, L)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Symbol
Values
Unit
V
Supply voltage (overvoltage protection see page 4)
Vbb
Vbb
43
34
Supply voltage for full short circuit protection
Tj Start=-40 ...+150°C
V
4)
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V VLoad dump
60
V
RI3)= 2 Ω, RL= 5.3 Ω, td= 200 ms, IN= low or high
Load current (Short circuit current, see page 5)
Operating temperature range
Storage temperature range
IL
self-limited
-40 ...+150
-55 ...+150
A
Tj
Tstg
Ptot
°C
Power dissipation (DC), TC ≤ 25 °C
36
W
Inductive load switch-off energy dissipation, single pulse
Vbb =12V, Tj,start =150°C, TC =150°C const.
one channel, IL = 2.3 A, ZL = 89mH, 0 Ω: EAS
290
580
mJ
both channels parallel, IL = 4.4 A, ZL = 47mH, 0 Ω:
see diagrams on page 9
Electrostatic discharge capability (ESD)
(Human Body Model)
IN: VESD
all other pins:
1.0
2.0
kV
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
Input voltage (DC)
VIN
IIN
IST
-10 ... +16
±2.0
V
mA
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagrams page 7
±5.0
2)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 Ω resistor in the GND connection and a 15 kΩ resistor in series with the status pin. A resistor for the
protection of the input is integrated.
3)
4)
R = internal resistance of the load dump test pulse generator
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
I
Semiconductor Group
2
2003-Oct-01
BTS612N1
Thermal Characteristics
Parameter and Conditions
Symbol
Values
Unit
min
typ
max
K/W
Thermal resistance
chip - case, both channels: RthJC
--
--
--
--
--
--
3.5
7.0
75
each channel:
junction - ambient (free air):
SMD version, device on PCB5):
R
thJA
37
Electrical Characteristics
Parameter and Conditions, each channel
Symbol
Values
Unit
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
--
typ
max
Load Switching Capabilities and Characteristics
On-state resistance (pin 4 to 1 or 7)
RON
IL = 1.8 A
T=25 °C:
j
160
200
400
mΩ
each channel
T=150 °C:
j
320
2.3
4.4
Nominal load current, ISO Norm (pin 4 to 1 or 7)
VON = 0.5 V, T = 85 °C each channel: IL(ISO)
both channels parallel:
1.8
3.5
--
--
A
C
Output current (pin 1 or 7) while GND disconnected
IL(GNDhigh)
--
--
10
mA
or GND pulled up, V =30 V, V = 0, see diagram
bb
IN
page 8
Turn-on time
Turn-off time
IN
IN
to 90% VOUT: ton
to 10% VOUT: toff
80
80
200
200
400
400
µs
RL = 12 Ω, T =-40...+150°C
j
Slew rate on
10 to 30% VOUT, RL = 12 Ω, T =-40...+150°C
dV /dton
-dV/dtoff
0.1
0.1
--
--
1 V/µs
1 V/µs
j
Slew rate off
70 to 40% VOUT, RL = 12 Ω, T =-40...+150°C
j
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for V
connection. PCB is vertical without blown air.
5)
bb
Semiconductor Group
3
2003-Oct-01
BTS612N1
Unit
Parameter and Conditions, each channel
Symbol
Values
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
typ
max
Operating Parameters
Operating voltage6)
Undervoltage shutdown
Undervoltage restart
T =-40...+150°C: Vbb(on)
5.0
3.5
--
--
--
--
34
V
V
V
j
T =-40...+150°C: Vbb(under)
j
5.0
T =-40...+25°C: Vbb(u rst)
5.0
7.0
j
T =+150°C:
j
Undervoltage restart of charge pump
see diagram page 12
Vbb(ucp)
--
--
5.6
0.2
7.0
V
V
Undervoltage hysteresis
∆Vbb(under) = Vbb(u rst) - Vbb(under)
∆Vbb(under)
--
Overvoltage shutdown
Overvoltage restart
Overvoltage hysteresis
Overvoltage protection7)
Ibb=40 mA
T =-40...+150°C: Vbb(over)
34
33
--
--
--
43
--
V
V
V
V
j
T =-40...+150°C: Vbb(o rst)
j
T =-40...+150°C: ∆Vbb(over)
j
0.5
47
--
T =-40...+150°C: Vbb(AZ)
j
42
--
Standby current (pin 4),
VIN=0
Operating current (Pin 2)8), VIN=5 V
both channels on, Tj =-40...+150°C,
Operating current (Pin 2)8)
Ibb(off)
µA
--
--
90
150
1.2
Tj=-40...+150°C:
IGND
IGND
0.6
mA
mA
--
0.4
0.7
one channel on, Tj =-40...+150°C:,
6)
At supply voltage increase up to V = 5.6 V typ without charge pump, V
≈V - 2 V
bb
bb
OUT
7)
8)
See also V
in table of protection functions and circuit diagram page 8.
ON(CL)
Add I , if I > 0, add I , if V >5.5 V
ST
ST
IN
IN
Semiconductor Group
4
2003-Oct-01
BTS612N1
Unit
Parameter and Conditions, each channel
Symbol
Values
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
typ
max
Protection Functions9)
Initial peak short circuit current limit (pin 4 to 1
or 7)
IL(SCp)
Tj =-40°C:
5.5
4.5
2.5
9.5
7.5
4.5
13
11
7
A
A
Tj =25°C:
Tj =+150°C:
Repetitive short circuit shutdown current limit
IL(SCr)
Tj = Tjt (see timing diagrams, page 11)
--
4
--
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL)
IL= 40 mA: VON(CL)
41
150
--
47
--
53
--
V
°C
K
Thermal overload trip temperature
Tjt
Thermal hysteresis
Reverse battery (pin 4 to 2) 10)
∆Tjt
-Vbb
10
--
--
--
32
V
Reverse battery voltage drop (V > V
)
out
bb
IL = -1.9 A, each channel
T=150 °C: -VON(rev)
j
--
mV
610
--
Diagnostic Characteristics
Open load detection current
IL(off)
--
2
30
3
--
4
µA
(included in standby current I
)
bb(off)
Open load detection voltage
Tj=-40..150°C: VOUT(OL)
V
9)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 8).
10)
Semiconductor Group
5
2003-Oct-01
BTS612N1
Unit
Parameter and Conditions, each channel
Symbol
Values
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
2.5
typ
max
Input and Status Feedback11)
Input resistance
Tj=-40..150°C, see circuit page 7
RI
3.5
6
kΩ
Input turn-on threshold voltage
Input turn-off threshold voltage
Input threshold hysteresis
Tj =-40..+150VIN(T+)
Tj =-40..+150° VIN(T-)
∆ VIN(T)
1.7
1.5
--
--
--
3.5
--
V
V
0.5
--
--
V
Off state input current (pin 3 or 6), VIN = 0.4 V,
Tj =-40..+150°C
IIN(off)
1
50
µA
On state input current (pin 3 or 6), VIN = 3.5 V,
Tj =-40..+150°C
IIN(on)
20
--
50
90
--
µA
µs
Delay time for status with open load
after Input neg. slope (see diagram page 12)
td(ST OL3)
220
Status output (open drain)
Zener limit voltage T =-40...+150°C, IST = +1.6 mA: VST(high)
5.4
--
--
6.1
--
--
--
0.4
0.6
V
j
ST low voltage
T =-40...+25°C, IST = +1.6 mA: VST(low)
j
T = +150°C, IST = +1.6 mA:
j
11)
If a ground resistor R
is used, add the voltage drop across this resistor.
GND
Semiconductor Group
6
2003-Oct-01
BTS612N1
Truth Table
IN1
IN2
OUT1
OUT2
ST
ST
BTS611L1 BTS612N1
Normal operation
Open load
L
L
H
H
L
L
H
L
H
L
H
L
L
L
H
H
Z
Z
H
L
H
L
H
L
H
H
H
H
H
H
H
H
L
12)
Channel 1
H(L
)
)
H
X
H
X
H
H
H
L
12)
Channel 2
Channel 1
L
H
X
L
L
H
L
L
H
L
H
X
L
H
X
H
H
H
Z
Z
H
L
H
X
H(L
L
H
H
L
H
H
H
L
13)
Short circuit to V
Overtemperature
bb
L
H
14)
13)
H(L
)
)
Channel 2
L
H
X
L
X
H
L
H
X
X
X
L
L
H
L
H
X
X
X
L
H
X
L
H
X
L
L
L
L
L
X
X
L
H
H
H
L
L
L
X
X
L
L
L
L
L
H
H
H
L
L
H
L
H
14)
H(L
both channel
H
L
L
H
L
H
L
Channel 1
Channel 2
H
L
H
Undervoltage/ Overvoltage
H
L = "Low" Level
H = "High" Level
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 12)
Terms
Input circuit (ESD protection)
I
R
V
bb
ON1
V
I
4
V
bb
I
IN
ON2
IN1
V
3
bb
I
IN1
IN2
ST
L1
1
7
OUT1
OUT2
I
IN2
ESD-ZDI
PROFET
I
I
6
5
L2
V
I
I
ST
V
V
GND
2
GND
IN2
IN1
V
ST
OUT1
V
I
OUT2
GND
R
GND
ESD zener diodes are not to be used as voltage clamp
at DC conditions. Operation in this mode may result in
a drift of the zener voltage (increase of up to 1 V).
12)
13)
With additional external pull up resistor
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
Low resistance to Vbb may be detected in the ON-state by the no-load-detection
14)
Semiconductor Group
7
2003-Oct-01
BTS612N1
Status output
Open-load detection
+5V
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
RST(ON)
ST
ESD-
ZD
OFF
GND
I
L(OL)
ESD-Zener diode: 6.1 V typ., max 5 mA;
< 380 Ω at 1.6 mA, ESD zener diodes are not
to be used as voltage clamp at DC conditions.
Operation in this mode may result in a drift of the zener
voltage (increase of up to 1 V).
R
ST(ON)
Open load
detection
Logic
unit
V
OUT
Signal GND
Inductive and overvoltage output clamp
GND disconnect
+ V
bb
V
Z
I
bb
V
4
bb
V
3
bb
IN1
VON
1
7
OUT1
OUT2
PROFET
IN2
ST
6
5
OUT
GND
PROFET
GND
2
V
V
V
V
IN1 IN2
GND
ST
V
ON
clamped to 47 V typ.
Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+)
.
Due to VGND >0, no VST = low signal available.
Overvolt. and reverse batt. protection
+ V
bb
GND disconnect with GND pull up
V
4
Z2
R
I
IN1
V
3
6
bb
IN2
IN1
IN2
ST
1
7
OUT1
OUT2
V
Logic
IN1
PROFET
ST
R
ST
V
IN2
V
GND
2
Z1
5
GND
R
GND
V
V
GND
ST
V
bb
Signal GND
V
Z1
= 6.1 V typ., V = 47 V typ., R = 3.5 kΩ typ,
Z2 I
Any kind of load. If VGND > VIN - VIN(T+) device stays off
R
= 150 Ω
GND
Due to VGND >0, no VST = low signal available.
Semiconductor Group
8
2003-Oct-01
BTS612N1
with an approximate solution for RL > 0Ω:
V
load
disconnect with energized inductive
bb
IL·L
2·RL
IL·RL
|VOUT(CL)|
E =
AS
·(Vbb +|VOUT(CL)|)· ln (1+
)
Maximum allowable load inductance for
4
a single switch off (both channels parallel)
L = f (IL ); Tj,start = 150°C,TC = 150°C const.,
Vbb = 12 V, RL = 0 Ω
V
3
bb
IN1
IN2
ST
1
7
OUT1
OUT2
high
PROFET
6
5
L [mH]
1000
GND
2
V
bb
Normal load current can be handled by the PROFET
itself.
100
10
1
V
disconnect with charged external
bb
inductive load
4
V
3
bb
IN1
1
7
OUT1
OUT2
high
PROFET
IN2
6
D
ST
5
GND
2
V
bb
2
3
4
5
6
7
8
[A]
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
I
L
Inductive Load switch-off energy
dissipation
E
bb
E
AS
E
E
Load
L
V
bb
IN
OUT
PROFET
=
ST
GND
L
Z
{
R
L
L
E
R
Energy stored in load inductance:
2
L
1
E = / ·L·I
L
2
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)·iL(t) dt,
Semiconductor Group
9
2003-Oct-01
BTS612N1
Typ. transient thermal impedance chip case
Z
thJC = f(tp), one Channel active
Z
thJC [K/W]
10
1
0.1
D=
0.5
0.2
0.1
0.05
0.02
0.01
0
0.01
1E-5 1E-4 1E-3 1E-2 1E-1 1E0
1E1
t
[s]
p
Transient thermal impedance chip case
ZthJC = f(tp), both Channel active
Z
thJC [K/W]
10
1
0.1
D=
0.5
0.2
0.1
0.05
0.02
0.01
0
0.01
1E-5 1E-4 1E-3 1E-2 1E-1 1E0
1E1
t
[s]
p
Semiconductor Group
10
2003-Oct-01
BTS612N1
Both channels are symmetric and consequently the diagrams
are valid for each channel as well as for permuted channels
Timing diagrams
Figure 1a: V turn on:
Figure 2b: Switching an inductive load
bb
IN1
IN2
IN
V
bb
ST
V
OUT1
V
OUT
V
OUT2
I
L
ST open drain
t
t
Figure 2a: Switching a lamp:
Figure 3a: Short circuit
shut down by overtempertature, reset by cooling
IN
other channel: normal operation
IN
ST
I
L
V
OUT
I
L(SCp)
I
L(SCr)
I
L
t
ST
t
Semiconductor Group
11
2003-Oct-01
BTS612N1
td(ST,OL3) depends on external circuitry because of high
impedance
*) IL = 30 µA typ
Heating up may require several milliseconds, depending on
external conditions
Figure 4a: Overtemperature:
Figure 6a: Undervoltage:
Reset if T <T
j
jt
IN
IN
V
bb
ST
V
V
bb(u cp)
bb(under)
V
bb(u rst)
V
OUT
V
OUT
T
J
ST open drain
t
t
Figure 6b: Undervoltage restart of charge pump
Figure 5a: Open load: detection in OFF-state, turn
on/off to open load
V
ON(CL)
V
on
IN1
IN2
channel 2: normal operation
V
V
OUT1
bb(over)
V
V
bb(o rst)
bb(u rst)
I
L1
V
channel 1: open load
bb(u cp)
V
bb(under)
t
V
t
bb
d(ST OL3)
d(ST OL3)
ST
charge pump starts at Vbb(ucp) =5.6 V typ.
t
Semiconductor Group
12
2003-Oct-01
BTS612N1
Figure 7a: Overvoltage:
IN
V
V
V
V
ON(CL)
bb(over)
bb(o rst)
bb
V
OUT
ST
t
Semiconductor Group
13
2003-Oct-01
BTS612N1
SMD TO 220AB/7, Opt. E3128 Ordering code
Package and Ordering Code
BTS612N1 E3128A T&R:
Q67060-S6303-A4
All dimensions in mm
Standard TO-220AB/7
Ordering code
BTS612N1
Q67060-S6303-A2
Changed since 04.96
Date Change
Dec
td(ST OL4) max reduced from 1500
1996 to 800µs, typical from 400 to
320µs, min limit unchanged
TO 220AB/7, Opt. E3230 Ordering code
EAS maximum rating and diagram
BTS612N1 E3230
Q67060-S6303-A3
and ZthJC diagram added
ESD capability increased
Typ. reverse battery voltage drop -
V
ON(rev) added
Semiconductor Group
14
2003-Oct-01
BTS612N1
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.
Attention please!
The information herein is given to describe certain
components and shall not be considered as a guarantee of
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not
limited to warranties of non-infringement, regarding circuits,
descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and
conditions and prices please contact your nearest Infineon
Technologies Office in Germany or our Infineon
Technologies Representatives worldwide (see address list).
Warnings
Due to technical requirements components may contain
dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies
Office.
Infineon Technologies Components may only be used in life-
support devices or systems with the express written
approval of Infineon Technologies, if a failure of such
components can reasonably be expected to cause the
failure of that life-support device or system, or to affect the
safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to
assume that the health of the user or other persons may be
endangered.
Semiconductor Group
15
2003-Oct-01
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INFINEON
BTS6143DXT
Buffer/Inverter Based Peripheral Driver, 8A, MOS, PSSO4, GREEN, PLASTIC, TO-252, DPAK-5
INFINEON
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