BTS3125EJ [INFINEON]
BTS3125EJ 是一款 125mΩ 智能单通道低边电源开关，采用 PG-TDSO8-31 封装，提供嵌入式保护功能。功率晶体管由 N 通道垂直功率 MOSFET 构成。该设备是单片集成的。BTS3125EJ 符合汽车标准，针对 12 V 汽车应用进行了优化。;
| 型号： | BTS3125EJ |
| 厂家： | 
Infineon |
| 描述： | BTS3125EJ 是一款 125mΩ 智能单通道低边电源开关，采用 PG-TDSO8-31 封装，提供嵌入式保护功能。功率晶体管由 N 通道垂直功率 MOSFET 构成。该设备是单片集成的。BTS3125EJ 符合汽车标准，针对 12 V 汽车应用进行了优化。 开关 电源开关 晶体管 |
| 文件： | 总45页 (文件大小：1344K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HITFET - BTS3125EJ
Smart Low-Side Power Switch
1
Overview
Basic Features
•
•
•
•
•
•
•
Single channel device
Very low output leakage current in OFF state
Electrostatic discharge protection (ESD)
Embedded protection functions (see below)
ELV compliant package
Green Product (RoHS compliant)
AEC Qualified
Applications
•
•
Suitable for resistive, inductive and capacitive loads
Replaces electromechanical relays, fuses and discrete circuits
Description
The BTS3125EJ is a 125 mΩ single channel Smart Low-Side Power Switch with in a PG-TDSO8-31 package
providing embedded protective functions. The power transistor is built by an N-channel vertical power
MOSFET.
The device is monolithically integrated. The BTS3125EJ is automotive qualified and is optimized for 12 V
automotive applications.
Type
Package
Marking
BTS3125EJ
PG-TDSO8-31
S3125EJ
Table 1
Product Summary
Operating voltage range
Maximum load voltage
Maximum input voltage
VOUT
0 .. 31 V
40 V
VBAT(LD)
VIN
5.5 V
250 mΩ
2 A
Maximum On-State resistance at TJ = 150°C,VIN = 5 V
Nominal load current
RDS(ON)
IL(NOM)
IL(LIM)
IL(OFF)
Minimum current limitation
7 A
Maximum OFF state load current at TJ ≤ 85°C
1 µA
Datasheet
www.infineon.com/hitfet
1
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Overview
Diagnostic Functions
•
open-drain status output
Protection Functions
•
•
•
Over temperature shut-down with automatic-restart
Active clamp over voltage protection
Current limitation
Detailed Description
The device is able to switch all kind of resistive, inductive and capacitive loads, limited by maximum clamping
energy and maximum current capabilities.
The BTS3125EJ offers ESD protection on the IN pin which refers to the Source pin (Ground).
The over temperature protection prevents the device from overheating due to overload and/or bad cooling
conditions. The temperature information is given by a temperature sensor in the power MOSFET.
The BTS3125EJ has an auto-restart thermal shut-down function. The device will turn on again, if input is still
high, after the measured temperature has dropped below the thermal hysteresis.
The over voltage protection can be activated during load dump or inductive turn off conditions. The power
MOSFET is limiting the drain-source voltage, if it rises above the VOUT(CLAMP).
Datasheet
2
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Assignment BTS3125EJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Voltage and current definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1
3.2
3.3
4
4.1
4.2
4.3
4.3.1
4.3.2
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
PCB set up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Transient Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
5.1
5.2
5.3
5.3.1
5.3.1.1
5.4
5.5
5.6
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output On-state Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Resistive Load Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Inductive Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Output Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum Load Inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Inverse Current capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Over Voltage Clamping on OUTput . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Thermal Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Short Circuit Protection / Current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1
6.2
6.3
6.4
7
7.1
7.2
Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8
Diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Diagnostics (STATUS Pin) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
9.1
9.2
9.3
9.4
10
Characterization Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Input Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
10.1
10.2
10.3
10.4
11
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Datasheet
3
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
11.1
12
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
13
Datasheet
4
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Block Diagram
2
Block Diagram
OUT
Over
Over-
Voltage
Protection
temperature
Protection
Gate
Driving
Unit
IN
Short circuit
detection /
Current
STATUS
Status
Feedback
ESD
Protection
limitation
GND
Figure 1
Block Diagram
Datasheet
5
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment BTS3125EJ
1
2
8
7
1
2
8
7
3
4
6
5
3
4
6
5
Figure 2
Pin Configuration
3.2
Pin Definitions and Functions
Pin
Symbol
IN
Function
1
Input pin
2
NC
not connected
3
STATUS
NC
Open-drain status feedback (low active)
not connected
4
5
NC
not connected
Ground, Source of power DMOS1)
6, 7, 8
GND
cooling OUT
tab
Drain, Load connection for power DMOS
1) All GND pins must be connected together.
Datasheet
6
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Pin Configuration
3.3
Voltage and current definition
Figure 3 shows all external terms used in this datasheet, with associated convention for positive values.
VBAT
VBAT
VDD
IDD
ZL
RSTATUS
IIN
IN
I L, ID
OUT
I STATUS
STATUS
VOUT,
VDS
VDD
GND
VIN
VSTATUS
GND
Figure 3
Naming definition of electrical parameters
Datasheet
7
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Table 2
Absolute Maximum Ratings 1)
Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min. Typ. Max.
Voltages
Output voltage
VOUT
–
–
–
–
40
31
V
V
internally clamped
P_4.1.1
P_4.1.2
Battery voltage for short
circuit protection
VBAT(SC)
l = 0 or 5 m
R
SC = 20 mΩ + RCable
RCable = l * 16 mΩ/m
SC = 5 µH + LCable
L
LCable = l * 1 µH/m
VIN = 5 V
2)
Battery voltage for load
dump protection
VBAT(LD)
–
–
40
V
P_4.1.4
RI = 2 Ω
RL = 4.5 Ω
tD = 400 ms
suppressed pulse
Input Pin
Input Voltage
VIN
IIN
-0.3
–
–
–
5.5
2
V
–
3)
P_4.1.7
Input current
mA
P_4.1.10
in inverse condition on OUT
to GND)
VOUT < -0.3 V
Status Pin
Status Voltage
Status current
VSTATUS
ISTATUS
-0.3
–
–
–
–
5.5
5
V
–
P_4.1.11
P_4.1.12
P_4.1.13
mA
mA
-0.3 V < VSTATUS < 5.5 V
VSTATUS < -0.3 V
Status current in inverse
ISTATUS_L -1
–
current condition on STATUS
Power Stage
Load current
Energies
| IL |
–
–
–
–
IL(LIM)
A
–
P_4.1.14
P_4.1.21
Unclamped single inductive EAS
energy single pulse
30
mJ
IL(0) = IL(NOM)
VBAT = 13.5 V
TJ(0) = 150°C
Unclamped repetitive
inductive energy pulse with
10k
EAR(10k)
–
–
24
mJ
IL(0) = IL(NOM)
VBAT = 13.5 V
P_4.1.33
TJ(0) = 105 °C
Datasheet
8
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
General Product Characteristics
Table 2
Absolute Maximum Ratings 1) (cont’d)
Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Parameter
Symbol
Values
Unit Note or Test Condition
Number
Min. Typ. Max.
Unclamped repetitive
inductive energy pulse with
100k cycles
EAR(100k)
–
–
19
mJ
mJ
IL(0) = IL(NOM)
VBAT = 13.5 V
P_4.1.39
TJ(0) = 105 °C
Unclamped repetitive
inductive energy pulse with
1M cycles
EAR(1M)
–
–
15
IL(0) = IL(NOM)
VBAT = 13.5 V
TJ(0) = 105 °C
P_4.1.45
Temperatures
Operating temperature
Storage temperature
ESD Susceptibility
TJ
-40
-55
–
–
+150 °C
+150 °C
–
–
P_4.1.52
P_4.1.53
TSTG
ESD susceptibility (all pins) VESD
-3
–
–
3
kV
kV
HBM4)
HBM5)
P_4.1.54
P_4.1.55
ESD susceptibility OUT-pin to VESD
-10
10
GND
ESD susceptibility
VESD
VESD
-1
-1
–
–
1
1
kV
kV
CDM6)
CDM7)
P_4.1.56
P_4.1.57
ESD susceptibility non-
corner pins
1) Not subject to production test, specified by design.
2) VBAT(LD) is setup without the DUT connected to the generator per ISO 7637-1;
RI is the internal resistance of the load dump test pulse generator;
tD is the pulse duration time for load dump pulse (pulse 5) according ISO 7637-1, -2.
3) Maximum allowed value. Consider also inverse input current in inverse condition IIN(-VOUT) in Chapter 9
4) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
5) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 kΩ, 100 pF)
6) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1
7) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1
Notes
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet
9
Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
General Product Characteristics
4.2
Functional Range
Table 3
Functional Range 1)
Please refer to “Electrical Characteristics” on Page 22 for test conditions
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Battery Voltage Range for
Nominal Operation
VBAT(NOR) 6.0
13.5 18.0
V
–
P_4.2.1
Extended Battery Voltage Range VBAT(EXT)
for Operation
0
–
–
–
31
V
parameter deviations P_4.2.2
possible
Input Voltage Range for Nominal VIN(NOR)
Operation
3.0
5.5
150
V
–
P_4.2.3
Junction Temperature
TJ
-40
°C
–
P_4.2.5
1) Not subject to production test, specified by design
Note:
Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics
table.
Datasheet
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Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
General Product Characteristics
4.3
Thermal Resistance
Note:
This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Table 4
Thermal Resistance PG-TDSO8-31
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
1) 2)
1) 3)
1) 4)
Junction to Soldering Point
Junction to Ambient (2s2p)
RthJSP
–
–
–
5.7
39
50
–
–
–
K/W
K/W
K/W
P_4.3.6
RthJA(2s2p)
RthJA(1s0p)
P_4.3.12
P_4.3.18
Junction to Ambient
(1s0p+600 mm2 Cu)
1) 5)
Junction to Ambient
RthJA(1s0p)
–
60
–
K/W
P_4.3.24
(1s0p+300 mm2 Cu)
1) Not subject to production test, specified by design
2) Specified RthJSP value is simulated at natural convection on a cold plate setup (all pins are fixed to ambient
temperature).
TA = 85°C. Device is loaded with 1 W power.
3) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board;
The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70 µm
Cu, 2 x 35 µm Cu). Where applicable a thermal via array under the ex posed pad contacted the first inner copper layer.
TA = 85°C, Device is loaded with 1 W power.
4) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board;
The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper
area of 600 mm2 and 70 µm thickness. TA = 85°C, Device is loaded with 1 W power.
5) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 1s0p board;
The product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with additional heatspreading copper
area of 300 mm2 and 70 µm thickness. TA = 85°C, Device is loaded with 1 W power.
4.3.1
PCB set up
The following PCB set up was implemented to determine the transient thermal impedance1)
70µm modelled (traces)
35µm, 100% metalization*
70µm, 5% metalization*
Figure 4
Cross section JEDEC2s2p
1) (*) means percentual Cu metalization on each layer
Datasheet
11
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
General Product Characteristics
70µm modelled (traces, cooling area)
70µm; 5% metalization*
Figure 5
Cross section JEDEC1s0p
Figure 6
PCB layout
4.3.2
Transient Thermal Impedance
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
General Product Characteristics
60
JEDEC 2s2p
40
20
0
0,000001
0,0001
0,01
1
100
10000
Tp [s]
Figure 7
Typical transient thermal impedance ZthJA = f(tp), TA = 85°C
Value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The
product (Chip + Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner
copper layers (2 x 70 µm Cu, 2 x 35 µm Cu). Device is dissipating 1 W power.
160
JEDEC 1s0p / footprint
140
JEDEC 1s0p / 300mm²
120
JEDEC 1s0p / 600mm²
100
80
60
40
20
0
0,000001
0,0001
0,01
1
100
10000
Tp [s]
Figure 8
Typical transient thermal impedance ZthJA = f(tp), Ta = 85°C
Value is according to Jedec JESD51-3 at natural convection on FR4 1s0p board. Device is
dissipating 1 W power.
Datasheet
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Power Stage
5
Power Stage
5.1
Output On-state Resistance
The on-state resistance depends on the junction temperature TJ. The Figure below show this dependencies in
terms of temperature and voltage for the typical on-state resistance RDS(ON). The behavior in reverse polarity is
described in“Reverse Current capability” on Page 16
320
280
240
3V
5V
200
160
120
80
40
0
-40
-20
0
20
40
60
80
100
120
140
TJ [°C]
Figure 9
Typical On-State Resistance,
RDS(ON) = f(TJ), VIN = 3 V; VIN = 5 V
5.2
Resistive Load Output Timing
Figure 10 shows the typical timing when switching a resistive load.
VIN
VIN(TH)
t
VOUT
VBAT
90 %
-(ΔV/Δt)ON
(ΔV/Δt)OFF
50 %
10 %
tDON
tF
tDOFF
tR
tOFF
t
Switching.
tON
Figure 10 Definition of Power Output Timing for Resistive Load
Datasheet
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Power Stage
5.3
Inductive Load
5.3.1
Output Clamping
When switching off inductive loads with low side switches, the Drain-Source voltage VOUT rises above battery
potential, because the inductance intends to continue driving the current. To prevent unwanted high voltages
the device has a voltage clamping mechanism to keep the voltage at VOUT(CLAMP). During this clamping
operation mode the device heats up as it dissipates the energy from the inductance. Therefore the maximum
allowed load inductance is limited. See Figure 11 and Figure 12 for more details.
VBAT
ZL
IL
OUT ( DMOS Drain
VOUT
GND ( DMOS Source)
IGND
Figure 11 Output Clamp Circuitry
VIN
t
IOUT
t
VOUT
VOUT(CLAMP)
VBAT
t
Figure 12 Switching an Inductive Load
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Smart Low-Side Power Switch
Power Stage
5.3.1.1 Maximum Load Inductance
While demagnetization of inductive loads, energy has to be dissipated in the BTS3125EJ.
This energy can be calculated by the following equation:
⎡
⎢
⎤
⎥
⎛
⎜
⎝
⎞
⎟
⎟
⎠
VBAT −VOUT(CLAMP)
RL × IL
VBAT −VOUT(CLAMP)
L
⎜
E =VOUT(CLAMP)
×
×ln 1−
+ IL
×
(5.1)
(5.2)
RL
RL
⎢
⎣
⎥
⎦
Following equation simplifies under assumption of RL = 0
⎛
⎜
⎞
⎟
⎟
⎠
1
VBAT
2
⎜
E = LIL × 1−
2
VBAT −VOUT(CLAMP)
⎝
For maximum single avalanche energy please also refer to EAS value in “Energies” on Page 8
10000
1000
100
10
1
0,5
1
2
4
IL [A]
Figure 13
Maximum load inductance for single pulse
L = f(IL), TJ(0) = TJ, start = 150°C, VBAT = 13.5 V
5.4
Reverse Current capability
A reverse battery situation means the OUT pin is pulled below GND potentials to -VBAT via the load ZL.
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Power Stage
In this situation the load is driven by a current through the intrinsic body diode of the BTS3125EJ. During
Reverse Battery all protection functions like current limitation, over temperature shut down and over voltage
clamping are not available.
The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS
reverse body diode “-VOUT”.
5.5
Inverse Current capability
An inverse current situation means the OUT pin is pulled below GND potential by a current flowing from GND
to OUT (for example in half-bridge configuration and inductive load using freewheeling via the low side path).
In this situation the load is driven by a current through the intrinsic body diode (device off) of the BTS3125EJ.
During Inverse operation all protection functions like current limitation, over temperature shut down and over
voltage clamping are not available.
The device is dissipating a power loss which is defined by the driven current and the voltage drop on the DMOS
reverse body diode “-VOUT”.
Input current behavior during inverse condition on Output
Please note that during inverse current on drain an increased input current can flow ( IIN(-VOUT)). To limit this
current it is needed to place a resistor (RIN) in line with the input, also to prevent the microcontroller I/O pins
from latching up in this case. The value of this resistor is a compromise of input voltage level in normal
operation and maximum allowed device input current IIN or I/O current (for example of microcontroller).
VOHuC (max)
RIN (min)
=
(5.3)
IIN (max)
with IIN(max) = 2 mA (see also “Absolute Maximum Ratings” on Page 8) allow for the device;
OHµC(max) maximum high level voltage of the control signal (microcontroller I/O)
and assuming -VOUT = 1.1 V (worst case) in inverse condition on the output
V
If inverse current occurs while the STATUS is active (LOW), the STATUS will be reset (HIGH) after the inverse
current disappears.
5.6
Characteristics
Please see “Power Stage” on Page 14 for electrical characteristic table.
Datasheet
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Protection Functions
6
Protection Functions
The device provides embedded protection functions. Integrated protection functions are designed to prevent
IC destruction under fault conditions described in the datasheet. Fault conditions are considered as “outside”
normal operation. Protection functions are not designed for continuous repetitive operation.
6.1
Over Voltage Clamping on OUTput
The BTS3125EJ is equipped with a voltage clamp circuitry that keeps the drain-source (output to GND) voltage
DS at a certain level VOUT(CLAMP). The over voltage clamping is overruling the other protection functions. Power
V
dissipation has to be limited to not exceed the maximum allowed junction temperature.
This function is also used in terms of inductive clamping. Please see also Chapter 5.3.1 for more details.
6.2
Thermal Protection
The device is protected against over temperature due to overload and / or bad cooling conditions. To ensure
this a temperature sensor is located in the power MOSFET.
The BTS3125EJ has a thermal protection function with automatic restart. After the device has switched off due
to over temperature the device will stay off until the junction temperature has dropped down below the
thermal hysteresis “Thermal Protection” on Page 18.
Thermal shutdown
Thermal restart
IN
5V
0V
t
T
j
TJ(SD)
ΔTJ(SD)_HYS
t
VOUT
VBAT
t
Thermal _fault_restart.emf
Figure 14 Thermal protective switch OFF scenario with thermal restart
The device also features a digital feedback on the dedicated status pin. This feedback is latched and can be
read out easily by the microcontroller. Please see “Diagnostics” on Page 21 for details on this feedback.
6.3
Short Circuit Protection / Current limitation
The condition short circuit is an overload condition to the device. If the load current reaches the limitation
value of IL(LIM) the device limits the current and therefore will start heating up. When the thermal shutdown
temperature is reached, the device turns off.
The time from the beginning of current limitation until the over temperature switch off depends strongly on
the cooling conditions.
Datasheet
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Protection Functions
If input is still high the device will turn on again after the measured temperature has dropped below the
thermal hysteresis.
Figure 15 shows this simplified behavior.
Occurrence of Over current
or high ohmic Short circuit
Turn off due to over temperature
Restart into short circuit after cooling down
Restart into normal load condition
IN
5V
0
t
ID
Vbat/Zsc
IL(lim )
t
Tj
TJ(SD)
ΔTJ(SD)_HYS
t
Short_circuit_restart.emf
Figure 15 Short circuit protection via current limitation and over temperature switch off with auto-
restart
6.4
Characteristics
Please see “Protection Functions” on Page 18 for electrical characteristic table.
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Input Stage
7
Input Stage
7.1
Input Circuit
Figure 16 shows the input circuit of the BTS3125EJ. In case of open or floating input pin the device will
automatically switch off and remain off. An ESD Zener structure protects the input circuit against ESD pulses.
ESD protection circuit
IN
GND
Input circuit.emf
Figure 16 Simplified Input circuitry
7.2
Characteristics
Please see “Input Stage” on Page 25 for electrical characteristic table.
Datasheet
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Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Diagnostics
8
Diagnostics
The BTS3125EJ provides a latching digital status signal via an open drain style feedback on the STATUS pin.
In case of a detected over temperature condition, the device pulls the STATUS pin down to GND (pin) by an
internal pull-down intend to signal a low level to the micro controller. This pull-down signal stays active also
during thermal restart until the input pin is pulled-down below the input threshold.
In normal operation the status needs to be externally pulled up to a 3 V/5 V supply to signal a high level.
Figure 17 shows this simplified behavior.
Thermal shutdown
Auto restart
Thermal shutdown
IN
TJ
5V
0
t
TJ(SD)
ΔTJ( SD ) _H YS
t
t
VSTATUS
3V/5V (VDD
)
0
Status Latch reset
by IN=low
Error Status Latch
Figure 17 Short circuit protection via current limitation and over temperature switch off with auto-
restart and signaling via STATUS pin
Datasheet
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Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Electrical Characteristics
9
Electrical Characteristics
9.1
Power Stage
Please see Chapter “Power Stage” on Page 14 for parameter description and further details.
Table 5 Electrical Characteristics: Power Stage
Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Power Stage
On-State resistance
at hot temperature (150°C)
RDS(ON)_150
RDS(ON)_25
IL(NOM)
–
–
–
208 250 mΩ TJ = 150°C;
VIN = 5 V;
P_9.1.6
IL = IL(NOM)
On-State resistance
at ambient temperature (25°C)
108
2
–
–
mΩ TJ = 25°C;
VIN = 5 V;
P_9.1.12
P_9.1.42
IL = IL(NOM)
1)
Nominal load current
A
TJ < 150°C;
TA = 85°C
VIN = 5 V
2)
OFF state load current,
Output leakage current
IL(OFF)_85
–
–
0.6 µA
P_9.1.48
VBAT = 13.5 V;
VIN = 0 V;
TJ ≤ 85°C
OFF state load current,
Output leakage current
IL(OFF)_150
–
–
0.5 1.1 µA VBAT = 18 V;
IN = 0 V;
P_9.1.54
P_9.1.67
V
TJ = 150°C
Reverse body diode forward voltage -VOUT
0.8 1.1
V
IL = -IL(NOM)
VIN = 0 V
;
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Electrical Characteristics
Table 5
Electrical Characteristics: Power Stage (cont’d)
Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Dynamic characteristics - switching timessingle pulseVBAT = 13.5 V, RL = 10Ω;
for definition details see Figure 10 “Definition of Power Output Timing for Resistive Load” on Page 14
3)
Turn-on time
tON
35
75
115 µs
P_9.1.68
VIN = 0 V to 5 V;
VOUT = 10% VBAT
4)
Turn-off time
tOFF
70
135 210 µs
P_9.1.69
VIN = 5 V to 0 V;
VOUT = 90% VBAT
Turn-on delay time
Turn-off delay time
tDON
5
15
75
60
25
µs
VIN = 0 V to 5 V;
VOUT = 90% VBAT
P_9.1.70
P_9.1.71
P_9.1.72
tDOFF
40
30
120 µs
VIN = 5 V to 0 V;
VOUT = 10% VBAT
Fall time, Falling output voltage (turn- tF
on)
90
90
µs
µs
VIN = 0 V to 5 V;
VOUT = 90% VBAT to
V
OUT = 10% VBAT
Rise time, Rising output voltage
Turn-on Slew rate
tR
30
60
VIN = 5 V to 0 V;
P_9.1.73
P_9.1.74
P_9.1.75
V
V
OUT = 10% VBAT to
OUT = 90% VBAT
5)
-(ΔV/Δt)ON 0.22 0.45 0.65 V/µs
(ΔV/Δt)OFF 0.22 0.45 0.65 V/µs
VOUT = 90% VBAT to
VOUT = 50% VBAT
6)
Turn-off Slew rate
VOUT = 50% VBAT to
V
OUT = 90% VBAT
1) Not subject to production test, calculated by RthJA (JEDEC 2s2p, PCB) and RDS(ON)
2) Not subject to production test, specified by design;
3) Not subject to production test, calculated with delay time ON and fall time
4) Not subject to production test, calculated with delay time OFF and rise time
5) Not subject to production test, calculated slew rate between 90% and 50% VOUT
6) Not subject to production test, calculated slew rate between 50% and 90% VOUT
Datasheet
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Electrical Characteristics
9.2
Protection
Please see Chapter “Protection Functions” on Page 18 for parameter description and further details.
Note:
Integrated protection functions are designed to prevent IC destruction under fault conditions
described in the data sheet. Fault conditions are considered as “outside” normal operating range.
Protection functions are not designed for continuous repetitive operation
Table 6
Electrical Characteristics: Protection
Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Thermal Protection
1)
Thermal shut down
TJ(SD)
150 175
–
°C
P_9.2.1
junction temperature
3 V < VIN < 5.5 V
1)
Thermal hysteresis
ΔTJ_HYS
–
15
–
–
–
K
P_9.2.3
P_9.2.8
1) 2)
Minimum status latch reset time
tRESET
50
µs
VIN < 0.8 V;
Overvoltage Protection
Drain clamp voltage
VOUT(CLAMP) 40
45
–
V
A
VIN = 0 V;
IL = 4 mA
P_9.2.14
P_9.2.20
Current limitation (see also Figure 15)
Current limitation
IL(LIM)
7
10.5 14
VIN = 5 V
1) Not subject to production test, specified by design.
2) Minimum time needed to reset the STATUS latch feedback signal
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Electrical Characteristics
9.3
Input Stage
Please see Chapter “Input Stage” on Page 20 for description and further details.
Table 7 Electrical Characteristics: Input
Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Input
Symbol
Values
Unit Note or
Test Condition
Number
Min. Typ. Max.
Input Current,
normal ON state
IIN(ON)
–
–
–
82
120
180
–
µA
µA
mA
VIN = 5.0 V;
P_9.3.1
P_9.3.8
P_9.3.9
Input Current,
protection mode
IIN(PROT)
124
15
VIN = 5.0 V;
1) 2)
Input current, inverse condition on IIN(-VOUT)
OUT to GND
VOUT < -0.3 V;
-0.3 V ≤ VIN <5.5 V
3)
Input pull down current
IIN-GND
VIN(TH)
10
–
–
3
µA
V
P_9.3.10
P_9.3.11
VIN = VIN(TH)
Input Voltage on-threshold
0.8
2.3
IL =0.4mA;
Power DMOS
active
1) Not subject to production test, specified by design
2) Input current must not exceed the maximum ratings in Chapter 4, P_4.1.10
3) Not subject to production test, specified by design
9.4
Diagnostics (STATUS Pin)
Please see Chapter “Diagnostics” on Page 21 for description and further details.
Table 8 Electrical Characteristics: Diagnostics
Tj = -40°C to +150°C, VBAT =6 V to 18 V, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Parameter
Symbol
Values
Unit Note or
Test Condition
Number
Min.
Typ. Max.
Status pin voltage drop
VSTATUS(ON)
–
–
0.65
V
ISTATUS = 1 mA;
latched fault;
3 V≤ VIN < 5.5 V
1)
P_9.4.1
Status pin leakage current
(85°C)
ISTATUS(OFF)_85
–
–
1.5
6
µA
P_9.4.2
P_9.4.3
VSTATUS ≤5.5 V; TJ
≤ 85°C;
3 V≤ VIN < 5.5 V
Status pin leakage current
(150°C)
ISTATUS(OFF)_150
6
12
µA
VSTATUS ≤ 5.0 V;
TJ = 150°C;
3 V≤ VIN < 5.5 V
1) Not subject to production test, specified by design.
Datasheet
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Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
10
Characterization Results
Typical performance characteristics.
10.1
Power Stage
0.4
0.35
0.3
0.25
0.2
150°C
85°C
25°C
0.15
0.1
-40°C
0.05
0
3
3.5
4
4.5
5
5.5
VIN [V]
Figure 18 Typical RDS(ON) vs. VIN @ TJ = -40 … 150°C, IL = IL(NOM)
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Smart Low-Side Power Switch
Characterization Results
0.3
0.25
0.2
3V
0.15
0.1
3.5V
4V
5V
5.5V
0.05
0
-40
-20
0
25
60
85
105
125
150
TJ [°C]
Figure 19 Typical RDS(ON) vs. TJ @ VIN = 3 … 5.5 V; IL = IL(NOM)
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
-40
0
85
150
TJ [°C]
Figure 20 Typical Reverse Diode |VOUT| vs. TJ @ IL = -IL(NOM)
Datasheet
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Smart Low-Side Power Switch
Characterization Results
2.5E-06
2.0E-06
1.5E-06
1.0E-06
5.0E-07
0.0E+00
150°C
85°C
-40°C
25°C
0
5
10
15
20
25
30
VDS [V]
Figure 21 Typical IL(OFF) vs. VDS @ TJ = -40 … 150°C, VIN = 0 V
2.5E-06
2.0E-06
1.5E-06
1.0E-06
5.0E-07
0.0E+00
6V - -40°C
6V - 25°C
6V - 85°C
6V - 150°C
13.5V - -40°C
13.5V - 25°C
13.5V - 85°C
13.5V - 150°C
18V - -40°C
18V - 25°C
18V - 85°C
18V - 150°C
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
VIN[V]
Figure 22 Typical IL(OFF) vs. VIN @ TJ = -40 … 150°C, VBAT = 6 … 18 V
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Smart Low-Side Power Switch
Characterization Results
3500
3000
2500
2000
1500
1000
500
25°C
150°C
0
0.5
1
2
4
IL [A]
Figure 23 Typical destruction point. EAS vs. IL @ TJ(0) = 25°C and 150°C, VBAT = 13.5 V
60
50
40
10K cycles, 25°C
100k cycles, 25°C
10k cycles, 105°C
100k cycles, 105°C
30
20
10
0
2
2,2
2,4
2,6
2,8
3
3,2
3,4
3,6
3,8
4
IL [A]
Figure 24 Typical EAR vs. IL @ TJ(0)= 25°C and 105°C, VBAT = 13.5 V
Datasheet
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Smart Low-Side Power Switch
Characterization Results
60
50
40
30
20
10
0
2A, 25°C
4A, 25°C
2A, 105°C
4A, 105°C
1,0E+0
10,0E+0
100,0E+0
1,0E+3
10,0E+3
100,0E+3
1,0E+6
10,0E+6
Nr. of Cycles
Figure 25 Typical EAR vs. Nr of cycles @ TJ(0) = 25°C and 105°C, VBAT = 13.5 V
Dynamic characteristics (switching times):
250
200
150
100
50
-40°C - Fall time
25°C - Fall time
150°C - Fall time
-40°C - Rise time
25°C - Rise time
150°C - Rise time
0
3
3.5
4
4.5
5
5.5
VIN [V]
Figure 26 Typical tF, tR vs VIN @ TJ = -40 … 150°C
Datasheet
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Smart Low-Side Power Switch
Characterization Results
90
80
70
60
50
40
30
20
10
0
-40°C - Delay off time
25°C - Delay off time
150°C - Delay off time
-40°C - Delay on time
25°C - Delay on time
150°C - Delay on time
3
3.5
4
4.5
5
5.5
VIN [V]
Figure 27 Typical tDON, tDOFF vs VIN @ TJ = -40 … 150°C
0.6
0.5
0.4
0.3
0.2
0.1
0
150°C - Slew rate on
25°C - Slew rate on
-40°C - Slew rate on
-40°C - Slew rate off
25°C - Slew rate off
150°C - Slew rate off
3
3.5
4
4.5
5
5.5
VIN [V]
Figure 28 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs VIN @ TJ = -40 … 150°C
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Smart Low-Side Power Switch
Characterization Results
90
80
70
60
50
40
30
20
10
0
-40°C - Rise time
25°C - Fall time
150°C - Fall time
150°C - Rise time
25°C - Rise time
-40°C - Rise time
6
11
16
21
26
31
VBAT [V]
Figure 29 Tyipcal tF, tR vs VBAT @ VIN = 5 V, TJ = -40 … 150°C
120
100
80
60
40
20
0
-40°C - Delay off time
25°C - Delay off time
150°C - Delay off time
-40°C - Delay on time
25°C - Delay on time
150°C - Delay on time
6
11
16
21
26
31
VBAT [V]
Figure 30 Typical tDON, tDOFF vs VBAT @ VIN = 5 V, TJ = -40 … 150°C
Datasheet
32
Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
1.2
1
150°C - Slew rate on
25°C - Slew rate on
-40°C - Slew rate on
-40°C - Slew rate off
25°C - Slew rate on
150°C - Slew rate off
0.8
0.6
0.4
0.2
0
6
11
16
21
26
31
VBAT [V]
Figure 31 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs VBAT @ VIN = 5 V, TJ = -40 … 150°C
80
70
60
50
40
30
20
10
0
-40°C - Fall time
25°C - Fall time
150°C - Fall time
150°C - Rise time
25°C - Rise time
-40°C - Rise time
0
0.5
1
1.5
2
2.5
3
IL [A]
Figure 32 Typical tF, tR vs IL @ VIN = 5 V, TJ = -40 … 150°C
Datasheet
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Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
100
90
80
70
60
50
40
30
20
10
0
-40°C - Delay off time
25°C - Delay off time
150°C - Delay off time
-40°C - Delay on time
25°C - Delay on time
150°C - Delay on time
0
0.5
1
1.5
2
2.5
3
IL [A]
Figure 33 Typical tDON, tDOFF vs IL @ VIN = 5 V, TJ = -40 … 150°C
0.6
0.5
0.4
0.3
0.2
0.1
0
150°C - Slew rate on
25°C - Slew rate on
-40°C - Slew rate on
-40°C - Slew rate off
25°C - Slew rate off
150°C - Slew rate off
0
0.5
1
1.5
IL [A]
2
2.5
3
Figure 34 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs IL @ VIN = 5 V, TJ = -40 … 150°C
Datasheet
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Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
70
60
50
40
30
20
10
Rise time
Fall time
0
-40
25
85
150
TJ [°C]
Figure 35 Typical tF, tR vs TJ @ VIN = 5 V
90
80
70
60
50
40
30
20
10
0
Delay on time
Delay off time
-40
25
85
150
TJ [°C]
Figure 36 Typical tDON, tDOFF vs TJ @ VIN = 5 V
Datasheet
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Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
0.6
0.5
0.4
0.3
0.2
0.1
0
Average of Slew rate on
Average of Slew rate off
-40
25
85
150
TJ [°C]
Figure 37 Typical -(ΔV/Δt)ON, (ΔV/Δt)OFF vs TJ @ VIN = 5 V
Datasheet
36
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
10.2
Protection
50
49
48
47
46
45
44
43
42
41
40
-40
0
85
150
TJ [°C]
Figure 38 Typical VOUT(CLAMP) vs. TJ @ IL = 4 mA
12
10
8
5V - -40°C
5V - 25°C
5V - 85°C
5V - 150°C
3V - -40°C
3V - 25°C
3V - 85°C
3V - 150°C
6
4
2
0
6
11
16
21
26
31
VBAT [V]
Figure 39 Typical IL(LIM) vs. VBAT @ TJ = -40 … 150°C, VIN = 3 V and 5 V
Datasheet
37
Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
10.3
Input Stage
3
2.5
2
1.5
1
Vth_rising
Vth_falling
0.5
0
-40
25
85
150
TJ [°C]
Figure 40 Typical VIN(TH) vs. TJ @ IL = 0.4 mA
1.6E-04
1.4E-04
1.2E-04
1.0E-04
8.0E-05
6.0E-05
4.0E-05
2.0E-05
0.0E+00
150°C
85°C
25°C
-40°C
3.00
3.50
4.00
4.50
5.00
5.50
VIN [V]
Figure 41 Typical IIN(ON) vs. VIN @ TJ = -40 … 150°C, IL = IL(NOM)
Datasheet
38
Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
160.0E-6
140.0E-6
120.0E-6
100.0E-6
80.0E-6
150°C
85°C
25°C
60.0E-6
-40°C
40.0E-6
20.0E-6
000.0E+0
3
3.5
4
4.5
5
5.5
VIN [V]
Figure 42 Typical IIN(PROT) vs. VIN @ TJ = -40 … 150°C, IL = IL(NOM)
Datasheet
39
Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
10.4
Diagnosis
0.6
0.5
0.4
0.3
0.2
0.1
0
150°C
85°C
25°C
-40°C
3
3.5
4
4.5
5
5.5
VIN [V]
Figure 43 Typical VSTATUS(ON) vs. VIN @ TJ = -40 … 150°C
7.0E-06
6.0E-06
5.0E-06
4.0E-06
3.0E-06
2.0E-06
1.0E-06
0.0E+00
3V
4V
5V
5.5V
-40
25
85
150
TJ [°C]
Figure 44 Typical ISTATUS(OFF) vs. TJ @ VSTATUS = 3 … 5.5 V, VIN = 0 V
Datasheet
40
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Characterization Results
7
6
5
4
3
2
1
0V
0.4V
0.8V
0
-40
25
85
150
TJ [°C]
Figure 45 Typical tRESET vs TJ @ VIN = 0 … 0.8 V
Datasheet
41
Rev. 1.0
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HITFET - BTS3125EJ
Smart Low-Side Power Switch
Application Information
11
Application Information
Note:
The following information is given as a hint for the implementation of the device only and shall not
be regarded as a description or warranty of a certain functionality, condition or quality of the device.
11.1
Application Diagram
An application example with the BTS3125EJ is shown below.
VBAT
Voltage
Regulator
IN
Load
OUT
RST ATUS
Micro
VDD
controller
OUT
RIN
IN
I/O
PWM
ST ATUS
I
RST ATUS(PROT)
GND
GND
Figure 46 Application example circuitry
Recommended values for VIN= 5 V and VDD= 5 V:
RSTATUS=4.7 kΩ
RSTATUS(PROT)=3.3 kΩ
RIN=3.3 kΩ
Note:
This is a very simplified example of an application circuit. The function must be verified in the real
application.
Datasheet
42
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Package Outlines
12
Package Outlines
Figure 47 PG-TDSO8-31
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant
with government regulations the device is available as a green product. Green products are RoHS-Compliant
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Dimensions in mm
Datasheet
43
Rev. 1.0
2016-09-12
HITFET - BTS3125EJ
Smart Low-Side Power Switch
Revision History
13
Revision History
Version
Date
Changes
Datasheet released
Rev. 1.0
2016-09-12
Datasheet
44
Rev. 1.0
2016-09-12
Please read the Important Notice and Warnings at the end of this document
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DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™,
SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™.
Trademarks updated November 2015
Other Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
The information given in this document shall in no For further information on technology, delivery terms
Edition 2016-09-12
Published by
Infineon Technologies AG
81726 Munich, Germany
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
characteristics ("Beschaffenheitsgarantie").
Infineon Technologies Office (www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information regarding
the application of the product, Infineon Technologies
hereby disclaims any and all warranties and liabilities
of any kind, including without limitation warranties of
non-infringement of intellectual property rights of any
third party.
In addition, any information given in this document is
subject to customer's compliance with its obligations
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customer's products and any use of the product of
Infineon Technologies in customer's applications.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer's technical departments to
evaluate the suitability of the product for the intended
application and the completeness of the product
information given in this document with respect to
such application.
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dangerous substances. For information on the types
in question please contact your nearest Infineon
Technologies office.
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