BGSA147ML10 [INFINEON]
天线相关器件;
Infineon 
R E S T R I C T E D
BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Features
•
Designed for high-linearity antenna tuning switching and RF tuning applications
• Ultra low RON resistance of 0.8 Ω at each RF port in ON state
•
Individually controlled reflective open or short to ground OFF ports to eliminate
unwanted antenna resonances
• Low COFF capacitance of 155 fF at each port in OFF state
• High RF operating voltage handling above 45 V in OFF state
• MIPI RFFE 2.1 compliant control interface
• External USID_sel pin enabling 3 default USID addresses
• No RF parameter change within supply voltage range
• No blocking capacitors required if no DC applied on the RF lines
• No power supply decoupling required
1.1mmx1.5mmx0.39mm
•
Small form factor 1.1 mm x 1.5 mm x 0.39 mm (MSL1, 260◦C per JEDEC J-STD-020)
• RoHS and WEEE compliant package
Potential Applications
• Impedance Tuning
• Antenna Tuning
• Inductance Tuning
• Tunable Filters
Product Validation
Qualified for industrial applications according to the relevant tests of JEDEC47/20/22.
Block diagram
R F C
Voltage
USID_Sel
Regulator
V IO
MIPI
RFFE
Drivers
S C L K
S D A T A
Chargepump
R F4
R F2
R F3
R F 1
G N D
Data Sheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
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2020-12-22
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Table of Contents
Table of Contents
1
Features
2
3
2
3
4
5
6
7
8
Maximum Ratings
DC Characteristics
5
RF Small Signal Characteristics
RF large signal parameter
MIPI RFFE Specification
Application Information
Package Information
6
9
11
19
21
Data Sheet
1
Revision 2.1
2020-12-22
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Features
1 Features
• Designed for high-linearity antenna tuning switching and RF tuning applications
• Ultra low RON resistance of 0.8 Ω at each RF port in ON state
• Individually controlled reflective open or short to ground OFF ports to eliminate unwanted antenna resonances
• Low COFF capacitance of 155 fF at each port in OFF state
• High RF operating voltage handling above 45 V in OFF state
• MIPI RFFE 2.1 compliant control interface
• External USID_sel pin enabling 3 default USID addresses
• No RF parameter change within supply voltage range
• No blocking capacitors required if no DC applied on the RF lines
• No power supply decoupling required
• Small form factor 1.1 mm x 1.5 mm x 0.39 mm (MSL1, 260◦C per JEDEC J-STD-020)
• RoHS and WEEE compliant package
Description
The BGSA147ML10 is a Single-Pole Four Throws (SP4T) Antenna Tuning switch optimized for RF applications up to 7.125 GHz.
Its MIPI RFFE digital control interface allows easy implementation and best flexibility when operated in cellular mobile RF
Front-End designs.
The BGSA147ML10 is made of 4 ultra-low On resistance / low Oꢀ capacitance series switches and 4 shunt to ground
switches enabling on-demand open-reflective or short-reflective OFF ports behaviour. This last feature is of great value to
reduce antenna engineer development time in case of unwanted antenna resonance or to improve antenna eꢀiciency with
less component tuning eꢀort.
Unlike GaAs RF switches, highly linear RF performance is reached at all signal levels within the operating conditions.
High RF voltage ruggedness and individually programmable shunt to ground switches on each RF throw make BGSA147ML10
particularly eꢀicient for switching inductors and capacitors in RF matching and Antenna Tuning circuits.
Type
Marking
Package
Ordering Information
BGSA147ML10
A7
TSLP-10-3
BGSA 147ML10 E6327
Data Sheet
2
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Maximum Ratings
2 Maximum Ratings
Table 1: Maximum Ratings Table at TA = 25 ◦C, unless otherwise specified
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
0.4
Typ.
–
–
Max.
7.125
2.2
1)
Frequency Range
RFFE Supply voltage 2)
f
GHz
V
VIO
-0.3
Only for infrequent and short
duration time periods
–
Storage temperature range
RF peak voltage
TSTG
-55
–
–
–
150
50
◦C
V
VRF_max
Short term peaks (1µs in 0.1%
duty cycle), exceeding typical
linearity, Ron and Coꢀ param-
eters, in Isolation mode, test
condition schematic in Fig. 1
ESD robustness, CDM 3)
ESD robustness, HBM 4)
Junction temperature
VESD
-1
-2
–
–
–
–
–
–
+1
kV
kV
◦C
K/W
V
CDM
VESD
+2
125
80
0
HBM
Tj
–
Thermal resistance junction - soldering point RthJS
Maximum DC-voltage on RF-Ports and RF- VRFDC
Ground
–
–
0
No DC voltages allowed on RF-
Ports
–
RFFE Control Voltage Levels
VSCLK
VSDATA
VUSID_SEL
,
-0.7
–
VIO+0.7
(max.
2.2)
V
,
1) Switch has a low-pass response. For higher frequencies, losses have to be considered for their impact on thermal heating. The DC voltage at RF ports VRFDC has
to be 0V.
2) Note: Consider any ripple voltages on top of VIO. A high RF ripple at the VIO can exceed the maximum ratings by VIO = VDC + VRipple
.
3) Field-Induced Charged-Device Model ANSI/ESDA/JEDEC JS-002. Simulates charging/discharging events that occur in production equipment and processes.
Potential for CDM ESD events occurs whenever there is metal-to-metal contact in manufacturing.
4) Human Body Model ANSI/ESDA/JEDEC JS-001 (R=1,5 kΩ, C=100 pF).
Warning: Stresses above the max. values listed here may cause permanent damage to the device. Maximum ratings
are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. Expo-
sure to conditions at or below absolute maximum rating but above the specified maximum operation conditions may
aꢀect device reliability and life time. Functionality of the device might not be given under these conditions.
Data Sheet
3
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Maximum Ratings
Spectrum
Analyser
(Hx Monitor)
50 Ohm
50 Ohm Transmission Line
SIGNAL
SOURCE
Power
Meter
Vrf
RFC
Voltage
USID_Sel
VIO
Regulator
ALL THROWS
OPERATED IN ISO
POSITION
MIPI
RFFE
Drivers
SCLK
SDATA
(all shunts and
Chargepump
series transistors off)
GND
RF1
RF2 RF3
RF4
Figure 1: RF operating voltage measurement configuration - OFF mode
50 Ohm
50 Ohm Transmission Line
SIGNAL
SOURCE
RFC
RF1/RF2/RF3/RF4
Voltage
Regulator
ON MODE
USID_Sel
VIO
MIPI
RFFE
Drivers
SCLK
SDATA
Chargepump
Spectrum
Analyser
(Hx Monitor)
GND
RF1
RF2 RF3 RF4
Power
Meter
Figure 2: RF operating and Harmonics generation measurement configuration - RFx ON mode (RF4 as example)
Data Sheet
4
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
DC Characteristics
3 DC Characteristics
Table 2: DC Characteristics at TA = −40 ◦C to 85 ◦C
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
1.65
Typ.
1.8
–
Max.
1.95
VIO
RFFE supply voltage
VIO
VIH
VIL
V
–
RFFE input high voltage1
RFFE input low voltage1
RFFE output high voltage1
RFFE output low voltage1
0.7*VIO
V
–
0
–
0.3*VIO
VIO
V
–
VOH
VOL
0.8*VIO
–
V
–
0
–
–
–
–
0.2*VIO
2
V
–
RFFE control input capacitance CCtrl
–
pF
µA
µA
–
2
22
–
35
VIO Shutdown Mode
Idle State, no RF Power
RFFE supply current
IVIO
1SCLK and SDATA
Data Sheet
5
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
RF Small Signal Characteristics
4 RF Small Signal Characteristics
Table 3: Parametric specifications
Parameter
Symbol
RON_Series
ROFF_Series
RON_Shunt
ROFF_Shunt
Values
Typ.
0.8
Unit
Ω
STATE / Notes
Min.
–
Max.
0.85
Series switch
ON DC resistance
Series switch
OFF DC resistance
Shunt to GND switch
ON DC resistance
Shunt to GND switch
OFF DC resistance
RFx to RFc
TA = 25 ◦C,
Z0 = 50 Ω
250
–
–
kΩ
Ω
5.8
–
7
250
–
–
kΩ
fF
(1)
COFF
155
170
OFF capacitance, 1 GHz
1) OFF capacitance calculated from Y21 parameters, shunt OFF.
Data Sheet
6
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
RF Small Signal Characteristics
Table 4: RF electrical parameters, OFF port shunts switches open
Parameter
Symbol
Values
Typ.
Unit
STATE / Notes
Min.
Max.
Insertion Loss: RFx to RFC(1,2,3,4)
600 - 960 MHz
1400 - 1700 MHz
1710 - 2169 MHz
0.1
0.3
0.5
0.6
0.9
1.8
2.3
2.9
3.9
dB
dB
dB
dB
dB
dB
dB
dB
0.25
0.35
0.5
1.2
1.7
2.1
VIO = 1.65 − 1.95 V,
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
2170 - 2690 MHz
ILSP4T
3300 - 4200 MHz
4400 - 5000 MHz
5150 - 5925 MHz
5925 - 7125 MHz
2.5
Return Loss: RF1, RF2, RF3, RF4 or RFC (1,2,3)
600 - 960 MHz
1400 - 1700 MHz
1710 - 2169 MHz
17
13
11
9
6
5
21
16
14
13
9
8
7
6
dB
dB
dB
dB
dB
dB
dB
dB
VIO = 1.65 − 1.95 V,
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
2170 - 2690 MHz
3300 - 4200 MHz
4400 - 5000 MHz
5150 - 5925 MHz
5925 - 7125 MHz
Isolation: RFx to RFC(1,2,3,4)
600 - 960 MHz
RLSP4T
4
4
19
15
13
12
10
9
23
17
16
14
12
11
dB
dB
dB
dB
dB
dB
dB
dB
1400 - 1700 MHz
1710 - 2169 MHz
2170 - 2690 MHz
3300 - 4200 MHz
4400 - 5000 MHz
5150 - 5925 MHz
5925 - 7125 MHz
VIO = 1.65 − 1.95 V,
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
ISOOFF
9
9
11
11
1) Valid for all RF power levels, no compression behavior
2)On application board without any matching components
3)Shunts in OFF Mode
4)x = 1, 2, 3, 4
Data Sheet
7
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
RF Small Signal Characteristics
Table 5: RF electrical parameters, OFF port shunts switches closed
Parameter
Symbol
Values
Typ.
Unit
STATE / Notes
Min.
Max.
Insertion Loss: RFx to RFC(1,2,3,4)
600 - 960 MHz
1400 - 1700 MHz
1710 - 2169 MHz
0.1
0.2
0.3
0.4
1.1
1.8
2.5
3.3
0.2
0.35
0.5
0.8
1.9
2.7
3.7
5.3
dB
dB
dB
dB
dB
dB
dB
dB
VIO = 1.65 − 1.95 V,
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
2170 - 2690 MHz
ILSP4T
3300 - 4200 MHz
4400 - 5000 MHz
5150 - 5925 MHz
5925 - 7125 MHz
Return Loss: RF1, RF2, RF3, RF4 or RFC(1,2,3)
600 - 960 MHz
1400 - 1700 MHz
1710 - 2169 MHz
17
12
11
9
5
4
21
16
14
12
8
6
5
5
dB
dB
dB
dB
dB
dB
dB
dB
VIO = 1.65 − 1.95 V,
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
2170 - 2690 MHz
3300 - 4200 MHz
4400 - 5000 MHz
5150 - 5925 MHz
5925 - 7125 MHz
Isolation: RFx to RFC(1,2,3,4)
600 - 960 MHz
RLSP4T
3
3
32
23
20
17
12
10
9
39
30
27
24
18
16
14
13
dB
dB
dB
dB
dB
dB
dB
dB
1400 - 1700 MHz
1710 - 2169 MHz
2170 - 2690 MHz
3300 - 4200 MHz
4400 - 5000 MHz
5150 - 5925 MHz
5925 - 7125 MHz
VIO = 1.65 − 1.95 V,
Z0 = 50 Ω at all RF-ports,
TA = −40 ◦C... + 85 ◦C
ISOOFF
8
1) Valid for all RF power levels, no compression behavior
2)On application board without any matching components
3)Shunts in ON Mode
4)x = 1, 2, 3, 4
Data Sheet
8
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
RF large signal parameter
5 RF large signal parameter
Table 6: RF large signal specifications at TA = 25 ◦C
Parameter
Symbol
Values
Typ.
–
Unit
Note / Test Condition
Min.
–
Max.
45
RF Operating Voltage
VRF_opr
V
In Isolation mode, 900 MHz test
condition schematic in Fig. 1
Harmonic Generation up to 15 GHz, all RF Ports
Second Order Harmonics
Third Order Harmonics
Second Order Harmonics
Third Order Harmonics
Second Order Harmonics
Third Order Harmonics
Second Order Harmonics
Third Order Harmonics
Second Order Harmonics
Third Order Harmonics
Second Order Harmonics
Third Order Harmonics
Second Order Harmonics
Third Order Harmonics
Intermodulation Distortion IMD2
IIP2, low
PH2
PH3
PH2
PH3
PH2
PH3
PH2
PH3
PH2
PH3
PH2
PH3
PH2
PH3
–
–
–
–
–
–
–
–
–
–
–
–
–
–
-85
-92
-67
-69
-65
-70
-68
-74
-65
-76
-67
-77
-68
-77
-80
-88
-60
-66
-61
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
dBm
26 dBm, 50 Ω, f0 = 663 MHz
26 dBm, 50 Ω, f0 = 663 MHz
35 dBm, 50 Ω, f0 = 920 MHz
35 dBm, 50 Ω, f0 = 920 MHz
33 dBm, 50 Ω, f0 = 1910 MHz
33 dBm, 50 Ω, f0 = 1910 MHz
29 dBm, 50 Ω, f0 = 2690 MHz
29 dBm, 50 Ω, f0 = 2690 MHz
29 dBm, 50 Ω, f0 = 3600 MHz
29 dBm, 50 Ω, f0 = 3600 MHz
29 dBm, 50 Ω, f0 = 4400 MHz
29 dBm, 50 Ω, f0 = 4400 MHz
29 dBm, 50 Ω, f0 = 5000 MHz
29 dBm, 50 Ω, f0 = 5000 MHz
-66
-64
-68
-58
-69
-64
-73
-64
-70
IIP2, l
IIP2, h
110
115
121
125
–
–
dBm
dBm
IIP2 conditions Tab. 7
IIP3 conditions Tab. 8
IIP2, high
Intermodulation Distortion IMD3
IIP3
IIP3
72
78
–
dBm
Data Sheet
9
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
RF large signal parameter
Table 7: IIP2 conditions table
Band
In-Band Frequency
Blocker Frequency 1
Blocker Power 1
Blocker Frequency 2
Blocker Power 2
[MHz]
2140
[MHz]
1950
[dBm]
23
[MHz]
190
[dBm]
-15
Band 1 Low
Band 1 High
Band 5 Low
Band 5 High
2140
1950
23
4090
45
-15
881.5
881.5
836.5
836.5
23
-15
23
1718
-15
Table 8: IIP3 conditions table
Band
In-Band Frequency
Blocker Frequency 1
Blocker Power 1
Blocker Frequency 2
Blocker Power 2
[MHz]
2140
[MHz]
1950
[dBm]
23
[MHz]
1760
[dBm]
-15
Band 1
Band 5
881.5
836.5
23
791.5
-15
Data Sheet
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
6 MIPI RFFE Specification
The MIPI RFFE interface is implemented according to the following specifications and documents:
- MIPI Alliance Specification for RF Front-End Control Interface version 2.1 - 18 December 2017
- MIPI Alliance Errata 01 for MIPI RFFE Specification Version v2.1 - 24 February 2019
- Qualcomm RFFE Vendor specification 80-N7876-1 Rev. Y (December 3, 2018)
Table 9: MIPI Features
Feature
Supported
Comment
MIPI RFFE 2.1 standard
Yes
Yes
Yes
Yes
Yes
Backward compatible to MIPI 2.0 standard
Register 0 write command sequence
Register read and write command sequence
Extended register read and write command sequence
Support for standard frequency range operations for
SCLK
Up to 26 MHz
Up to 52 MHz
Support for extended frequency range operations for
SCLK
Yes
Longer Reach RFFE Bus Length Feature
Programmable driver strength
Programmable Group SID
Programmable USID
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Up to 80 pF
Trigger functionality
Extended Triggers and Trigger Masks
Broadcast / GSID write to PM TRIG register
Reset
Via VIO, PM TRIG or soꢁware register
USID selection See Tab. 10
Status / error sum register
Extended product ID register
Revision ID register
Group SID register
USID select pin
Data Sheet
11
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Table 10: Default MIPI USID Selection
Address
Symbol
Addr6
Addr7
Addr9
External Conditon at USID Port
to VIO
USID=0110
USID=0111
USID=1001
Ground
Floating1)
1) Total capacitance on the USID_SEL pin must be <5 pF.
RFc
RFc
10
RFc
10
RF4
10
RF4
RF4
1
2
3
4
9
RF3
RF2
1
2
3
4
9
RF3
RF2
1
2
3
4
9
RF3
RF2
RF1
RF1
RF1
8
7
6
8
7
6
8
7
6
USID_Sel
USID_Sel
USID_Sel
GND
GND
GND
VIO
SCLK
SCLK
5
5
5
SCLK
VIO
VIO
SDATA
SDATA
SDATA
Addr6=0110
Addr7=0111
Addr9=1001
Figure 3: BGSA147ML10 USID_Sel Pin Configuration
Table 11: Startup Behavior
Feature
State
Comment
Power status
Low power
Lower power mode aꢁer start-up
Default power mode is HIGH
Trigger function
Enabled
Enabled aꢁer start-up. Programmable via behavior control register
Data Sheet
12
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Table 12: Switching Time Behavior
Parameter
Symbol
Values
Typ.
9
Unit
STATE / Notes
Min.
–
Max.
15
Power Up Settling Time
tPUP
µs
Time from Power Up plus Switch
command 50% last SCLK falling
edge to 90% RF-Signal, see Fig. 4
Time switching between RF states
50% last SCLK falling edge to 90%
RF-Signal, see Fig. 4
Switching Time
tST
–
8
11
µs
VDD+IO
1)
>120ns
tPUP
tST
<50ns
SCLK 52MHz
SDATA
Power Up
Command
Switch A
Command
Switch B
Command
90%
RF Path A
90%
RF Path B
1)
timing starts @ VIO > VIOmin (1.65V) and ends @ SDATA /SCLK < VILmax (0.3 x VIO
)
Figure 4: BGSA147ML10 Switching Time Behavior
Data Sheet
13
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Table 13: Register Mapping, Table I
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID
Support
Trigger
Support
R/W
0x00
0x01
0x1C
REGISTER_0
7:0
7:0
7
MODE_CTRL
RF Switch Control
00000000
No
No
Yes
Yes
Trigger 0-10
Yes
R/W
REGISTER_1
PM_TRIG
MODE_CTRL
RF Switch Control
00000000
R/W
R/W
Trigger 0-10
No
PWR_MODE(1)
Operation Mode
PWR_MODE(0)
State Bit Vector
0: Normal operation (ACTIVE)
1: Low Power Mode (LOW POWER)
0: No action (ACTIVE)
1
6
0
1: Powered Reset (STARTUP to ACTIVE
to LOW POWER)
5
4
3
TRIGGER_MASK_2
TRIGGER_MASK_1
TRIGGER_MASK_0
0: Data masked (held in shadow REG)
0
0
0
No
1: Datanotmasked(readyfortransferto
active REG)
0: Data masked (held in shadow REG)
1: Datanotmasked(readyfortransferto
active REG)
0: Data masked (held in shadow REG)
1: Datanotmasked(readyfortransferto
active REG)
2
1
TRIGGER_2
TRIGGER_1
TRIGGER_0
PRODUCT_ID
0: No action (data held in shadow REG)
1: Data transferred to active REG
0
Yes
0: No action (data held in shadow REG)
1: Data transferred to active REG
0
0
0: No action (data held in shadow REG)
1: Data transferred to active REG
0
0x1D
0x1E
0x1F
PRODUCT_ID
MAN_ID
7:0
This is a read-only register. However,
during the programming of the USID a
write command sequence is performed
on this register, even though the write
does not change its value.
00110100
No
No
No
No
R
R
7:0
7:4
3:0
MANUFACTURER_ID [7:0]
MANUFACTURER_ID [11:8]
USID[3:0]
This is a read-only register. However,
during the programming of the USID, a
write command sequence is performed
on this register, even though the write
does not change its value.
00011010
0001
MAN_USID
These bits are read-only. However, dur-
ing the programming of the USID, a
write command sequence is performed
on this register even though the write
does not change its value.
USID_Sel pin
See
No
No
R/W
Tab. 10
Data Sheet
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Table 14: Register Mapping, Table II
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID
Support
Trigger
Support
R/W
0x20
EXT_PRODUCT_ID 7:0
EXT_PRODUCT_ID
Extension to PRODUCT_ID in register
0x1D. This is a read-only register. How-
ever, during the programming of the
USID a write command sequence is per-
formedonthisregister, eventhoughthe
write does not change its value.
00000000
No
No
R
0x21
0x22
0x23
REV_ID
GSID
7:4
3:0
7:4
3:0
7
MAIN_REVISION
SUB_REVISION
GSID0[3:0]
Chip main revision
0000
0000
0000
0000
0
No
No
Yes
No
No
No
R
Chip sub revision
Primary Group Slave ID.
Secondary Group Slave ID.
R/W
R/W
GSID1[3:0]
UDR_RST
UDR_RST
Reset all configurable non-RFFE Re-
served registers to default values.
0: Normal operation
1: Soꢁware reset
6:0
7
RESERVED
Reserved for future use
Reserved for future use
0000000
0x24
ERR_SUM
RESERVED
0
0
No
No
R
6
COMMAND_FRAME_PARITY_ERR
Command Sequence received with par-
ity error − discard command.
Command length error.
5
4
3
2
1
COMMAND_LENGTH_ERR
ADDRESS_FRAME_PARITY_ERR
DATA_FRAME_PARITY_ERR
READ_UNUSED_REG
0
0
0
0
0
0
Address frame with parity error.
Data frame with parity error.
Read command to an invalid address.
Write command to an invalid address.
WRITE_UNUSED_REG
BID_GID_ERR
0
Read command with a BROADCAST_ID
or GROUP_ID.
0x2B
BUS_LD
7:3
2:0
RESERVED
Reserved for future use
0x0
0x4
No
No
R/W
BUS_LD[2:0]
ProgramthedrivestrengthoftheSDATA
driver in readback modes.
0x0: 10 pF
0x1: 20 pF
0x2: 30 pF
0x3: 40 pF
0x4: 50 pF
0x5: 60 pF
0x6: 80 pF
0x7: 80 pF
0x8-0xF: Spare
Data Sheet
15
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Table 15: Register Mapping, Table III
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID
Support
Trigger
Support
R/W
0x2D
EXT_TRIG_MASK
7
6
5
4
3
2
1
TRIGGER_MASK_10
0: Data writes to registers tied to
EXT_TRIGGER_10 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_10 bit is set to 1.
1
No
No
R/W
1: Data writes to registers tied to
EXT_TRIGGER_10 are not masked. Data
writes go directly to the active registers.
TRIGGER_MASK_9
TRIGGER_MASK_8
TRIGGER_MASK_7
TRIGGER_MASK_6
TRIGGER_MASK_5
TRIGGER_MASK_4
TRIGGER_MASK_3
0: Data writes to registers tied to
EXT_TRIGGER_9 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_9 bit is set to 1.
1
1
1
1
1
1
1
1: Data writes to registers tied to
EXT_TRIGGER_9 are not masked. Data
writes go directly to the active registers.
0: Data writes to registers tied to
EXT_TRIGGER_8 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_8 bit is set to 1.
1: Data writes to registers tied to
EXT_TRIGGER_8 are not masked. Data
writes go directly to the active registers.
0: Data writes to registers tied to
EXT_TRIGGER_7 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_7 bit is set to 1.
1: Data writes to registers tied to
EXT_TRIGGER_7 are not masked. Data
writes go directly to the active registers.
0: Data writes to registers tied to
EXT_TRIGGER_6 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_6 bit is set to 1.
1: Data writes to registers tied to
EXT_TRIGGER_6 are not masked. Data
writes go directly to the active registers.
0: Data writes to registers tied to
EXT_TRIGGER_5 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_5 bit is set to 1.
1: Data writes to registers tied to
EXT_TRIGGER_5 are not masked. Data
writes go directly to the active registers.
0: Data writes to registers tied to
EXT_TRIGGER_4 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_4 bit is set to 1.
1: Data writes to registers tied to
EXT_TRIGGER_4 are not masked. Data
writes go directly to the active registers.
0
0: Data writes to registers tied to
EXT_TRIGGER_3 are masked. Data
is held in shadow registers until the
EXT_TRIGGER_3 bit is set to 1.
1: Data writes to registers tied to
EXT_TRIGGER_3 are not masked. Data
writes go directly to the active registers.
Data Sheet
16
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Table 16: Register Mapping, Table IV
Register
Address
Register Name
Data Function
Bits
Description
Default
Broadcast_ID
Support
Trigger
Support
R/W
0x2E
EXT_TRIG
7
6
5
4
3
2
1
TRIGGER_10
TRIGGER_9
TRIGGER_8
TRIGGER_7
TRIGGER_6
TRIGGER_5
TRIGGER_4
TRIGGER_3
0: No action. Data is held in shadow reg-
isters.
0
Yes
No
R/W
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_10
0: No action. Data is held in shadow reg-
isters.
0
0
0
0
0
0
0
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_9
0: No action. Data is held in shadow reg-
isters.
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_8
0: No action. Data is held in shadow reg-
isters.
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_7
0: No action. Data is held in shadow reg-
isters.
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_6
0: No action. Data is held in shadow reg-
isters.
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_5
0: No action. Data is held in shadow reg-
isters.
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_4
0
0: No action. Data is held in shadow reg-
isters.
1: Data is transferred from shadow reg-
isters to active registers for refisters tied
to EXT_TRIGGER_3
Data Sheet
17
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
MIPI RFFE Specification
Warning: Register_0 and Register_1 RF switch control bits are identical. Writing both Registers Register_0 and Register_1 simul-
taneously will lead to undefined behavior. The unused register (Register_0 or Register_1) must remain 0x00.
Table 17: Modes of Operation (Truth Table, Register_0)
State
0
1
Mode
ALL Series OFF (All Shunts OFF)
ALL Saries OFF (All Shunts ON)
RF1 Series
D7
0
1
D6
0
1
D5
0
1
D4
0
1
D3
0
0
0
0
0
1
D2
0
0
0
0
1
D1
0
0
0
1
D0
0
0
1
2
3
4
5
6
7
8
9
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
RF2 Series
0
0
0
0
0
0
0
RF3 Series
0
0
0
0
0
0
RF4 Series
0
0
0
0
0
RF1 Shunt
0
0
0
0
RF2 Shunt
0
0
0
RF3 Shunt
0
0
RF4 Shunt
0
Mapping of Switch Rows to Bit: ON = 1 OFF = 0
Table 18: Modes of Operation (Truth Table, Register_1)
State
0
1
Mode
ALL Series OFF (All Shunts OFF)
ALL Series OFF (All Shunts ON)
RF1 Series
D7
0
1
D6
0
1
D5
0
1
D4
0
1
D3
0
0
0
0
0
1
D2
0
0
0
0
1
D1
0
0
0
1
D0
0
0
1
2
3
4
5
6
7
8
9
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
1
RF2 Series
0
0
0
0
0
0
0
RF3 Series
0
0
0
0
0
0
RF4 Series
0
0
0
0
0
RF1 Shunt
0
0
0
0
RF2 Shunt
0
0
0
RF3 Shunt
0
0
RF4 Shunt
0
Mapping of Switch Rows to Bit: ON = 1 OFF = 0
BGSA147ML10 truth table allows to connect any combination of above bits in one single write to register_0 (respectively regis-
ter_1) command. As an example RF1 series can be set ON while RF1 shunt is set OFF, RF2, RF3 and RF4 series set OFF and shunt set
ON by using this single write to register_0 command «0b:11100001».
Data Sheet
18
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2020-12-22
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Application Information
7 Application Information
Pin Configuration and Function
RFC
10
1
2
3
4
9
8
7
6
RF3
RF4
RF1
RF2
GND
SCLK
USID_Sel
VIO
5
SDATA
Figure 5: BGSA147ML10 Pin Configuration (top view)
Table 19: Pin Definition and Function
Pin No.
1
Name
RF4
Function
RF4 port
RF1 port
2
3
4
5
6
7
8
9
10
RF1
USID_Sel
VIO
USID_Sel port (see Tab. 10 for 3 diꢀerent USID States)
RFFE Power Supply
MIPI RFFE DATA
MIPI RFFE CLOCK
Ground
SDATA
SCLK
GND
RF2
RF2 port
RF3
RF3 port
RFC
Common RF port
Data Sheet
19
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Application Information
Evaluation Board Description
Figure 6: BGSA147ML10 Application Schematic
Table 20: Bill of Materials Table
Name
Part Type
Package
0402
Manufacturer
Various
Function
De-coupling capacitor
Antenna Tuner
C1 (100pF optional) Capacitor
N1
BGSA147ML10
TSLP-10-3
0402
Infineon
R1 (0 Ohm)
Resistor
Resistor
Resistor
Various
Set USID default Address to 6 (VIO)
R2 (do not place)
R2 (0 Ohm)
0402
0402
Various
Various
Set USID default Address to 7 (GND)
R1 (do not place)
R1 (do not place)
R2 (do not place)
Set USID default Address to 9 (FLOATING)
Table 21: ESD robustness, System Level Test (SLT)
Parameter
Symbol
Values
Unit
Note / Test Condition
Min.
-8
Typ.
–
–
Max.
+8
ESD SLT 1)
ESD SLT 1)
VESD
kV
kV
RF vs system GND, with 27 nH shunt inductor
RF vs system GND, with 56 nH shunt inductor
SLT
VESD
-6
+6
SLT
1) IEC 61000-4-2 (R = 330 Ω, C = 150 pF), contact discharge.
Data Sheet
20
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Package Information
8 Package Information
BOTTOM VIEW
ALL DIMENSIONS ARE IN UNITS MM
THE DRAWING IS IN COMPLIANCE WITH ISO 128 & PROJECTION METHOD 1 [
]
Figure 7: TSLP-10-3 Package Outline (top, side and bottom views)
Pin 1 marking
Date code (YW)
Type code
Figure 8: Marking Specification (top view): Date code digits Y and W defined in Table 22/23
Data Sheet
21
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BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Package Information
Table 22: Year date code marking - digit "Y"
Year
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
"Y"
0
1
Year
"Y"
0
1
Year
"Y"
0
1
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2
2
2
3
3
3
4
4
4
5
5
5
6
7
6
7
6
7
8
9
8
9
8
9
Table 23: Week date code marking - digit "W"
Week
"W"
Week
"W"
N
P
Week
"W"
4
Week
34
35
"W"
h
j
Week
45
"W"
v
1
A
12
23
2
B
13
24
5
46
47
x
3
C
14
Q
R
25
6
36
37
k
l
y
4
5
D
E
15
26
27
7
48
49
50
51
z
16
S
a
38
39
40
41
n
p
q
r
8
6
7
F
17
T
28
29
30
31
b
c
9
G
H
J
18
U
V
2
8
9
10
11
19
d
e
52
3
20
21
W
Y
42
43
s
53
M
K
32
f
t
L
22
Z
33
g
44
u
Data Sheet
22
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2020-12-22
RESTRICTED
BGSA147ML10
Ultra Low Resistance Antenna Tuning SP4T
Package Information
ꢙꢈꢁꢅꢍꢃꢇꢆ ꢋꢍꢆꢎꢂꢉ ꢏꢇꢋꢐ ꢎꢇꢏ
ꢖꢑꢗ ꢑꢒꢘꢕ
ꢑꢒꢓ
ꢑꢒꢓ
ꢑꢒꢓ
ꢖꢑꢗ ꢑꢒꢘꢕ
ꢑꢒꢓ
ꢀꢁꢂꢃꢄꢅꢆ ꢇꢈꢂꢉꢁꢊꢉꢂꢋ
ꢌꢍꢈꢈꢂꢉ
ꢀꢍꢆꢎꢂꢉ ꢏꢇꢋꢐ
Figure 9: Footprint Recommendation (all dimensions are in units of mm)
ꢁꢂꢃ
ꢀ
ꢄꢅꢆ ꢇ
ꢈꢉꢊꢋꢅꢆꢌ
ꢇꢂꢍ
Figure 10: TSLP-10-3 Carrier Tape (all dimensions are in units of mm)
Data Sheet
23
Revision 2.1
2020-12-22
Revision History
Page or Item
Revision 2.1, 2020-12-22
Cover page
Subjects (major changes since previous revision)
Package height added
20
Reference design and BOM added
Trademarks
All referenced product or service names and trademarks are the property of their respective owners.
IMPORTANT NOTICE
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Edition 2020-12-22
Published by
Infineon Technologies AG
81726 Munich, Germany
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any information regarding the application of the prod-
uct, Infineon Technologies hereby disclaims any and all
warranties and liabilities of any kind, including without
limitationwarrantiesofnon-infringementofintellectual
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mation given in this document is subject to customer’s
WARNINGS
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in question please contact your nearest Infineon Tech-
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