AUIRLR3410TR [INFINEON]

Power Field-Effect Transistor, 17A I(D), 100V, 0.125ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3;


型号：	AUIRLR3410TR
厂家：	Infineon
描述：	Power Field-Effect Transistor, 17A I(D), 100V, 0.125ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, ROHS COMPLIANT, PLASTIC, DPAK-3 局域网开关脉冲晶体管
文件：	总10页 (文件大小：547K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AUTOMOTIVE GRADE

AUIRLR3410

HEXFET^®Power MOSFET

100V

Features

 Advanced Planar Technology

 Low On-Resistance

V_DSS

R_DS(on)

I_D

 Logic Level Gate Drive

 Dynamic dV/dT Rating

 175°C Operating Temperature

 Fast Switching

 Fully Avalanche Rated

 Repetitive Avalanche Allowed up to Tjmax

 Lead-Free, RoHS Compliant

 Automotive Qualified *

max.

105m

17A

Description

Specifically designed for Automotive applications, this Stripe Planar

design of HEXFET® Power MOSFETs utilizes the latest

processing techniques to achieve low on-resistance per silicon

area. This benefit combined with the fast switching speed and

ruggedized device design that HEXFET power MOSFETs are well

known for, provides the designer with an extremely efficient and

reliable device for use in Automotive and a wide variety of other

applications.

D-Pak

AUIRLR3410

Gate

Drain

Source

Standard Pack

Form

Tube

Base part number

Package Type

Orderable Part Number

Quantity

3000

AUIRLR3410

AUIRLR3410TRL

AUIRLR3410

D-Pak

Tape and Reel Left

Absolute Maximum Ratings

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress

ratings only; and functional operation of the device at these or any other condition beyond those indicated in the specifications is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The thermal resistance

and power dissipation ratings are measured under board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless

otherwise specified.

Symbol

Parameter

Max.

Units

I_D@ T_C= 25°C

Continuous Drain Current, V_GS@ 10V

I_D@ T_C= 100°C

I_DM

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current 

P_D@T_C= 25°C

Maximum Power Dissipation

Linear Derating Factor

0.53

W/°C

V_GS

E_AS

Gate-to-Source Voltage

Single Pulse Avalanche Energy (Thermally Limited) 

± 16

150

I_AR

Avalanche Current 

9.0

7.9

E_AR

dv/dt

T_J

Repetitive Avalanche Energy 

Pead Diode Recovery dv/dt

V/ns

5.0

Operating Junction and

-55 to + 175

T_STG

Storage Temperature Range

°C

Soldering Temperature, for 10 seconds (1.6mm from case)

300

Thermal Resistance

Symbol

Parameter

Junction-to-Case 

Typ.

–––

Max.

1.9

Units

R_JC

R_JA

Junction-to-Ambient ( PCB Mount) 

Junction-to-Ambient

°C/W

110

HEXFET® is a registered trademark of Infineon.

*Qualification standards can be found at www.infineon.com

2015-10-29

AUIRLR3410

Static @ T_J= 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

100 ––– –––

––– 0.122 ––– V/°C Reference to 25°C, I_D= 1mA

Conditions

V_(BR)DSS

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

V_GS= 0V, I_D= 250µA

V_(BR)DSS/T_J

––– ––– 0.105

––– ––– 0.125

––– ––– 0.155

V_GS= 10V, I_D= 10A 

R_DS(on)

Static Drain-to-Source On-Resistance

V_GS= 5.0V, I_D= 10A 

_GS= 4.0V, I_D= 9.0A 



V_GS(th)

gfs

Gate Threshold Voltage

Forward Trans conductance

1.0

7.7

––– –––

––– ––– 250

––– ––– 100

––– ––– -100

–––

––– –––

2.0

V_DS= V_GS, I_D= 250µA

V_DS= 25V, I_D= 9.0A 

V_DS= 100 V, V_GS= 0V

I_DSS

I_GSS

Drain-to-Source Leakage Current

µA

V_DS= 80V,V_GS= 0V,T_J=150°C

_GS= 16V

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

V_GS= -16V

Dynamic Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Q_g

Q_gs

Q_gd

t_d(on)

t_r

Total Gate Charge

Gate-to-Source Charge

Gate-to-Drain Charge

Turn-On Delay Time

Rise Time

––– –––

4.8

–––

I_D= 9.0A

nC V_DS= 80V

V_GS= 5.0V

–––

7.2

V_DD= 50V

I_D= 9.0A

R_G= 6.0

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

V_GS= 5.0V

Between lead,

6mm (0.25in.)

from package

and center of die contact

L_D

L_S

Internal Drain Inductance

Internal Source Inductance

–––

4.5

7.5

–––

C_iss

C_oss

C_rss

Input Capacitance

Output Capacitance

Reverse Transfer Capacitance

––– 800 –––

––– 160 –––

V_GS= 0V

pF V_DS= 25V

ƒ = 1.0MHz

–––

Diode Characteristics

Parameter

Min. Typ. Max. Units

Conditions

Continuous Source Current

(Body Diode)

Pulsed Source Current

(Body Diode)

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Forward Turn-On Time

MOSFET symbol

showing the

integral reverse

p-n junction diode.

T_J= 25°C,I_S= 9.0A,V_GS= 0V 

I_S

––– –––

I_SM

––– –––

V_SD

t_rr

Q_rr

t_on

1.3

––– 140 210

ns T_J= 25°C ,I_F= 9.0A

––– 740 1100 nC di/dt = 100A/µs

Intrinsic turn-on time is negligible (turn-on is dominated by L_S+L_D)

Notes:

 Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11)

 V_DD= 25V, starting T_J= 25°C, L = 3.1mH, R_G= 25, I_AS= 9.0A, V_GS=10V. (See fig. 12)

 I_SD9.0A, di/dt 540A/µs, V_DDV_(BR)DSS, T_J 175°C.

 Pulse width 300µs; duty cycle  2%.

Uses IRL530N data and test conditions.

This is applied for L_Sof D-PAK is measured between lead and center of die contact.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to

application note #AN-994 .

 R_is measured at T_Japproximately 90°C.

2015-10-29

AUIRLR3410

100

VGS

15V

VGS

15V

TOP

12V

10V

8.0V

6.0V

4.0V

3.0V

8.0V

6.0V

4.0V

3.0V

BOTTOM 2.5V

2.5V

20µs PULSE WIDTH

= 175°C

= 25°C

0.1

100

0.1

100

, Drain-to-Source Voltage (V)

Fig. 2 Typical Output Characteristics

Fig. 1 Typical Output Characteristics

100

3.0

2.5

2.0

1.5

1.0

0.5

0.0

= 15A

T_J= 25°C

T_J= 175°C

V _DS= 50V

20µs PULSE WIDTH

= 10V

0.1

₁₀A

-60 -40 -20

20 40 60 80 100 120 140 160 180

T , Junction Temperature (°C)

V_GS, Gate-to-Source Voltage (V)

Fig. 4 Normalized On-Resistance

Fig. 3 Typical Transfer Characteristics

Vs. Temperature

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AUIRLR3410

1400

1200

1000

800

600

400

200

= 0V,

f = 1MHz

= 9.0A

iss

rss

oss

= C + C

SHORTED

= 80V

= 50V

= 20V

= C

= C + C

iss

oss

rss

FOR TEST CIRCUIT

SEE FIGURE 13

100

, Drain-to-Source Voltage (V)

Q , Total Gate Charge (nC)

Fig 5. Typical Capacitance vs.

Fig 6. Typical Gate Charge vs.

Drain-to-Source Voltage

Gate-to-Source Voltage

100

1000

100

OPERATION IN THIS AREA LIMITED

BY R

DS(on)

T = 175°C

10µs

T = 25°C

100µs

1ms

= 25°C

= 175°C

= 0V

Single Pulse

10ms

1000

0.4

0.6

0.8

1.0

1.2

1.4

100

, Drain-to-Source Voltage (V)

, Source-to-Drain Voltage (V)

Fig. 7 Typical Source-to-Drain Diode

Fig 8. Maximum Safe Operating Area

2015-10-29

Forward Voltage

AUIRLR3410

Fig 10a. Switching Time Test Circuit

100

125

150

175

, Case Temperature ( C)

Fig 9. Maximum Drain Current Vs.

Case Temperature

Fig 10b. Switching Time Waveforms

D = 0.50

0.20

0.10

0.05

0.1

0.02

0.01

SINGLE PULSE

(THERMAL RESPONSE)

Notes:

1. Duty factor D =

t / t

2. Peak T =P

x Z

+ T

thJC C

0.01

0.00001

0.0001

0.001

0.01

0.1

t , Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

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AUIRLR3410

350

300

250

200

150

100

TOP

3.7A

6.4A

BOTTOM 9.0A

15V

DRIVER

D.U.T

20V

0.01



= 25V

175

Fig 12a. Unclamped Inductive Test Circuit

100

125

150

Starting T , Junction Temperature (°C)

(BR)DSS

Fig 12c. Maximum Avalanche Energy

vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Vds

Vgs

Vgs(th)

Qgs1

Qgs2

Qgd

Qgodr

Fig 13b. Gate Charge Test Circuit

Fig 13a. Gate Charge Waveform

2015-10-29

AUIRLR3410

Fig 14. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs

2015-10-29

AUIRLR3410

D-Pak (TO-252AA) Package Outline (Dimensions are shown in millimeters (inches))

D-Pak (TO-252AA) Part Marking Information

Part Number

AUIRLR3410

Date Code

YWWA

IR Logo

Y= Year

WW= Work Week



Lot Code

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

2015-10-29

AUIRLR3410

D-Pak (TO-252AA) Tape & Reel Information (Dimensions are shown in millimeters (inches))

TRL

TRR

16.3 ( .641 )

15.7 ( .619 )

16.3 ( .641 )

15.7 ( .619 )

12.1 ( .476 )

11.9 ( .469 )

8.1 ( .318 )

7.9 ( .312 )

FEED DIRECTION

NOTES :

1. CONTROLLING DIMENSION : MILLIMETER.

2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).

3. OUTLINE CONFORMS TO EIA-481 & EIA-541.

13 INCH

16 mm

NOTES :

1. OUTLINE CONFORMS TO EIA-481.

Note: For the most current drawing please refer to IR website at http://www.irf.com/package/

2015-10-29

AUIRLR3410

Qualification Information

Qualification Level

Automotive

(per AEC-Q101)

Comments: This part number(s) passed Automotive qualification. Infineon’s

Industrial and Consumer qualification level is granted by extension of the higher

Automotive level.

D-Pak

MSL1

Class M4^†

Moisture Sensitivity Level

Machine Model

AEC-Q101-002

Class H1C^†

AEC-Q101-001

Class C5^†

Human Body Model

ESD

Charged Device Model

AEC-Q101-005

Yes

RoHS Compliant

† Highest passing voltage.

Revision History

Date

Comments

 Added "Logic Level Gate Drive" bullet in the features section on page 1.

 Updated data sheet with new IR corporate template.

 Updated datasheet with corporate template

3/17/2014

10/29/2015

 Corrected ordering table on page 1.

Published by

Infineon Technologies AG

81726 München, Germany

IMPORTANT NOTICE

The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics

(“Beschaffenheitsgarantie”). With respect to any examples, hints or any typical values stated herein and/or any

information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and

liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third

party.

In addition, any information given in this document is subject to customer’s compliance with its obligations stated in this

document and any applicable legal requirements, norms and standards concerning customer’s products and any use of

the product of Infineon Technologies in customer’s applications.

The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of

customer’s technical departments to evaluate the suitability of the product for the intended application and the

completeness of the product information given in this document with respect to such application.

For further information on the product, technology, delivery terms and conditions and prices please contact your nearest

Infineon Technologies office (www.infineon.com).

WARNINGS

Due to technical requirements products may contain dangerous substances. For information on the types in question

please contact your nearest Infineon Technologies office.

Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized

representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a

failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.

2015-10-29

AUIRLR3410TR [INFINEON]

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