AUIRFS3004-7TRR [INFINEON]
Advanced Process Technology Ultra Low On-Resistance; 先进的工艺技术超低导通电阻
| 型号： | AUIRFS3004-7TRR |
| 厂家： | 
Infineon |
| 描述： | Advanced Process Technology Ultra Low On-Resistance |
| 文件： | 总12页 (文件大小：379K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97704A
AUTOMOTIVE GRADE
AUIRFS3004-7P
HEXFET® Power MOSFET
Features
l
l
l
l
l
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●
Advanced Process Technology
D
VDSS
RDS(on) typ.
40V
0.90m
1.25m
400A
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
max.
G
ID
ID
(Silicon Limited)
240A
S
(Package Limited)
Description
Specifically designed for Automotive applications, this
HEXFET® Power MOSFET utilizes the latest processing
techniques to achieve extremely low on-resistance per
silicon area. Additional features of this design are a 175°C
junction operating temperature, fast switching speed and
improved repetitive avalanche rating. These features
combine to make this design an extremely efficient and
reliable device for use in Automotive applications such as
Electric Power Steering, Battery Switch, SMPS and other
heavy loads.
D
S
S
S
S
S
G
D2Pak 7 Pin
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Parameter
Max.
400
Units
A
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
280
240
1610
Pulsed Drain Current
PD @TC = 25°C
W
380
Maximum Power Dissipation
Linear Derating Factor
2.5
W/°C
V
VGS
EAS
IAR
± 20
290
Gate-to-Source Voltage
Single Pulse Avalanche Energy (Thermally limited)
mJ
A
Avalanche Current
See Fig. 14, 15, 22a, 22b
Repetitive Avalanche Energy
EAR
mJ
2.0
Peak Diode Recovery
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
°C
Storage Temperature Range
300
Soldering Temperature, for 10 seconds (1.6mm from case)
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.40
40
Units
°C/W
RJC
Junction-to-Case
RJA
–––
Junction-to-Ambient (PCB Mount)
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
www.irf.com
1
11/29/11
AUIRFS3004-7P
Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
V(BR)DSS/TJ
RDS(on)
VGS(th)
gfs
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
40 ––– –––
––– 0.038 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250μA
V
––– 0.90 1.25
2.0 ––– 4.0
1300 ––– –––
VGS = 10V, ID = 195A
VDS = VGS, ID = 250μA
VDS = 10V, ID = 195A
m
V
Forward Transconductance
S
RG
Internal Gate Resistance
–––
2.0
–––
20
μA
IDSS
Drain-to-Source Leakage Current
––– –––
VDS = 40V, VGS = 0V
––– ––– 250
––– ––– 100
––– ––– -100
VDS = 40V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA VGS = 20V
VGS = -20V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max. Units
––– 160 240 nC ID = 180A
DS =20V
VGS = 10V
ID = 180A, VDS =0V, VGS = 10V
ns VDD = 26V
Conditions
Qg
Total Gate Charge
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
42
65
95
23
–––
–––
–––
–––
V
Qgd
Qsync
td(on)
tr
––– 240 –––
––– 91 –––
ID = 240A
td(off)
Turn-Off Delay Time
Fall Time
RG = 2.7
tf
––– 160 –––
––– 9130 –––
––– 2020 –––
––– 990 –––
––– 2590 –––
––– 2650 –––
VGS = 10V
Ciss
Input Capacitance
pF VGS = 0V
VDS = 25V
Coss
Output Capacitance
Reverse Transfer Capacitance
Crss
ƒ = 1.0 MHz, See Fig. 5
Coss eff. (ER)
Coss eff. (TR)
VGS = 0V, VDS = 0V to 32V , See Fig. 11
VGS = 0V, VDS = 0V to 32V
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
IS
D
Continuous Source Current
––– –––
A
400
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
G
ISM
––– ––– 1610
A
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
–––
–––
–––
V
TJ = 25°C, IS = 195A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 34V,
–––
–––
–––
–––
–––
49
51
37
41
3.2
ns
IF = 240A
di/dt = 100A/μs
Qrr
Reverse Recovery Charge
nC
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ISD 240A, di/dt 740A/μs, VDD V(BR)DSS, TJ 175°C.
ꢀ Pulse width 400μs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 240A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.01mH
RG = 25, IAS = 240A, VGS =10V. Part not recommended for use
above this value .
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
R is measured at TJ approximately 90°C.
RJC value shown is at time zero.
2
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AUIRFS3004-7P
Qualification Information†
Automotive
††
(per AEC-Q101)
Qualification Level
Comments: This part number(s) passed Automotive qualification. IR’s
Industrial and Consumer qualification level is granted by extension of the
higher Automotive level.
D2 PAK - 7 Pin
MSL1
Class M4 (+/- 800V)†††
Machine Model
AEC-Q101-002
Class H3A (+/- 6000V)†††
AEC-Q101-001
Human Body Model
ESD
Class C5 (+/- 2000V)†††
AEC-Q101-005
Charged Device Model
Yes
RoHS Compliant
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/
Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
Highest passing voltage.
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3
AUIRFS3004-7P
1000
100
10
1000
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
100
10
1
BOTTOM
BOTTOM
4.5V
60μs PULSE WIDTH
60μs PULSE WIDTH
4.5V
Tj = 175°C
Tj = 25°C
0.1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.0
1.5
1.0
0.5
I
= 195A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
60μs PULSE WIDTH
0.1
3
4
5
6
7
8
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
14.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 180A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
12.0
= C
rss
oss
gd
= C + C
V
V
= 32V
= 20V
DS
DS
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
oss
C
rss
100
0
50
100
150
200
250
1
10
, Drain-to-Source Voltage (V)
100
Q , Total Gate Charge (nC)
V
DS
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
4
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AUIRFS3004-7P
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100μsec
T
= 25°C
J
1msec
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
DC
V
= 0V
GS
0.1
1
0.0
0.5
1.0
1.5
2.0
0
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
420
360
300
240
180
120
60
50
48
46
44
42
40
Id = 5mA
Limited By Package
0
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T , Temperature ( °C )
C
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1200
I
D
TOP
44A
80A
BOTTOM 240A
1000
800
600
400
200
0
-5
0
5
10 15 20 25 30 35 40 45
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
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5
AUIRFS3004-7P
1
D = 0.50
0.1
0.01
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) i (sec)
0.00757 0.000006
J J
C
0.06508 0.000064
0.18313 0.001511
0.14378 0.009800
11
Ci= iRi
2 2
33
44
0.02
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
320
280
240
200
160
120
80
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
TOP
BOTTOM 1.0% Duty Cycle
= 240A
Single Pulse
I
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
D
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
40
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
6
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AUIRFS3004-7P
10
9
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
I = 96A
F
V
= 34V
R
T = 25°C
J
8
T = 125°C
J
7
6
I
I
I
= 250μA
= 1.0mA
= 1.0A
D
D
D
5
4
3
2
100
200
300
400
500
-75 -50 -25
0
25 50 75 100 125 150175 200
di /dt (A/μs)
T , Temperature ( °C )
F
J
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
140
12
I = 96A
I = 144A
F
F
11
V
= 34V
V
= 34V
R
R
120
100
80
10
9
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
8
7
6
60
5
4
40
3
20
2
100
200
300
400
500
100
200
300
400
500
di /dt (A/μs)
di /dt (A/μs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
180
I = 144A
F
V
160
140
120
100
80
= 34V
R
T = 25°C
J
T = 125°C
J
60
40
20
100
200
300
400
500
di /dt (A/μs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
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7
AUIRFS3004-7P
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple
5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width µs
Duty Factor
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50K
.2F
12V
.3F
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
8
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AUIRFS3004-7P
D2Pak - 7 Pin Package Outline
Dimensions are shown in millimeters (inches)
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
AUIRFS3004-7P
D2Pak - 7 Pin Part Marking Information
Part Number
AUS3004-7P
Date Code
Y= Year
WW= Work Week
A= Automotive, LeadFree
IR Logo
YWWA
XX or XX
Lot Code
D2Pak - 7 Pin Tape and Reel
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
10
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AUIRFS3004-7P
Ordering Information
Base part number
Package Type
Standard Pack
Form
Complete Part Number
Quantity
75
AUIRFS3004-7P
D2Pak 7 Pin
Tube
AUIRFS3004-7P
AUIRFS3004-7TRL
AUIRFS3004-7TRR
Tape and Reel Left
Tape and Reel Right
800
800
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11
AUIRFS3004-7P
IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries (IR) reserve the right to make
corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or
services without notice. Part numbers designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards
to product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions of sale supplied at the time of order
acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with IR’s standard warranty. Testing
and other quality control techniques are used to the extent IR deems necessary to support this warranty. Except where mandated by government
requirements, testing of all parameters of each product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using IR
components. To minimize the risks with customer products and applications, customers should provide adequate design and operating safeguards.
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http://www.irf.com/technical-info/
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101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
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