AFL283R3S [INFINEON]
HYBRID-HIGH RELIABILITY DC/DC CONVERTER;
| 型号： | AFL283R3S |
| 厂家： | 
Infineon |
| 描述： | HYBRID-HIGH RELIABILITY DC/DC CONVERTER |
| 文件： | 总10页 (文件大小：194K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-94525D
AFL2803R3S
28V Input, 3.3V Output
HYBRID-HIGH RELIABILITY
DC/DC CONVERTER
Description
The AFL Series of DC/DC converters feature high power
density with no derating over the full military temperature
range. This device is offered as part of a complete family
of converters providing single and dual output voltages
originally created to operate over a nominal input
voltage range of 28V to 270V with output power ranging
from 66W to 120W. For applications requiring higher
output power, multiple converters can be operated in
parallel. The internal current sharing circuits assure
equal current distribution among the paralleled
converters. This series incorporates International
Rectifier’s proprietary magnetic pulse feedback
technology providing optimum dynamic line and load
regulation response. This feedback system samples
the output voltage at the pulse width modulator fixed
clock frequency, nominally 550KHz. Multiple converters
can be synchronized to a system clock in the 500KHz
to 700KHz range or to the synchronization output of
one converter. Undervoltage lockout, primary and
secondary referenced inhibit, soft-start and load fault
protection are provided on all models.
AFL
Features
n 16V To 40V Input Range
n 3.3V Output
n High Power Density - 50W/in
n 66W Output Power
n Parallel Operation with Stress and Current
Sharing
n Low Profile (0.380") Seam Welded Package
n Ceramic Feedthru Copper Core Pins
n High Efficiency - to 74%
n Full Military Temperature Range
n Continuous Short Circuit and Overload Protection
n Remote Sensing Terminals
n Primary and Secondary Referenced
Inhibit Functions
3
n Line Rejection > 40dB - DC to 50KHz
n External Synchronization Port
n Fault Tolerant Design
n Dual Output Versions Available
n Standard Microcircuit Drawing Available
These converters are hermetically packaged in two
enclosure variations, utilizing copper core pins to
minimize resistive DC losses. Three lead styles are
available, each fabricated with International Rectifier’s
rugged ceramic lead-to-package seal assuring long term
hermeticity in the most harsh environments.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are fabricated utilizing DSCC
qualified processes. For available screening options,
refer to device screening table in the data sheet.
Variations in electrical, mechanical and screening can
be accommodated. Contact IR Santa Clara for special
requirements.
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1
03/08/07
AFL2803R3S
Specifications
Absolute Maximum Ratings
Input voltage
-0.5V to +50VDC
300°C for 10 seconds
-55°C to +125°C
-65°C to +135°C
Soldering temperature
Operating case temperature
Storage case temperature
Electrical Performance Characteristics -55°C < TCASE < +125°C, 16V< VIN < 40V unless otherwise specified.
Group A
Parameter
INPUT VOLTAGE
Subgroups
Test Conditions
Min
Nom
Max
Unit
Note 6
= 28 Volts, 100% Load
16
28
40
V
OUTPUT VOLTAGE
V
IN
1
3.27
3.23
3.30
3.33
3.37
V
2, 3
OUTPUT CURRENT
VIN = 16, 28, 40 Volts,, Note 6
20
66
A
W
OUTPUT POWER
Note 6
Note 1
MAXIMUM CAPACITIVE LOAD
4
10,000
-0.015
µF
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
VIN = 28 Volts, 100% Load
Note 1, 6
+0.015
%/°C
OUTPUT VOLTAGE REGULATION
1, 2, 3
1, 2, 3
No Load, 50% Load, 100% Load
VIN = 16, 28, 40 Volts,
-20
-35
+20
+35
mV
Line
Load
OUTPUT RIPPLE VOLTAGE
VIN = 16, 28, 40 Volts,, 100% Load,
BW = 10MHz
1, 2, 3
30
mV
pp
pp
VIN = 28 Volts,
INPUT CURRENT
I
= 0
1
80
100
5.0
50
No Load
OUT
2, 3
mA
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
1, 2, 3
1, 2, 3
Inhibit 1
Inhibit 2
INPUT RIPPLE CURRENT
VIN = 28 Volts, 100% Load
B.W. = 10MHz
1, 2, 3
60
mA
CURRENT LIMIT POINT
V
= 90% V
NOM
Note 5
OUT
1
2
3
115
105
125
125
115
140
Expressed as a Percentage
of Full Rated Load
%
LOAD FAULT POWER DISSIPATION
VIN = 28 Volts,
1, 2, 3
1, 2, 3
1, 2, 3
1
33
W
%
Overload or Short Circuit
EFFICIENCY
VIN = 28 Volts, 100% Load
72
74
SWITCHING FREQUENCY
ISOLATION
500
100
550
600
KHz
MΩ
Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
MTBF
MIL-HDBK-217F, AIF @ T = 40°C
C
300
KHrs
For Notes to Specifications, refer to page 3
2
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AFL2803R3S
Elecrical Performance Characteristics (Continued)
Group A
Parameter
ENABLE INPUTS
Subgroups
Test Conditions
Min
Nom
Max
Unit
(Inhibit Function)
1, 2, 3
1, 2, 3
Logical Low, Pin 4 or Pin 12
-0.5
2.0
0.8
100
50
V
µA
V
Converter Off
Sink Current
Converter On
Sink Current
Note 1
Logical High, Pin 4 and Pin 12 - Note 9
Note 1
100
µA
SYNCHRONIZATION INPUT
Frequency Range
1, 2, 3
1, 2, 3
1, 2, 3
500
2.0
-0.5
700
10
0.8
100
80
KHz
V
V
ns
%
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Note 1
Note 1
20
Pulse Duty Cycle
LOAD TRANSIENT RESPONSE
Note 2, 8
⇔
4, 5, 6
4, 5, 6
Load Step 50%
100%
-450
-450
450
200
mV
Amplitude
Recovery
µs
4, 5, 6
4, 5, 6
Load Step 10% ⇔ 50%
450
400
mV
µs
Amplitude
Recovery
LINE TRANSIENT RESPONSE
Note 1, 2, 3
-500
500
500
mV
µs
Amplitude
Recovery
V
Step = 80 ⇔ 160 Volts
IN
TURN-ON CHARACTERISTICS
VIN = 16, 28, 40 Volts,. Note 4
Overshoot
Delay
4, 5, 6
4, 5, 6
Enable 1, 2 on. (Pins 4, 12 high or open)
250
10
mV
ms
LOAD FAULT RECOVERY
LINE REJECTION
Same as Turn On Characteristics.
MIL-STD-461, CS101, 30Hz to 50KHz
Note 1
40
50
dB
Notes to Specifications:
1. Parameters not 100% tested but are guaranteed to the limits specified in the table.
2. Recovery time is measured from the initiation of the transient to where VOUT has returned to within ±1.0% of
VOUT at 50% load.
3. Line transient transition time ≥ 100µs.
4. Turn-on delay is measured with an input voltage rise time of between 100V and 500V per millisecond.
5. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
6. Parameter verified as part of another test.
7. All electrical tests are performed with the remote sense leads connected to the output leads at the load.
8. Load transient transition time ≥ 10µs.
9. Enable inputs internally pulled high. Nominal open circuit voltage ≈ 4.0VDC.
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3
AFL2803R3S
Block Diagram
Figure I. Single Output
Input
Filter
1
4
5
+ Input
Output
Filter
+Output
+Sense
7
Primary
Bias Supply
Enable 1
10
Current
Sense
Sync Output
Share
Amplifier
Control
11 Share
Error
Sync Input
Case
6
3
2
Amp
& Ref
Enable 2
FB
12
Sense
Amplifier
9
8
Sense Return
Output Return
Input Return
Circuit Operation and Application Information respective output terminals at the converter.
Figure III. illustrates a typical application.
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of
the device is initiated when a DC voltage whose magnitude Inhibiting Converter Output (Enable)
is within the specified input limits is applied between pins 1
As an alternative to application and removal of the DC
voltage to the input, the user can control the converter
output by providing TTL compatible, positive logic signals
to either of two enable pins (pin 4 or 12). The distinction
between these two signal ports is that enable 1 (pin 4) is
referenced to the input return (pin 2) while enable 2 (pin 12)
is referenced to the output return (pin 8). Thus, the user
has access to an inhibit function on either side of the isolation
barrier. Each port is internally pulled “high” so that when
not used, an open connection on both enable pins permits
normal converter operation. When their use is desired, a
logical “low” on either port will shut the converter down.
and 2. If pin 4 is enabled (at a logical 1 or open) the primary
bias supply will begin generating a regulated housekeeping
voltage bringing the circuitry on the primary side of the
converter to life. Two power MOSFETs used to chop the
DC input voltage into a high frequency square wave, apply
this chopped voltage to the power transformer. As this
switching is initiated, a voltage is impressed on a second
winding of the power transformer which is then rectified and
applied to the primary bias supply. When this occurs, the
input voltage is shut out and the primary bias voltage
becomes exclusively internally generated.
The switched voltage impressed on the secondary output
transformer winding is rectified and filtered to provide the
converter output voltage. An error amplifier on the secondary
side compares the output voltage to a precision reference
and generates an error signal proportional to the difference.
This error signal is magnetically coupled through the
feedback transformer into the controller section of the
converter varying the pulse width of the square wave signal
driving the MOSFETs, narrowing the width if the output
voltage is too high and widening it if it is too low.
Figure II. Enable Input Equivalent Circuit
+5.6V
100K
1N4148
Pin 4 or
Pin 12
Disable
290K
2N3904
Remote Sensing
Connection of the + and - sense leads at a remotely locat-
led load permits compensation for resistive voltage drop
between the converter output and the load when they are
physically separated by a significant distance. This
connection allows regulation to the placard voltage at the
point of application.When the remote sensing features is
not used, the sense leads should be connected to their
150K
Pin 2 or
Pin 8
4
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AFL2803R3S
Internally, these ports differ slightly in their function. In use,
a low on Enable 1 completely shuts down all circuits in the
converter while a low on Enable 2 shuts down the secondary
side while altering the controller duty cycle to near zero.
Externally, the use of either port is transparent to the user
save for minor differences in idle current. (See specification
table).
high level of +2.0V. The sync output of another converter
which has been designated as the master oscillator provides
a convenient frequency source for this mode of operation.
When external synchronization is not required, the sync in
pin should be left unconnected thereby permitting the
converter to operate at its’ own internally set frequency.
The sync output signal is a continuous pulse train set at
550 ± 50KHz, with a duty cycle of 15 ± 5.0%. This signal is
referenced to the input return and has been tailored to be
compatible with the AFL sync input port. Transition times
are less than 100ns and the low level output impedance is
less than 50Ω. This signal is active when the DC input
voltage is within the specified operating range and the
converter is not inhibited. This output has adequate drive
reserve to synchronize at least five additional converters.
A typical synchronization connection option is illustrated in
Figure III.
Synchronization of Multiple Converters
When operating multiple converters, system requirements
often dictate operation of the converters at a common
frequency. To accommodate this requirement, the AFL
series converters provide both a synchronization input and
output.
The sync input port permits synchronization of an AFL
connverter to any compatible external frequency source
operating between 500KHz and 700KHz. This input signal
should be referenced to the input return and have a 10% to
90% duty cycle. Compatibility requires transition times less
than100ns, maximum low level of +0.8V and a minimum
Figure III. Preferred Connection for Parallel Operation
1
12
Power
Input
Enable 2
Vin
Rtn
Share
+ Sense
- Sense
Return
Case
AFL
AFL
Enable 1
Sync Out
Sync In
+ Vout
6
1
7
Optional
Synchronization
Connection
Share Bus
12
Enable 2
Share
Vin
Rtn
Case
+ Sense
- Sense
Return
+ Vout
Enable 1
Sync Out
Sync In
to Load
7
6
1
12
Enable 2
Share
Vin
Rtn
Case
+ Sense
- Sense
Return
+ Vout
AFL
Enable 1
Sync Out
Sync In
7
6
(Other Converters)
Parallel Operation-Current and Stress Sharing
AFL series operating in the parallel mode is that in addition
to sharing the current, the stress induced by temperature
will also be shared. Thus if one member of a paralleled set
is operating at a higher case temperature, the current it
provides to the load will be reduced as compensation for
the temperature induced stress on that device.
Figure III. illustrates the preferred connection scheme for
operation of a set of AFL converters with outputs operating
in parallel. Use of this connection permits equal sharing of a
load current exceeding the capacity of an individual AFL
among the members of the set. An important feature of the
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5
AFL2803R3S
When operating in the shared mode, it is important that for minor variations of either surface. While other available
symmetry of connection be maintained as an assurance of types of heat conductive materials and compounds may
optimum load sharing performance. Thus, converter outputs provide similar performance, these alternatives are often
should be connected to the load with equal lengths of wire of
the same gauge and sense leads from each converter should
be connected to a common physical point, preferably at the
load along with the converter output and return leads. All
converters in a paralleled set must have their share pins
connected together. This arrangement is diagrammatically
illustrated in Figure III. showing the outputs and sense pins
connected at a star point which is located close as possible
to the load.
less convenient and are frequently messy to use.
A conservative aid to estimating the total heat sink surface
area (AHEAT SINK) required to set the maximum case
temperature rise (∆T) above ambient temperature is given
by the following expression:
−1.43
⎧
⎨
⎩
⎫
⎬
⎭
∆T
A
HEAT SINK
≈
− 3.0
0.85
As a consequence of the topology utilized in the current
sharing circuit, the share pin may be used for other functions.
In applications requiring a single converter, the voltage
appearing on the share pin may be used as a “current
monitor”. The share pin open circuit voltage is nominally
+1.00V at no load and increases linearly with increasing
output current to +2.20V at full load. The share pin voltage
is referenced to the output return pin.
80P
where
∆T = Case temperature rise above ambient
⎧
⎨
⎩
⎫
⎭
1
⎬
−1
P = Device dissipation in Watts = POUT
Eff
As an example, it is desired to maintain the case temperature
of an AFL27015S at ≤ +85°C in an area where the ambient
temperature is held at a constant +25°C; then
Thermal Considerations
Because of the incorporation of many innovative
technological concepts, the AFL series of converters is
capable of providing very high output power from a package
of very small volume. These magnitudes of power density
can only be obtained by combining high circuit efficiency
with effective methods of heat removal from the die junctions.
This requirement has been effectively addressed inside the
device; but when operating at maximum loads, a significant
amount of heat will be generated and this heat must be
conducted away from the case. To maintain the case
temperature at or below the specified maximum of 125°C,
this heat must be transferred by conduction to an
appropriate heat dissipator held in intimate contact with the
converter base-plate.
∆T = 85 - 25 = 60°C
From the Specification Table, the worst case full load
efficiency for this device is 83%; therefore the power
dissipation at full load is given by
⎧
⎨
⎫
⎬
1
(
)
P = 120•
−1 = 120• 0.205 = 24.6W
⎩.83
⎭
and the required heat sink area is
−1.43
⎧
⎨
⎩
⎫
⎬
⎭
60
− 3.0 = 71 in2
Because effectiveness of this heat transfer is dependent
on the intimacy of the baseplate/heatsink interface, it is
strongly recommended that a high thermal conductivity heat
transferance medium is inserted between the baseplate
and heatsink. The material most frequently utilized at the
factory during all testing and burn-in processes is sold under
A
HEAT SINK
=
0.85
80 • 24.6
Thus, a total heat sink surface area (including fins, if any) of
2
71 in in this example, would limit case rise to 60°C above
ambient. A flat aluminum plate, 0.25" thick and of approximate
2
1
dimension 4" by 9" (36 in per side) would suffice for this
the trade name of Sil-Pad® 400 . This particular product
application in a still air environment. Note that to meet the
criteria in this example, both sides of the plate require
unrestricted exposure to the ambient air.
is an insulator but electrically conductive versions are also
available. Use of these materials assures maximum surface
contact with the heat dissipator thereby compensating
1
Sil-Pad is a registered Trade Mark of Bergquist, Minneapolis, MN
6
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AFL2803R3S
Finding a resistor value for a particular output voltage, is
simply a matter of substituting the desired output voltage
and the nominal device voltage into the equation and solving
Input Filter
The AFL2803R3S series converters incorporate a two stage
LC input filter whose elements dominate the input load
impedance characteristic at turn-on. The input circuit is as
shown in Figure IV.
for the corresponding resistor value.
Figure V. Connection for VOUT Adjustment
Figure IV. Input Filter Circuit
Enable 2
900nH
130nH
Share
RADJ
Pin 1
Pin 2
+ Sense
AFL2803R3S
- Sense
Return
To Load
+ Vout
6 µfd
11.2 µfd
Caution: Do not set Radj < 500Ω
Attempts to adjust the output voltage to a value greater than
120% of nominal should be avoided because of the potential
of exceeding internal component stress ratings and
subsequent operation to failure. Under no circumstance
should the external setting resistor be made less than 500Ω.
By remaining within this specified range of values, completely
safe operation fully within normal component derating limits
is assured.
Undervoltage Lockout
A minimum voltage is required at the input of the converter
to initiate operation. This voltage is set to 14 ± 0.5V. To
preclude the possibility of noise or other variations at the
input falsely initiating and halting converter operation, a
hysteresis of approximately 1.0V is incorporated in this
circuit. Thus if the input voltage droops to 13 ± 0.5V, the
converter will shut down and remain inoperative until the
input voltage returns to ≈ 14V.
Examination of the equation relating output voltage and
resistor value reveals a special benefit of the circuit topology
utilized for remote sensing of output voltage in the AFL28XXS
series of converters. It is apparent that as the resistance
increases, the output voltage approaches the nominal set
value of the device. In fact the calculated limiting value of
output voltage as the adjusting resistor becomes very large
Output VoltageAdjust
In addition to permitting close voltage regulation of remotely
located loads, it is possible to utilize the converter sense
pins to incrementally increase the output voltage over a
limited range. The adjustments made possible by this method
are intended as a means to “trim” the output to a voltage
setting for some particular application, but are not intended
to create an adjustable output converter. These output
voltage setting variations are obtained by connecting an
appropriate resistor value between the +sense and -sense
pins while connecting the -sense pin to the output return pin
as shown in Figure V. below. The range of adjustment and
corresponding range of resistance values can be determined
is ≈ 25mV above nominal device voltage.
The consequence is that if the +sense connection is
unintentionally broken, an AFL28XXS has a fail-safe output
voltage of Vout + 25mV, where the 25mV is independent of
the nominal output voltage. It can be further demonstrated
that in the event of both the + and - sense connections
being broken, the output will be limited to Vout + 440mV.
This 440mV is also essentially constant independent of the
nominal output voltage. While operation in this condition is
not damaging to the device, not at all performance
parameters will be met.
by use of the following equation.
⎧
⎨
⎩
⎫
⎬
⎭
VNOM
Radj = 100•
VOUT - VNOM -.025
Where VNOM = device nominal output voltage, and
VOUT = desired output voltage
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7
AFL2803R3S
Mechanical Outlines
Case X
Case W
Pin Variation of Case Y
3.000
2.760
ø 0.128
0.050
0.050
0.250
0.250
1.000
1.000
Ref
1.260 1.500
0.200 Typ
Non-cum
Pin
ø 0.040
Pin
ø 0.040
0.220
2.500
0.220
0.525
2.800
2.975 max
0.238 max
0.42
0.380
Max
0.380
Max
Case Y
Case Z
Pin Variation of Case Y
1.150
0.300
ø 0.140
0.25 typ
0.050
0.050
0.250
0.250
1.000
Ref
1.500 1.750 2.00
1.000
Ref
0.200 Typ
Non-cum
Pin
ø 0.040
Pin
ø 0.040
0.220
0.220
1.750
2.500
0.375
0.36
2.800
2.975 max
0.525
0.238 max
0.380
Max
0.380
Max
Tolerances, unless otherwise specified: .XX
.XXX
=
=
±0.010
±0.005
BERYLLIAWARNING: These converters are hermetically sealed; however they contain BeO substrates and should not be ground or subjected to any other
operations including exposure to acids, which may produce Beryllium dust or fumes containing Beryllium
8
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AFL2803R3S
Pin Designation
Designation
Pin #
1
2
+ Input
Input Return
Case Ground
Enable 1
3
4
5
Sync Output
Sync Input
+ Output
6
7
8
Output Return
Sense Return
+ Sense
9
10
11
12
Share
Enable 2
Standard Microcircuit Drawing Equivalence Table
Standard Microcircuit
Drawing Number
5962-99552
IR Standard
Part Number
AFL2803R3S
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9
AFL2803R3S
Device Screening
Requirement
MIL-STD-883 Method No Suffix
ES
HB
CH
Temperature Range
Element Evaluation
Non-Destructive
Bond Pull
-20°C to +85°C -55°C to +125°C
-55°C to +125°C -55°C to +125°C
MIL-PRF-38534
2023
N/A
N/A
N/A
N/A
Class H
N/A
N/A
N/A
Internal Visual
Temperature Cycle
Constant Acceleration
PIND
2017
1010
Yes
Cond B
500 Gs
N/A
Yes
Cond C
3000 Gs
N/A
Yes
Cond C
3000 Gs
N/A
N/A
N/A
2001, Y1 Axis
2020
N/A
Burn-In
1015
N/A
48 hrs@hi temp 160 hrs@125°C 160 hrs@125°C
Final Electrical
( Group A )
MIL-PRF-38534
& Specification
MIL-PRF-38534
1014
25°C
25°C
-55°C, +25°C,
+125°C
N/A
-55°C, +25°C,
+125°C
10%
PDA
N/A
Cond A
N/A
N/A
Cond A, C
N/A
Seal, Fine and Gross
Radiographic
External Visual
Cond A, C
N/A
Cond A, C
N/A
2012
2009
Yes
Yes
Yes
Notes:
Best commercial practice
Sample tests at low and high temperatures
-55°C to +105°C for AHE, ATO, ATW
Part Numbering
AFL 28 03R3 S
X
/CH
Screening Level
Model
(Please refer to Screening Table)
No suffix, ES, HB, CH
Input Voltage
28 = 28V
50 = 50V
120 = 120V
270 = 270V
Case Style
W, X, Y, Z
Output
S = Single
Output Voltage
03R3 = 3.3V
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
IR SANTA CLARA: 2270 Martin Av., Santa Clara, California 95050, Tel: (408) 727-0500
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 03/2007
10
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