M906-01-125.2500 [IDT]
Clock Generator, 125MHz, CQCC36, 9 X 9 MM, CERAMIC, LCC-36;
| 型号： | M906-01-125.2500 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Clock Generator, 125MHz, CQCC36, 9 X 9 MM, CERAMIC, LCC-36 |
| 文件： | 总6页 (文件大小：282K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
P r e l i m i n a r y I n f o r m a t i o n
Integrated
Circuit
Systems, Inc.
M906-01
VCSO BASED GBE CLOCK GENERATOR
GENERAL DESCRIPTION
PIN ASSIGNMENT (9 x 9 mm SMT)
The M906-01 is a PLL (Phase Locked Loop) based
clock generator that uses an
internal VCSO (Voltage Controlled
SAW Oscillator) to produce a very
low jitter output clock. It is ideal for
Gigabit Ethernet. The output clock
(frequency of 156.25 or 187.50MHz
for example) is provided from six
XTAL_2
FOUT4
nFOUT4
FOUT5
nFOUT5
VCC
nFOUT2
FOUT2
nFOUT1
FOUT1
GND
nFOUT0
FOUT0
VCC
28
29
18
17
LVPECL clock output pairs. (Specify frequency at time
of order.) The accuracy of the output frequency is
assured by the internal PLL, which phase-locks the
internal VCSO to the reference input frequency (25 or
30MHz for example). The input reference can either
be an external crystal, utilizing the internal crystal
oscillator, or a stable external clock source such as
a packaged crystal oscillator.
30
31
32
33
34
35
36
16
15
14
13
12
11
10
M906-01
( T o p V i e w )
DNC
DNC
DNC
GND
FEATURES
◆ Output clock frequency from 125MHz to 190MHz
(Consult factory for frequency availability)
Figure 1: Pin Assignment
◆ Six identical LVPECL output pairs
◆ Integrated SAW (surface acoustic wave) delay line
◆ Low jitter 0.7ps RMS (over 12kHz-20MHz)
Example Output Frequency Configurations
Ref Clock
Frequency
(MHz)
Output
Frequency1
(MHz)
PLL
Application
◆ Ideal for Gigabit Ethernet clock reference
◆ Output-to-output skew < 100ps
Ratio
20
25
30
156.25
156.25
187.50
GbE
◆ External XTAL or LVCMOS reference input
◆ Selectable external feed-through clock input
25/4
10GbE
12GbE
◆ STOP clock control (Logic 1 stops output clocks)
Table 1: Example Output Frequency Configurations
◆ Industrial temperature grade available
◆ Single 3.3V power supply
Note 1:Specify output clock frequency at time of order
◆ Small 9 x 9 mm SMT (surface mount) package
SIMPLIFIED BLOCK DIAGRAM
M906-01-156.25
VSCO
External
Crystal
LVPECL
Output
Clock Pairs
(e.g., 156.25
Frequency
Multiplying
PLL
XTAL
OSC
O
or
Divider
Reference
Clock Input
(e.g., 25 or 30MHz)
1
or 187.50MHz)
External
Loop Filter
External External
Output
Clock STOP
Control
Clock
Clock
Input
Select
Figure 2: Simplified Block Diagram
M906-01 Datasheet Rev 1.3
Revised 06Jan2004
M906-01 VCSO Based GbE Clock Generator
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
M906-01
Integrated
Circuit
Systems, Inc.
VCSO BASED
GB
E CLOCK
G
ENERATOR
P r e l i m i n a r y I n f o r m a t i o n
DETAILED BLOCK DIAGRAM
RLOOP CLOOP
RPOST
External
Loop Filter
Components
CPOST
CPOST
RLOOP CLOOP
nOP_IN OP_OUT
RPOST
M906-01
OP_IN
RIN
nOP_OUT
nVC
VC
FOUT5
Phase
Detector
SAW Delay Line
nFOUT5
XTAL_1 / REF_IN
XTAL
OSC
R Divider
R = 4
FOUT4
XTAL_2
nFOUT4
RIN
Loop Filter
Amplifier
Phase
Shifter
FOUT3
VCSO
nFOUT3
M Divider
M = 25
O
1
FOUT2
nFOUT2
Phase Locked Loop (PLL)
EXT_CLK
FOUT1
nFOUT1
EN_EXT_CLK
FOUT0
nFOUT0
STOP
Figure 3: Detailed Block Diagram
PIN DESCRIPTIONS
Number Name
1, 2, 3, 10, 14, 26 GND
I/O
Ground
Configuration
Description
Power supply ground connections.
4
9
OP_IN
nOP_IN
Input
External loop filter connections. See Figure 4,
External Loop Filter, on pg. 3.
5
8
nOP_OUT
OP_OUT
Output
6
7
nVC
VC
Input
11, 19, 33
VCC
Power
Power supply connection, connect to +3.3V.
12
13
FOUT0
nFOUT0
15
16
FOUT1
nFOUT1
17
18
FOUT2
nFOUT2
Clock output pairs, differential LVPECL output
(156.25 MHz for the M906-01-156.2500)
Output
No internal terminator
20
21
FOUT3
nFOUT3
29
30
FOUT4
nFOUT4
31
32
FOUT5
nFOUT5
Logic 1 enables the EXT_CLK input.
Use Logic 0 for normal operation.
1
23
24
25
EN_EXT_CLK
EXT_CLK
STOP
Input
Input
Input
Internal pull-down resistor
External clock feed-through: 0 to 200 MHz
Logic 1 stops clock outputs.
Use Logic 0 for normal operation.
1
Internal pull-down resistor
External crystal connection. Also accepts
LVCMOS/LVTTL compatible clock source.
1
27
XTAL_1 / REF_IN
Input
Input
Internal pull-down resistor
External crystal connection. Leave unconnected
when driving pin 27 with external clock reference.
28
XTAL_2
DNC
34, 35, 36
Do Not Connect.
Table 2: Pin Descriptions
Note 1: For typical value of internal pull-down resistor, see DC Characteristics, Pull-down on pg. 5 for typical value.
M906-01 Datasheet Rev 1.3
2 of 6
Revised 06Jan2004
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
M906-01
Integrated
Circuit
Systems, Inc.
VCSO BASED
GB
E CLOCK
G
ENERATOR
P r e l i m i n a r y I n f o r m a t i o n
For the M906-01-156.2500 (see “Ordering Information” on pg. 6):
FUNCTIONAL DESCRIPTION
The M906-01 is a PLL (Phase Locked Loop) based
clock generator that generates output clocks
synchronized to an input reference clock.
• VCSO output frequency = 156.25MHz
• Input reference frequency = 25MHz
• M=25
• R= 4
The M906-01 combines the flexibility of a VCSO
(Voltage Controlled SAW Oscillator) with the stability of
a crystal oscillator.
Therefore, for the M906-01-156.2500:
25
---------
4
156.25MHz = 25MHz
Input Reference
M
----
The input reference can either be an external, discrete
crystal device or a stable external clock source such as
a packaged crystal oscillator:
The product of the input crystal frequency and
falls within the lock range of the VCSO.
R
External Loop Filter
• If an external crystal is used with the on-chip crystal
oscillator circuit (XTAL OSC), the external crystal
should be a parallel-resonant, fundamental mode
crystal. Apply it to the XTAL_1 / REF_IN and XTAL_2 input
pins. External crystal load capacitors are also
required.
To provide stable PLL operation, and thereby a low jitter
output clock, the M906-01 requires the use of an
external loop filter. This is provided via the provided
filter pins (see Figure 4).
Due to the differential signal path design, the
implementation requires two identical complementary
RC filters as shown here.
• If an external LVCMOS/LVTTL clock source is used,
apply it to the XTAL_1 / REF_IN input pin.
In either case, the reference clock is supplied to the
phase detector of the PLL. The M906-01 includes a
reference divider that divides the input reference
frequency by a fixed value “R” and provides the result to
the phase detector.
RLOOP CLOOP
RPOST
CPOST
CPOST
RLOOP CLOOP
nOP_IN OP_OUT
RPOST
The EX_CLK pin is available for a clock feed-through
mode for testing. See “External Clock Feed-through”
on pg. 4.
OP_IN
nOP_OUT
nVC
VC
4
9
8
5
6
7
Figure 4: External Loop Filter
The PLL
External Loop Filter Component Values
The PLL (Phase Locked Loop) includes the phase
detector, the VCSO, a feedback divider (labeled
“M Divider”), and a reference divider (“R Divider”).
PLL
Damping
R loop C loop R post C post
Bandwidth Factor
The feedback divider divides the VCSO output
frequency by a fixed value “M” to match the reference
frequency provided to the phase detector by the
reference divider.
2.1
3.3
4.4
4.2
500Hz
1.5kHz
6.4kHz
10.6kHz
1.5kΩ 4.00µF 50kΩ 3300pF
4.7kΩ 1.00µF 50kΩ 1500pF
20.0kΩ 0.10µF 20kΩ 470pF
1
33.0kΩ 0.033µF 20kΩ 470pF
By controlling the frequency and phase of the VCSO,
the phase detector precisely locks the frequency and
phase of the feedback divider output to that of the
reference divider output. This creates an output
frequency that is a multiple of the reference frequency
(which is output from the VCSO).
Table 3: External Loop Filter Component Values
Note 1: Recommended for most applications
The relationship between the VCSO output frequency,
the M Divider, the R Divider and the input reference
frequency is defined as follows:
M
R
----
Fvcso = Fxtal ×
M906-01 Datasheet Rev 1.3
3 of 6
Revised 06Jan2004
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
M906-01
Integrated
Circuit
Systems, Inc.
VCSO BASED
GB
E CLOCK
G
ENERATOR
P r e l i m i n a r y I n f o r m a t i o n
External Clock Feed-through
STOP Clock
The EXT_CLK pin provides an input for an external
single-ended clock that directly drives the LVPECL
clock outputs. In application, this may be used for
system debugging and performance evaluation.
The STOP pin puts the output clock into a static condition.
Logic 1 Output clocks are static
Logic 0 Output clocks enabled for normal operation
1. Set pin EN_EXT_CLK to Logic 1.
2. Apply an external LVCMOS/LVTTL clock source
to the EXT_CLK input pin.
Due to the fact that EXT_CLK bypasses the PLL,
any frequency between DC and 200MHz can be
used.
1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter
Rating
Unit
VI
Inputs
-0.5 to VCC +0.5
V
VO
VCC
TS
Outputs
-0.5 to VCC +0.5
4.6
V
V
Power Supply Voltage
Storage Temperature
-45 to +100
oC
Table 4: Absolute Maximum Ratings
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional operation of product at these conditions
or any conditions beyond those listed in Recommended Conditions of Operation, DC Characteristics, or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods
may affect product reliability
.
RECOMMENDED CONDITIONS OF OPERATION
Symbol Parameter
Min
Typ
Max Unit
VCC
Positive Supply Voltage
3.135
3.3
3.465
V
TA
Ambient Operating Temperature
oC
oC
0
Commercial
Industrial
+70
+85
-40
Table 5: Recommended Conditions of Operation
M906-01 Datasheet Rev 1.3
4 of 6
Revised 06Jan2004
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
M906-01
Integrated
Circuit
Systems, Inc.
VCSO BASED
GB
E CLOCK
G
ENERATOR
P r e l i m i n a r y I n f o r m a t i o n
ELECTRICAL SPECIFICATIONS
DC Characteristics
1
1
Unless stated otherwise, VCC
=
3.3V +
5
%,TA = 0 oC to +70 oC (commercial) , TA = -40 oC to +85 oC (industrial) , Output Frequency=156.25MHz1
,
LVPECL outputs terminated with 50Ω to VCC - 2V
Symbol Parameter
Power Supply VCC Positive Supply Voltage
Min
3.135
Typ
3.3
Max
3.465
Unit
V
350
ICC
Power Supply Current
mA
2
Logic Inputs
VIH
VIL
IIH
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
V
+0.3
V
cc
0.8
150
-0.3
V
EN_EXT_CLK, EXT_CLK,
STOP
µA
µA
V
IIL
-5.0
Reference
Clock
Input
VIH
VIL
IIH
(V / 2 ) +0.5
V +0.3
cc
cc
-0.3
-5.0
(V / 2) +0.5 V
cc
XTAL_1 / REF_IN
(XTAL_2 disconnected)
150
4
µA
µA
IIL
EN_EXT_CLK, EXT_CLK,
STOP, XTAL_1 / REF_IN
All Inputs
Pull-down
CIN
R
Input Capacitance, All Inputs
pF
EN_EXT_CLK, STOP
51
Internal Pull-down Resistor
Output High Voltage
kΩ
V
pulldown
Differential
Output
VOH
VOL
VP-P
V
V
-1.4
-2.0
V
V
-1.0
cc
cc
cc
FOUT, nFOUT (0-5)
Output Low Voltage
-1.7
V
cc
0.6
0.85
Peak to Peak Output Voltage
V
Table 6: DC Characteristics
Note 1: See Ordering Information on pg. 6
AC Characteristics
1
1
Unless stated otherwise, VCC
=
3.3V +
5
%,TA = 0 oC to +70 oC (commercial) , TA = -40 oC to +85 oC (industrial) , Output Frequency=156.25MHz1
,
LVPECL outputs terminated with 50Ω to VCC - 2V
Symbol Parameter
Min
125
Typ
156.25
Max
190
Unit
MHz
Test Conditions
FOUT
Output Frequency Range
25
FIN
Nominal Input Frequency, XTAL_1 / REF_IN
VCSO Pull-Range
MHz
ppm
APR
Φn
±100
±150
Single Side Band
Phase Noise
1kHz Offset
10kHz Offset
100kHz Offset
-100
-110
-134
0.7
dBc/Hz
dBc/Hz
dBc/Hz
ps
@156.25MHz
1.0
55
J(t)
tDC
tR
Jitter (rms)
12kHz to 20MHz
45
50
Output Duty Cycle, High Time
%
FOUT, nFOUT (0-1)
350
350
450
450
550
550
100
200
Output Rise Time
Output Fall Time
Output Skew
ps
ps
ps
MHz
20% to 80%
20% to 80%
FOUT, nFOUT (0-1)
Between Any Pair
EXT_CLK
tF
tS
0
EXT_CLK Frequency
Table 7: AC Characteristics
Note 1: See Ordering Information on pg. 6
M906-01 Datasheet Rev 1.3
5 of 6
Revised 06Jan2004
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
P r e l i m i n a r y I n f o r m a t i o n
M906-01
Integrated
Circuit
Systems, Inc.
VCSO BASED
GBE CLOCK
G
ENERATOR
DEVICE PACKAGE - 9 x 9mm CERAMIC LEADLESS CHIP CARRIER
Mechanical Dimensions:
Figure 5: Device Package - 9 x 9mm Ceramic Leadless Chip Carrier
ORDERING INFORMATION
Part Numbering Scheme
Example Part Numbers
Output Freq. (MHz) Temperature Order Part Number
Part Number:
M906-01-xxx.xxxx
Device Number
commercial
industrial
M906-01-156.2500
M906-01 156.2500
M906-01-156.2500
M906-01 156.2500
M906-01-187.5000
M906-01 187.5000
Temperature
156.25
156.25
187.50
0
to +70 o
C (commercial)
“I-”==- 40 to +85 o
C
(industrial)
I
commercial
industrial
Output Frequency (MHz)
See Table 8, right. Consult ICS for other frequencies.
I
commercial
industrial
Figure 6: Part Numbering Scheme
I
Table 8: Example Part Numbers
Consult factory for frequency availability.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
M906-01 Datasheet Rev 1.3
6 of 6
Revised 06Jan2004
Integrated Circuit Systems, Inc. ● Communications Modules ● www.icst.com ● tel (508) 852-5400
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