IDT74FST32384PG8 [IDT]
Bus Driver, CBT/FST/QS/5C/B Series, 1-Func, 10-Bit, True Output, PDSO24, TSSOP-24;
| 型号： | IDT74FST32384PG8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Bus Driver, CBT/FST/QS/5C/B Series, 1-Func, 10-Bit, True Output, PDSO24, TSSOP-24 驱动 光电二极管 逻辑集成电路 |
| 文件： | 总5页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
10-BIT BUS SWITCH
IDT74FST32384
generatelittleornonoiseoftheirownwhileprovidingalowresistancepath
foranexternaldriver. Thesedevicesconnectinputandoutputportsthrough
an n-channel FET. When the gate-to-source junction of this FET is
adequatelyforward-biasedthedeviceconducts ortheresistancebetween
inputandoutputportsissmall. Withoutadequatebiasonthegate-to-source
junctionoftheFET,theFETis turnedoff,thereforewithnoVCCapplied,the
device has hotinsertioncapability.
FEATURES:
−
−
−
−
−
Bus switches provide zero delay paths
Extended commercial range of –40°C to +85°C
Low switch on-resistance: 28Ω
TTL-compatible input and output levels
ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
−
Available in QSOP, TSSOP, SOIC, and PDIP Packages
Thelowon-resistanceandsimplicityoftheconnectionbetweeninputand
outputports reduces the delayinthis pathtoclose tozero.
The FST32384 integrates terminating resistors in the device, thus
eliminatingthe needforexternal25Ω series resistors.
DESCRIPTION:
The FST32384 is a 10-bit TTL-compatible bus switch. The BEx pins
provideenablecontrol-BEAcontrols thelower5-bits andBEBcontrols the
upper5-bits.
The FST32384 belongs to IDT's family of Bus switches. Bus Switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. Thus they
PINCONFIGURATION
FUNCTIONALBLOCKDIAGRAM
A0
B0
24
23
22
21
20
1
2
Vcc
B9
BEA
B0
A0
A9
3
4
A4
A5
B4
B5
A8
B8
B7
A7
A1
B1
5
P24-1
SO24-2
SO24-8
SO24-9
B2
A2
A3
B3
B4
6
19
18
17
7
8
A6
B6
B5
9
16
15
A9
B9
10
A4
11
12
A5
BEA
BEB
14
13
GND
BEB
PDIP/ SOIC/ QSOP/ TSSOP
TOP VIEW
COMMERCIAL TEMPERATURE RANGE
OCTOBER 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-5524/-
IDT74FST32384
10-BITOCTALBUSSWITCH
COMMERCIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN DESCRIPTION
Symbol
Rating
Max.
–0.5 to +7
–65 to +150
128
Unit
V
Pin Names
I/O
Description
(2)
VTERM
Terminal Voltage with Respect to GND
Storage Temperature
A0-9
I/O
Buses A
Buses B
TSTG
IOUT
°C
B0-9
I/O
I
Maximum Continuous Channel Current
mA
FST LINK
BEA, BEA
Bus Switch Enable (Active LOW)
NOTES:
FUNCTION TABLE (1)
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
BEA
BEB
B0-4
B5-9
Description
Disconnect
H
H
Hi-Z
Hi-Z
L
H
L
H
L
L
A0-4
Hi-Z
A0-4
Hi-Z
A5-9
A5-9
Connect
Connect
Connect
2. Vcc, Control, and Switch terminals.
CAPACITANCE (1)
NOTE:
1. H = HIGH Voltage level
L = LOW Voltage Level
Z = High-Impedence
Symbol
Parameter
Conditions(2)
Typ. Unit
CIN
Control Input Capacitance
4
pF
pF
CI/O
Switch Input/Output
Capacitance
Switch Off
NOTES:
1. Capacitance is characterized but not tested.
2. TA = 25°C, f = 1MHz, VIN = 0V, VOUT = 0V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Symbol
Parameter
Input HIGH Voltage
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH for Control Inputs
2
—
—
—
—
—
—
300
—
0.8
±1
±1
±1
±1
—
V
VIL
IIH
Input LOW Voltage
Guaranteed Logic LOW for Control Inputs
—
—
—
—
—
—
—
17
V
Input HIGH Current
VCC = Max.
VCC = Max.
VI = VCC
µA
IIL
Input LOW Voltage
VI = GND
VO = VCC
VO = GND
IOZH
IOZL
IOS
High Impedance Output Current
(3-State Output pins)
Short Circuit Current
Clamp Diode Voltage
Switch On Resistance(4)
µA
(3)
VCC = Max., VO = GND
VCC = Min., IIN = –18mA
mA
V
VIK
RON
0.7
–
1.2
–
VCC = Min., VIN = 0.0V,
ION = 30mA
28
40
Ω
V
CC = Min., V = 2.4V,
20
35
48
Ω
IN
ION = 15mA
VCC = 0V, VIN or VO ≤ 4.5V
CC = Max., V = GND or V
IOFF
Input/Output Power Off Leakage
Quiescent Power Supply Current
—
—
—
±1
3
µA
µA
ICC
V
0.1
I
CC
FCT LINK
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Measured by voltage drop between ports at indicated current through the switch.
2
IDT74FST32384
10-BITOCTALBUSSWITCH
COMMERCIALTEMPERATURERANGE
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
∆ICC
VCC = Max.
—
0.5
1.5
mA
(3)
VIN = 3.4V
ICCD
IC
Dynamic Power Supply Current(4)
VCC = Max.
VIN = VCC
—
30
40
µA/
MHz/
Switch
Outputs Open
Enable Pin Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
Enable Pin Toggling
VIN = GND
Total Power Supply Current(6)
VIN = VCC
—
—
3
4
mA
VIN = GND
(10 Switches Toggling)
fi = 10MHz
VIN = 3.4
VIN = GND
3.3
4.8
50% Duty Cycle
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fiN)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fi = Input Frequency
N = Number of Switches Toggling at fi
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: TA = -40°C to +85°C, VCC = 5.0V ±5%
Condition(1)
CL = 50pF
RL = 500Ω
Min.(2)
Max.
Unit
Typ.
Symbol
tPLH
Description
Data Propagation Delay
—
—
1.25
ns
(3,4)
tPHL
Ai to Bi, Bi to Ai
tPZH
tPZL
Switch Turn on Delay
BEx to Ai, Bi
1.5
1.5
—
—
—
7.5
5.5
—
ns
ns
tPHZ
Switch Turn off Delay
(3)
tPLZ
BEx to Ai, Bi
|QCI|
Charge Injection(5,6)
1.5
pC
NOTES:
1. See test circuit and waveforms.
2. Minimum limits guaranteed but not tested.
3. This parameter is guaranteed by design but not tested.
4. The bus switch contributes no propagation delay other than the RC delay of the on resistance of the switch and the load capacitance. The time constant
for the switch alone is of the order of 0.25 ns for 50 pF load. Since this time is constant and much smaller than the rise/fall times of typical driving signals,
it adds very little propagation delay to the system. Propagation delay of the bus switch when used in a system is determined by the driving circuit on
the driving side of the switch and its interaction with the load on the driven side.
5. Measured at switch turn off, load = 50 pF in parallel with 10 MΩ scope probe, VIN = 0.0 volts.
6. Characterized parameter. Not 100% tested.
3
IDT74FST32384
10-BITOCTALBUSSWITCH
COMMERCIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
Closed
Open
V CC
7.0V
Open Drain
Disable Low
Enable Low
All Other Tests
500Ω
500Ω
V OUT
VIN
Pulse
D.U.T.
Generator
FCT LINK
50pF
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
T
R
L
C
Octal link
PULSEWIDTH
SET-UP, HOLD, AND RELEASE TIMES
3V
1.5V
0V
DATA
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
Octal link
CLEAR
CLOCK ENABLE
ETC.
tSU
tH
Octal link
PROPAGATIONDELAY
ENABLEANDDISABLETIMES
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
VOL
1.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
tPLH
0.3V
0.3V
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
4
IDT74FST32384
10-BITOCTALBUSSWITCH
COMMERCIALTEMPERATURERANGE
ORDERINGINFORMATION
IDT
XX
FST
XX
X
Temp. Range
Package
Device Type
P
Plastic DIP (P24-1)
SO
Q
PG
Small Outline IC (SO24-2)
Quarter-size Small Outline Package (SO24-8)
Thin-Shrink Small Outline Package (SO24-9)
10-Bit Bus Switch
32384
74
−40°C to +85°C
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The IDT logo is a registered trademark of Integrated Device Technology, Inc.
5
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