IDT74FCT543CSO8 [IDT]
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, SOIC-24;
| 型号： | IDT74FCT543CSO8 |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, SOIC-24 光电二极管 输出元件 逻辑集成电路 |
| 文件： | 总7页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
IDT54/74FCT543/A/C
FEATURES:
DESCRIPTION:
• IDT54FCT543 equivalent to FAST™ speed
TheFCT543isanon-invertingoctaltransceiverbuiltusinganadvanced
dual metal CMOS technology. These devices contain two sets of eight D-
type latches with separate input and output controls for each set. For data
flow from A to B, for example, the A-to-B Enable (CEAB) input must be low
in order to enter data from A0–A7 or to take data from B0–B7, as indicated
in the Function Table. With CEAB low, a low signal on the A-to-B Latch
Enable(LEAB)inputmakestheA-to-Blatchestransparent;a subsequent
low-to-high transition of the LEAB signal puts the A latches in the storage
modeandtheiroutputsnolongerchangewiththeAinputs. WithCEABand
OEAB both low, the 3-state B output buffers are active and reflect the data
presentattheoutputoftheAlatches. ControlofdatafromBtoAissimilar,
but uses the CEBA, LEBA and OEBA inputs.
• IDT54/74FCT543A up to 25% faster than FAST
• IDT74FCT543C up to 40% faster than FAST
• Eqivalent to FAST output drive over full temperature and voltage
supply extremes
• IOL = 64mA (commercial) and 48mA (military)
• Separate controls for data flow in each direction
• Back-to-back latches for storage
• CMOS power levels (1mW typ. static)
• Substantially lower input current levels than FAST (5µA max.)
• TTL input and output level compatible
• CMOS output level compatible
• MIlitary product compliant to MIL-STD-883, Class B
• Available in the following packages:
– Commercial: SOIC
– Military: CERDIP, LCC
FUNCTIONALBLOCKDIAGRAM
DETAIL A
22
Q
D
B0
LE
3
Q
D
A0
LE
4
5
21
20
19
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
6
7
DETAIL A x 7
18
17
16
15
B4
B5
B6
B7
8
9
10
2
OEBA
13
OEAB
23
1
CEBA
LEBA
11
14
CEAB
LEAB
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AUGUST 2003
1
© 2003 Integrated Device Technology, Inc.
DSC-4602/7
IDT54/74FCT543/A/C
FASTCMOSOCTALLATCHEDTRANSCEIVER
MILITARYANDCOMMERCIAL TEMPERATURERANGES
PINCONFIGURATION
24
23
22
21
20
19
18
17
16
15
14
13
1
LEBA
OEBA
A0
VCC
CEBA
B0
INDEX
2
3
4
28 27 26
4
3
2
1
5
6
7
8
B1
B2
B3
NC
B4
B5
B6
25
24
23
22
21
20
19
A1
A1
B1
A2
A3
A2
B2
5
6
7
8
9
B3
A3
A4
A5
NC
A4
B4
B5
B6
B7
9
10
A5
A6
A7
11
A6
12 13 14 15 16 17 18
10
11
LEAB
OEAB
CEAB
GND
12
CERDIP/ SOIC
TOP VIEW
LCC
TOP VIEW
ABSOLUTEMAXIMUMRATINGS(1)
CAPACITANCE (TA = +25°C, F = 1.0MHz)
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
Symbol Rating
Commercial
Military
Unit
Symbol
(2)
VTERM
Terminal Voltage
–0.5 to +7
–0.5 to +7
V
CIN
VIN = 0V
6
8
10
12
pF
pF
with Respect to GND
Terminal Voltage
COUT
VOUT = 0V
(3)
VTERM
–0.5 to VCC –0.5 to VCC
V
NOTE:
with Respect to GND
Operating Temperature
Temperature under BIAS
Storage Temperature
Power Dissipation
1. This parameter is measured at characterization but not tested.
TA
0 to +70 –55 to +125
°C
°C
°C
W
TBIAS
TSTG
PT
–55 to +125 –65 to +135
–55 to +125 –65 to +150
LOGICSYMBOL
0.5
0.5
IOUT
DC Output Current
120
120
mA
LEAB CEAB CEBA LEBA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
A0
A1
A2
A3
A4
A5
B0
B1
B2
B3
B4
B5
2. Input and Vcc terminals only.
3. Output and I/O terminals only.
A6
B6
B7
A7
OEAB
OEBA
2
IDT54/74FCT543/A/C
FASTCMOSOCTALLATCHEDTRANSCEIVER
MILITARYANDCOMMERCIAL TEMPERATURERANGES
PINDESCRIPTION
FUNCTION TABLE(1, 2)
Pin Names
OEAB
OEBA
CEAB
CEBA
LEAB
Description
ForA-to-B(SymmetricwithB-to-A)
A-to-BOutputEnableInput(ActiveLOW)
B-to-AOutputEnableInput(ActiveLOW)
A-to-B Enable Input (Active LOW)
Latch
Output
Buffers
Inputs
Status
A-to-B
Storing
Storing
X
CEAB
LEAB
OEAB
B0–B7
High Z
H
X
X
L
X
H
X
L
X
X
H
L
B-to-A Enable Input (Active LOW)
X
A-to-BLatchEnableInput(ActiveLOW)
B-to-ALatchEnableInput(ActiveLOW)
A-to-BDataInputsorB-to-A3-StateOutputs
B-to-ADataInputsorA-to-B3-StateOutputs
High Z
LEBA
A0–A7
Transparent
Storing
CurrentAInputs
Previous* A Inputs
L
H
L
B0–B7
NOTES:
1. * Before LEAB LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA
and OEBA.
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:VLC =0.2V;VHC =VCC -0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ±5%, Military: TA = -55°C to +125°C, VCC = 5.0V ±10%
Symbol
VIH
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
—
—
—
—
—
—
0.8
5
V
IIH
Input HIGH Current
VI = VCC
VI = 2.7V
VI = 0.5V
VI = GND
—
(4)
VCC = Max.
—
5
µA
µA
IIL
Input LOW Current
—
–5(4)
—
–5
IOZH
IOZL
VO = VCC
VO = 2.7V
VO = 0.5V
VO = GND
—
—
—
—
—
—
—
10
10(4)
–10(4)
–10
Off State (High Impedance)
Output Current
VCC = Max.
—
—
VIK
IOS
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
–0.7
–1.2
V
–60
–120
—
—
—
—
—
mA
VOH
VCC = 3V, VIN = VLC or VHC, IOH = –32µA
VCC = Min
VHC
VHC
2.4
2.4
—
—
—
—
VCC
VCC
4.3
IOH = –300µA
IOH = –12mA MIL
V
V
VIN = VIH or VIL
IOH = –15mA COM'L
4.3
VOL
Output LOWVoltage
VCC = 3V, VIN = VLC or VHC, IOL = 300µA
VCC = Min
GND
GND
0.3
VLC
(4)
IOL = 300µA
IOL = 48mA MIL
IOL = 64mA COM'L
VLC
VIN = VIH or VIL
0.55
0.55
0.3
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not ttested.
3
IDT54/74FCT543/A/C
FASTCMOSOCTALLATCHEDTRANSCEIVER
MILITARYANDCOMMERCIAL TEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
VLC = 0.2V; VHC = VCC - 0.2V
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ICC
Quiescent Power Supply Current
VCC = Max.
—
0.2
1.5
mA
VIN ≥ VHC; VIN ≤ VLC
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
VCC = Max.
VIN = 3.4V(3)
—
—
0.5
2
mA
ICCD
Dynamic Power Supply
Current(4)
VCC = Max.
Outputs Open
CEAB and OEAB = GND
CEBA = VCC
VIN ≥ VHC
VIN ≤ VLC
0.15
0.25
mA/
MHz
One Input Toggling
50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max.
Outputs Open
fCP = 10MHz (LEAB)
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
—
—
—
1.7
2.2
7
4
mA
CEAB and OEAB = GND
CEBA = VCC
One Bit Toggling
at fi = 5MHz
VIN = 3.4V
VIN = GND
6
VCC = Max.
Outputs Open
fCP = 10MHz (LEAB)
50% Duty Cycle
VIN ≥ VHC
VIN ≤ VLC
(FCT)
12.8(5)
21.8(5)
CEAB and OEAB = GND
CEBA = VCC
VIN = 3.4V
VIN = GND
9.2
Eight Bits Toggling
at fi = 5MHz
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT543/A/C
FASTCMOSOCTALLATCHEDTRANSCEIVER
MILITARYANDCOMMERCIAL TEMPERATURERANGES
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
54FCT543
54/74FCT543A
74FCT543C
Mil.
Com'l.
Mil.
Com'l.
(2)
(2)
(2)
(2)
Symbol Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
tPLH
tPHL
PropagationDelay
2.5
10
2.5
6.5
2.5
7.5
2.5
5.3
ns
TransparantMode
Ax to Bx or Bx to Ax
tPLH
tPHL
tPZH
tPZL
PropagationDelay
2.5
2
14
14
2.5
2
8
9
2.5
2
9
2.5
2
7
8
ns
ns
LEBA to Ax, LEAB to Bx
OutputEnableTime
10
OEBA or OEAB to Ax or Bx
CEBA or CEAB to Ax or Bx
OutputDisableTime
tPHZ
tPLZ
2
13
2
7.5
2
8.5
2
6.5
ns
OEBA or OEAB to Ax or Bx
CEBA or CEAB to Ax or Bx
Set-up Time, HIGH or LOW
Ax or Bx to LEBA or LEAB
Hold Time, HIGH or LOW
Ax or Bx to LEBA or LEAB
LEBA or LEAB Pulse Width LOW
tSU
tH
3
2
5
—
—
—
2
2
5
—
—
—
2
2
5
—
—
—
2
2
5
—
—
—
ns
ns
ns
tW
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT54/74FCT543/A/C
FASTCMOSOCTALLATCHEDTRANSCEIVER
MILITARYANDCOMMERCIAL TEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
VCC
7.0V
SWITCHPOSITION
500Ω
Test
Switch
Closed
Open
VOUT
VIN
Open Drain
Disable Low
Enable Low
Pulse
Generator
D.U.T
.
50pF
All Other Tests
500Ω
RT
L
C
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
PULSE
tH
tSU
1.5V
1.5V
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
1.5V
0V
CLEAR
HIGH-LOW-HIGH
PULSE
ETC.
SYNCHRONOUS CONTROL
PRESET
3V
Octal link
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; ZO ≤ 50Ω; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT543/A/C
FASTCMOSOCTALLATCHEDTRANSCEIVER
MILITARYANDCOMMERCIAL TEMPERATURERANGES
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XX
X
Temp. Range
Package
Process
Device Type
Blank
Commercial
B
MIL-STD-883, Class B
Commercial Options
Small Outline IC
SO
Military Options
CERDIP
Leadless Chip Carrier
D
L
Fast CMOS Octal Latched Transceiver
543
543A
543C
54
74
– 55°C to +125°C
0°C to +70°C
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
7
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