IDT74FCT3574P [IDT]

3.3V CMOS OCTAL D REGISTERS (3-STATE); 3.3V CMOS八路D寄存器(三态)
IDT74FCT3574P
型号: IDT74FCT3574P
厂家: INTEGRATED DEVICE TECHNOLOGY    INTEGRATED DEVICE TECHNOLOGY
描述:

3.3V CMOS OCTAL D REGISTERS (3-STATE)
3.3V CMOS八路D寄存器(三态)

文件: 总7页 (文件大小:112K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IDT54/74FCT3574/A  
ADVANCE INFORMATION  
3.3V CMOS OCTAL D  
REGISTERS (3-STATE)  
Integrated Device Technology, Inc.  
FEATURES:  
DESCRIPTION:  
• 0.5 MICRON CMOS Technology  
The FCT3574/A are 8-bit registers built using an advanced  
dual metal CMOS technology. These registers consist of  
eight D-type flip-flops with a buffered common clock and  
buffered 3-state output control. When the output (OE) input is  
LOW, the eight outputs are enabled. When the OE input is  
HIGH, the outputs are in the high-impedance state.  
Input data meeting the set-up and hold time requirements  
of the D inputs is transferred to the O outputs on the LOW-to-  
HIGH transition of the clock input.  
• ESD > 2000V per MIL-STD-883, Method 3015;  
> 200V using machine model (C = 200pF, R = 0)  
• 25 mil Center SSOP Packages  
• Extended commercial range of -40°C to +85°C  
• VCC = 3.3V ±0.3V, Normal Range or  
VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4µW typ. static)  
• Rail-to-Rail output swing for increased noise margin  
• Military product compliant to MIL-STD-883, Class B  
FUNCTIONAL BLOCK DIAGRAM  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
CP  
OE  
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP  
CP  
CP  
CP  
CP  
CP  
CP  
CP  
O0  
O1  
O2  
O3  
O4  
O5  
O6  
O7  
3095 drw 01  
PIN CONFIGURATION  
PIN DESCRIPTION  
Pin Names  
Description  
D flip-flop data inputs  
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
D
N
OE  
D0  
2
3
4
CP  
Clock Pulse for the register. Enters data on  
LOW-to-HIGH transition.  
O0  
O1  
O2  
O3  
O4  
D1  
D2  
O
O
N
N
3-state outputs, (true)  
P20-1  
D20-1  
SO20-2  
&
3-state outputs, (inverted)  
D3  
D4  
D5  
D6  
5
OE  
Active LOW 3-state Output Enable input  
6
3095 tbl 01  
7
O5  
O6  
SO20-7  
8
9
O7  
D7  
GND  
10  
CP  
DIP/SOIC/SSOP  
TOP VIEW  
3095 drw 02  
The IDT logo is a registered trademark of Integrated Device Technology, Inc.  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
AUGUST 1995  
1995 Integrated Device Technology, Inc.  
8.14  
DSC-4650/-  
1
IDT54/74FCT3574/3574A  
3.3V CMOS OCTAL D REGISTERS (3-STATE)  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
FUNCTION TABLE (1)  
ABSOLUTE MAXIMUM RATINGS(1)  
Inputs  
Outputs  
Internal  
Symbol  
Rating  
Commercial  
Military  
Unit  
(2)  
Function  
HI-Z  
CP  
DN  
ON  
N
Q
OE  
VTERM  
Terminal Voltage  
with Respect to  
GND  
–0.5 to +4.6 –0.5 to +4.6  
V
H
H
L
L
H
H
L
H
X
X
L
H
L
Z
Z
L
H
Z
Z
NC  
NC  
H
L
H
(3)  
VTERM  
Terminal Voltage  
with Respect to  
GND  
–0.5 to +7.0 –0.5 to +7.0  
V
V
LOAD  
REGISTER  
(4)  
VTERM  
Terminal Voltage  
with Respect to  
GND  
–0.5 to  
–0.5 to  
H
L
VCC + 0.5  
VCC + 0.5  
3095 tbl 02  
NOTE:  
1. H = HIGH Voltage Level  
L = LOW Voltage Level  
X = Don’t Care  
TA  
Operating  
–40 to +85 –55 to +125 °C  
–55 to +125 –65 to +135 °C  
–55 to +125 –65 to +150 °C  
Temperature  
Temperature  
Under Bias  
Storage  
TBIAS  
TSTG  
Z = High Impedance  
NC = No Change  
= LOW-to-HIGH transition  
Temperature  
Power Dissipation  
PT  
1.0  
1.0  
W
IOUT  
DC Output  
Current  
–60 to +60  
–60 to +60 mA  
CAPACITANCE (TA = +25°C, f = 1.0MHz)  
3095 lnk 03  
NOTES:  
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-  
INGS may cause permanent damage to the device. This is a stress rating  
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions  
above those indicated in the operational sections of this specification is  
not implied. Exposure to absolute maximum rating conditions for ex-  
tended periods may affect reliability.  
Symbol  
Parameter(1)  
Input  
Conditions  
Typ. Max. Unit  
CIN  
VIN = 0V  
3.5  
6.0  
pF  
Capacitance  
Output  
COUT  
VOUT = 0V  
4.0  
8.0  
pF  
Capacitance  
2. Vcc terminals.  
3. Input terminals.  
3095 tbl 04  
NOTE:  
1. This parameter is measured at characterization but not tested.  
4. Output and I/O terminals.  
8.14  
2
IDT54/74FCT3574/3574A  
3.3V CMOS OCTAL D REGISTERS (3-STATE)  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE  
Following Conditions Apply Unless Otherwise Specified:  
Commercial: TA = –40°C to +85°C, VCC = 2.7V to 3.6V; Military: TA = –55°C to +125°C, VCC = 2.7V to 3.6V  
Symbol  
Parameter  
Test Conditions(1)  
Min.  
Typ.(2)  
Max. Unit  
VIH  
Input HIGH Level (Input pins)  
Guaranteed Logic HIGH Level  
2.0  
5.5  
VCC+0.5  
0.8  
V
Input HIGH Level (I/O pins)  
Input LOW Level  
2.0  
VIL  
II H  
Guaranteed Logic LOW Level  
–0.5  
V
(Input and I/O pins)  
Input HIGH Current (Input pins)(6)  
Input HIGH Current (I/O pins)(6)  
Input LOW Current (Input pins)(6)  
Input LOW Current (I/O pins)(6)  
High Impedance Output Current  
(3-State Output pins)(6)  
VCC = Max.  
VCC = Max.  
VI = 5.5V  
VI = VCC  
±1  
±1  
µA  
II L  
VI = GND  
VI = GND  
VO = VCC  
VO = GND  
±1  
±1  
IOZH  
IOZL  
VIK  
±1  
µA  
±1  
Clamp Diode Voltage  
VCC = Min., IIN = –18mA  
0.7  
–60  
90  
1.2  
–110  
200  
V
IODH  
IODL  
VOH  
Output HIGH Current  
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)  
VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V(3)  
–36  
50  
mA  
mA  
V
Output LOW Current  
Output HIGH Voltage  
VCC = Min.  
IOH = –0.1mA  
IOH = –3mA  
VCC0.2  
2.4  
VIN = VIH or VIL  
3.0  
3.0  
VCC = 3.0V  
VIN = VIH or VIL  
VCC = Min.  
IOH = –6mA MIL.  
IOH = –8mA COM'L.  
IOL = 0.1mA  
2.4(5)  
VOL  
Output LOW Voltage  
0.2  
0.3  
0.3  
0.2  
0.4  
V
VIN = VIH or VIL  
IOL = 16mA  
IOL = 24mA  
IOL = 24mA  
0.55  
0.50  
VCC = 3.0V  
VIN = VIH or VIL  
IOS  
VH  
Short Circuit Current(4)  
Input Hysteresis  
VCC = Max., VO = GND(3)  
–60  
135  
150  
0.1  
–240  
mA  
mV  
µA  
ICCL  
ICCH  
ICCZ  
Quiescent Power Supply Current  
VCC = Max.,  
VIN = GND or VCC  
COM'L.  
MIL.  
10  
0.1  
100  
3095 lnk 05  
NOTES:  
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at Vcc = 3.3V, +25°C ambient.  
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.  
4. This parameter is guaranteed but not tested.  
5. VOH = VCC –0.6V at rated current.  
6. The test limits for this parameter is ± 5µA at TA = –55°C.  
8.14  
3
IDT54/74FCT3574/3574A  
3.3V CMOS OCTAL D REGISTERS (3-STATE)  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
POWER SUPPLY CHARACTERISTICS  
Symbol  
Parameter  
Test Conditions(1)  
VIN = VCC –0.6V(3)  
Min. Typ.(2) Max.  
Unit  
ICC  
Quiescent Power Supply Current  
VCC = Max.  
mA  
ICCD  
Dynamic Power Supply  
Current(4)  
VCC = Max.  
Outputs Open  
OE = GND  
VIN = VCC  
VIN = GND  
µA/  
MHz  
50% Duty Cycle  
One Input Toggling  
VCC = Max.  
IC  
Total Power Supply Current(6)  
VIN = VCC  
mA  
Outputs Open  
fCP = 10MHz  
50% Duty Cycle  
OE = GND  
VIN = GND  
VIN = VCC –0.6V  
VIN = GND  
fi = 5MHz  
50% Duty Cycle  
One Bit Toggling  
VCC = Max.  
VIN = VCC  
Outputs Open  
fCP = 10MHz  
50% Duty Cycle  
OE = GND  
VIN = GND  
VIN = VCC –0.6V  
VIN = GND  
fi = 2.5MHz  
50% Duty Cycle  
Eight Bits Toggling  
3095 tbl 06  
NOTES:  
1. For conditions shown as max. or min., use appropriate value specified under Electrical Characteristics for the applicable device type.  
2. Typical values are at VCC = 3.3V, +25°C ambient.  
3. Per TTL driven input; all other inputs at VCC or GND.  
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.  
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.  
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC  
IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi)  
ICC = Quiescent Current (ICCL, ICCH and ICCZ)  
ICC = Power Supply Current for a TTL High Input  
DH = Duty Cycle for TTL Inputs High  
NT = Number of TTL Inputs at DH  
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)  
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)  
NCP = Number of Clock Inputs at fCP  
fi = Input Frequency  
Ni = Number of Inputs at fi  
8.14  
4
IDT54/74FCT3574/3574A  
3.3V CMOS OCTAL D REGISTERS (3-STATE)  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3)  
FCT3574  
FCT3574A  
Com'l.  
Com'l.  
Mil.  
Min.(2)  
Mil.  
Min.(2)  
Min.(2)  
Max.  
Max.  
Min.(2)  
Max.  
Max.  
Symbol  
tPLH  
tPHL  
Parameter  
Conditions(1)  
CL = 50pF  
Unit  
Propagation Delay  
2.0  
1.5  
1.5  
2.0  
1.5  
7.0  
10.0  
2.0  
1.5  
1.5  
2.0  
1.5  
7.0  
11.0  
2.0  
6.5  
2.0  
1.5  
1.5  
2.0  
1.5  
6.0  
7.2  
ns  
(3)  
CP to ON  
RL = 500  
tPZH  
tPZL  
tPHZ  
tPLZ  
tSU  
Output Enable Time  
12.5  
8.0  
14.0  
8.0  
1.5  
1.5  
2.0  
1.5  
5.0  
6.5  
5.5  
7.5  
6.5  
ns  
ns  
ns  
ns  
Output Disable Time  
Set-up Time HIGH  
or LOW, DN to CP  
Hold Time HIGH  
or LOW, DN to CP  
CP Pulse Width  
HIGH or LOW  
tH  
tW  
ns  
3095 tbl 07  
NOTES:  
1. See test circuit and waveforms.  
2. Minimum limits are guaranteed but not tested on Propagation Delays.  
3. PropagationDelaysandEnable/DisabletimesarewithVCC =3.3V±0.3V, NormalRange. ForVCC =2.7Vto3.6V, ExtendedRange, allPropagationDelays  
and Enable/Disable times should be degraded by 20%.  
8.14  
5
IDT54/74FCT3574/3574A  
3.3V CMOS OCTAL D REGISTERS (3-STATE)  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
TEST CIRCUITS AND WAVEFORMS  
TEST CIRCUITS FOR ALL OUTPUTS  
SWITCH POSITION  
6V  
Test  
Switch  
Open Drain  
Disable Low  
Enable Low  
Disable High  
Enable High  
All Other tests  
V
CC  
Open  
GND  
6V  
500  
V
OUT  
GND  
V
IN  
Pulse  
Generator  
D.U.T.  
Open  
50pF  
3095 lnk 08  
DEFINITIONS:  
CL= Load capacitance: includes jig and probe capacitance.  
500Ω  
R
T
C
L
RT = Termination resistance: should be equal to ZOUT of the Pulse  
Generator.  
3095 drw 03  
SET-UP, HOLD AND RELEASE TIMES  
PULSE WIDTH  
3V  
DATA  
1.5V  
INPUT  
0V  
LOW-HIGH-LOW  
PULSE  
t
H
t
t
SU  
1.5V  
1.5V  
3V  
1.5V  
0V  
TIMING  
INPUT  
ASYNCHRONOUS CONTROL  
tW  
t
REM  
PRESET  
CLEAR  
ETC.  
3V  
1.5V  
0V  
HIGH-LOW-HIGH  
PULSE  
SYNCHRONOUS CONTROL  
PRESET  
3V  
1.5V  
0V  
CLEAR  
CLOCK ENABLE  
ETC.  
SU  
t
H
3095 srw 05  
3095 drw 04  
PROPAGATION DELAY  
ENABLE AND DISABLE TIMES  
ENABLE  
DISABLE  
3V  
1.5V  
0V  
3V  
SAME PHASE  
CONTROL  
INPUT  
1.5V  
0V  
INPUT TRANSITION  
t
PLH  
t
t
PHL  
PHL  
t
PZL  
tPLZ  
V
OH  
OUTPUT  
3V  
1.5V  
3V  
1.5V  
OUTPUT  
NORMALLY  
LOW  
SWITCH  
6V  
V
OL  
t
PLH  
0.3V  
0.3V  
V
OL  
3V  
1.5V  
0V  
t
PZH  
tPHZ  
OPPOSITE PHASE  
INPUT TRANSITION  
V
OH  
OUTPUT  
NORMALLY  
HIGH  
SWITCH  
GND  
1.5V  
0V  
0V  
3095 drw 06  
3095 drw 07  
NOTES:  
1. Diagram shown for input Control Enable-LOW and input Control Disable-  
HIGH.  
2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.  
3. If VCC is below 3V, input voltage swings should be adjusted not to exceed  
VCC.  
8.14  
6
IDT54/74FCT3574/3574A  
3.3V CMOS OCTAL D REGISTERS (3-STATE)  
MILITARY AND COMMERCIAL TEMPERATURE RANGES  
ORDERING INFORMATION  
IDT  
XX  
FCT  
X
XX  
X
X
Temp. Range  
Family  
Device Type  
Package  
Process  
Blank  
B
Commercial  
MIL-STD-883, Class B  
P
Plastic DIP (P20-1)  
D
CERDIP (D20-1)  
SO  
PY  
Small Outline IC (SO20-2)  
Shrink Small Outline Package (SO20-7)  
574  
Non-Inverting Octal D Register  
574A  
3
3.3 Volt  
54  
74  
–55°C to +125°C  
–40°C to +85°C  
3095 drw 08  
8.14  
7

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