IDT74FCT3574AQ8 [IDT]

Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, QSOP-20;


型号：	IDT74FCT3574AQ8
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	Bus Driver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO20, QSOP-20 驱动光电二极管逻辑集成电路触发器
文件：	总6页 (文件大小：58K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IDT74FCT3574/A

3.3VCMOSOCTALDREGISTER(3-STATE)

INDUSTRIALTEMPERATURERANGE

3.3V CMOS

IDT74FCT3574/A

OCTAL D REGISTER

(3-STATE)

DESCRIPTION:

FEATURES:

The FCT3574/A are 8-bit registers built using an advanced dual metal

CMOStechnology. TheseregistersconsistofeightD-typeflip-flopswitha

bufferedcommonclockandbuffered3-stateoutputcontrol. WhentheOE

input is low, the eight outputs are enabled. When the OEinput is high, the

outputs are in the high-impedance state.

• 0.5 MICRON CMOS Technology

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ±0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4µW typ. static)

• Rail-to-Rail output swing for increased noise margin

• Available in QSOP, SOIC, and TSSOP packages

Inputdatameetingtheset-upandholdtimerequirementsoftheDinputs

istransferredtotheQoutputsonthelow-to-hightransitionoftheclockinput.

FUNCTIONALBLOCKDIAGRAM

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

NOVEMBER 2000

DSC-5417/4

IDT74FCT3574/A

3.3VCMOSOCTALDREGISTER(3-STATE)

INDUSTRIALTEMPERATURERANGE

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

PINCONFIGURATION

Symbol Description

Max

Unit

(2)

VTERM

TerminalVoltagewithRespecttoGND

–0.5 to +4.6

–0.5 to +7

VCC

(3)

(4)

TerminalVoltagewithRespecttoGND –0.5toVCC+0.5

TSTG

IOUT

StorageTemperature

DCOutputCurrent

–65to+150

–60to+60

°C

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in

the operational sections of this specification is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect reliability.

2. VCC terminals.

GND

3. Input terminals.

4. Outputs and I/O terminals.

QSOP/ SOIC/ TSSOP

TOP VIEW

CAPACITANCE (TA = +25°C, F = 1.0MHz)

Symbol

Parameter⁽¹⁾

Input Capacitance

Output Capacitance

Conditions

Typ.

3.5

Max. Unit

CIN

VIN = 0V

COUT

VOUT = 0V

NOTE:

1. This parameter is measured at characterization but not tested.

PINDESCRIPTION

Pin Names

Description

DFlip-FlopDataInputs

ClockPulsefortheregister. EntersdataonLOW-to-HIGH

transition.

3-StateOutputEnableInput(ActiveLOW)

3-StateOutputs

FUNCTIONTABLE⁽¹⁾

Inputs

Outputs

Function

HI-Z

↑

LOAD

NOTE:

1. H = HIGH Voltage Level

L = LOW Voltage Level

X = Don’t Care

Z = High Impedance

NC = No Change

↑ = LOW-to-HIGH transition

IDT74FCT3574/A

3.3VCMOSOCTALDREGISTER(3-STATE)

INDUSTRIALTEMPERATURERANGE

DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE

FollowingConditionsApplyUnlessOtherwiseSpecified:

Industrial: TA = -40°C to +85°C, VCC = 2.7V to 3.6V

Symbol

Parameter

Test Conditions⁽¹⁾

Guaranteed Logic HIGH Level

Min.

Typ.⁽²⁾

—

Max.

5.5

Unit

VIH

Input HIGH Level (Input pins)

Input HIGH Level (I/O pins)

InputLOWLevel

—

Vcc+0.5

0.8

VIL

IIH

IIL

GuaranteedLogicLOWLevel

VCC = Max.

–0.5

—

(Input and I/O pins)

Input HIGH Current (Input pins)

Input HIGH Current (I/O pins)

InputLOWCurrent(Inputpins)

Input LOW Current (I/O pins)

HighImpedanceOutputCurrent

(3-StateOutputpins)

VI = 5.5V

VI = VCC

—

–0.7

–60

—

±1

–1.2

–110

200

—

µA

VI = GND

VO = VCC

VO = GND

—

IOZH

IOZL

VIK

VCC = Max.

—

µA

—

ClampDiodeVoltage

VCC = Min., IIN = –18mA

—

IODH

IODL

VOH

Output HIGH Current

VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V⁽³⁾

–36

OutputLOWCurrent

Output HIGH Voltage

VCC = Min.

IOH = –0.1mA

VCC–0.2

2.4

2.4⁽⁵⁾

VIN = VIH or VIL

VCC = 3V

IOH = –3mA

IOH = –8mA

—

VIN = VIH or VIL

VCC = Min.

VOL

OutputLOWVoltage

IOL = 0.1mA

IOL = 16mA

IOL = 24mA

—

0.2

0.3

0.2

0.4

VIN = VIH or VIL

0.55

0.5

VCC = 3V

VIN = VIH or VIL

IOS

ShortCircuitCurrent⁽⁴⁾

InputHysteresis

VCC = Max., VO = GND⁽³⁾

–60

—

–135

150

0.1

–240

—

µA

—

ICCL

ICCH

ICCZ

Quiescent Power Supply Current

VCC = Max., VIN = GND or VCC

—

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 3.3V, +25°C ambient and maximum loading.

3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.

4. This parameter is guaranteed but not tested.

5. VOH = VCC - 0.6V at rated current.

IDT74FCT3574/A

3.3VCMOSOCTALDREGISTER(3-STATE)

INDUSTRIALTEMPERATURERANGE

POWERSUPPLYCHARACTERISTICS

Symbol

Parameter

Test Conditions⁽¹⁾

VIN = VCC - 0.6V

Min.

—

Typ.⁽²⁾

Max.

Unit

ICC

Quiescent Power Supply Current

VCC = Max.

µA

ICCD

Dynamic Power Supply

Current⁽⁴⁾

VCC = Max.

Outputs Open

OE = GND

VIN = VCC

VIN = GND

—

µA/

MHz

One Input Toggling

50% Duty Cycle

Total Power Supply Current⁽⁶⁾

VCC = Max.

Outputs Open

fCP = 10MHz

VIN = VCC

VIN = GND

—

0.6

0.9

50% Duty Cycle

OE = GND

f^I= 5MHz

VIN = VCC - 0.6V

VIN = GND

One Bit Toggling

VCC = Max.

Outputs Open

fCP = 10MHz

VIN = VCC

VIN = GND

—

1.5

2.2⁽⁵⁾

2.3⁽⁵⁾

50% Duty Cycle

OE = GND

fI = 2.5MHz

VIN = VCC - 0.6V

VIN = GND

Eight Bits Toggling

NOTES:

1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.

2. Typical values are at VCC = 3.3V, +25°C ambient.

3. Per TTL driven input. All other inputs at VCC or GND.

4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.

5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.

6. IC = IQUIESCENT + IINPUTS + IDYNAMIC

IC = ICC + ∆ICC DHNT + ICCD (fCPNCP/2 + fiNi)

ICC = Quiescent Current (ICC, ICCH, and ICCZ)

∆ICC = Power Supply Current for a TTL High Input

DH = Duty Cycle for TTL Inputs High

NT = Number of TTL Inputs at DH

ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)

fCP = Clock Frequency for register devices (zero for non-register devices)

NCP = Number of clock inputs at fCP

fi = Input Frequency

Ni = Number of Inputs at fi

SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE⁽¹⁾

74FCT3574

74FCT3574A

Symbol

tPLH

Parameter

PropagationDelay

CP to Qx

Condition⁽²⁾

CL = 50pF

RL = 500Ω

Min.⁽³⁾

Max.

Min.⁽³⁾

Max.

Unit

6.5

tPHL

tPZH

tPZL

OutputEnableTime

1.5

12.5

1.5

6.5

5.5

tPHZ

tPLZ

OutputDisableTime

tSU

Set-up Time HIGH or LOW, DX to CP

Hold Time HIGH or LOW, DX to CP

CP Pulse Width HIGH or LOW

1.5

—

1.5

—

NOTES:

1. Propagation Delays and Enable/Disable times are with VCC = 3.3V ±0.3V, Normal Range. For VCC = 2.7V to 3.6V, Extended Range, all Propagation Delays and Enable/

Disable times should be degraded by 20%.

2. See test circuit and waveforms.

3. Minimum limits are guaranteed but not tested on Propagation Delays.

IDT74FCT3574/A

3.3VCMOSOCTALDREGISTER(3-STATE)

INDUSTRIALTEMPERATURERANGE

TESTCIRCUITSANDWAVEFORMS

VCC

SWITCHPOSITION

Open

Test

Switch

GND

500Ω

Open Drain

Disable Low

Enable Low

VOUT

VIN

Pulse

Generator

D.U.T.

Disable High

Enable High

GND

Open

50pF

All Other Tests

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Test Circuits for All Outputs

DATA

1.5V

INPUT

LOW-HIGH-LOW

tSU

1.5V

PULSE

1.5V

TIMING

INPUT

ASYNCHRONOUS CONTROL

tREM

PRESET

1.5V

CLEAR

HIGH-LOW-HIGH

PULSE

1.5V

ETC.

SYNCHRONOUS CONTROL

PRESET

1.5V

CLEAR

tSU

CLOCK ENABLE

ETC.

Pulse Width

Set-Up, Hold, and Release Times

ENABLE

DISABLE

CONTROL

INPUT

1.5V

tPZL

tPLZ

1.5V

OUTPUT

NORMALLY

LOW

SAME PHASE

SWITCH

INPUT TRANSITION

0.3V

VOL

VOH

tPLH

tPHL

VOH

1.5V

VOL

tPZH

tPHZ

OUTPUT

NORMALLY

HIGH

SWITCH

GND

1.5V

OPPOSITE PHASE

INPUT TRANSITION

Propagation Delay

Enable and Disable Times

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

3. If Vcc is below 3V, input voltage swings should be adjusted not to exceed Vcc.

IDT74FCT3574/A

3.3VCMOSOCTALDREGISTER(3-STATE)

INDUSTRIALTEMPERATURERANGE

ORDERINGINFORMATION

IDT

FCT

Temp. Range

Family

Device Type

Package

Small Outline IC

Thin Shrink Small Outline Package

Quarter-size Small Outpine Package

574

574A

Non-Inverting Octal D Register

3.3 Volt

− 40°C to +85°C

CORPORATE HEADQUARTERS

2975StenderWay

Santa Clara, CA 95054

for SALES:

800-345-7015 or 408-727-6116

fax: 408-492-8674

for Tech Support:

logichelp@idt.com

(408) 654-6459

www.idt.com

相关型号：