IDT6167LA70P [IDT]
CMOS STATIC RAM 16K (16K x 1-BIT); CMOS静态RAM 16K （ 16K ×1位）
| 型号： | IDT6167LA70P |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | CMOS STATIC RAM 16K (16K x 1-BIT) |
| 文件： | 总8页 (文件大小：67K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT6167SA
IDT6167LA
CMOS STATIC RAM
16K (16K x 1-BIT)
Integrated Device Technology, Inc.
Access times as fast as 15ns are available. The circuit also
offers a reduced power standby mode. When CSgoes HIGH,
the circuit will automatically go to, and remain in, a standby
mode as long as CS remains HIGH. This capability provides
significant system-level power and cooling savings. The low-
power (LA) version also offers a battery backup data retention
capability where the circuit typically consumes only 1µW
operating off a 2V battery.
FEATURES:
• High-speed (equal access and cycle time)
— Military: 15/20/25/35/45/55/70/85/100ns (max.)
— Commercial: 15/20/25/35ns (max.)
• Low power consumption
• Battery backup operation — 2V data retention voltage
(IDT6167LA only)
• Available in 20-pin CERDIP and Plastic DIP, and 20-pin
SOJ
• Produced with advanced CMOS high-performance
technology
All inputs and the output of the IDT6167 are TTL-compat-
ible and operate from a single 5V supply, thus simplifying
system designs.
TheIDT6167ispackagedinaspace-saving20-pin, 300mil
Plastic DIP or CERDIP, Plastic 20-pin SOJ, providing high
board-level packing densities.
Military grade product is manufactured in compliance with
the latest revision of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
• CMOS process virtually eliminates alpha particle soft-
error rates
• Separate data input and output
• Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The lDT6167 is a 16,384-bit high-speed static RAM orga-
nized as 16K x 1. The part is fabricated using IDT’s high-
performance, high reliability CMOS technology.
FUNCTIONAL BLOCK DIAGRAM
A0
VCC
GND
16,384-BIT
MEMORY ARRAY
ADDRESS
DECODE
A13
DIN
DOUT
I/O CONTROL
CS
CONTROL
LOGIC
WE
2981 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MARCH 1996
1996 Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
2981/5
5.2
1
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATIONS
Symbol
Rating
Com’l.
Mil.
Unit
V
A
A
A
A
A
A
A
CC
13
12
11
10
9
A
A
A
A
A
A
A
0
1
2
3
4
5
6
1
2
3
4
5
6
7
20
19
18
17
16
15
14
VTERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0
with Respect
to GND
V
P20-1,
D20-1,
&
TA
Operating
0 to +70
–55 to +125 °C
Temperature
TBIAS
TSTG
Temperature
Under Bias
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
S020-1
Storage
8
Temperature
D
OUT
8
13
12
11
7
PT
Power Dissipation
1.0
50
1.0
50
W
WE
9
D
IN
IOUT
DC Output
Current
mA
GND
10
CS
2981 drw 02
NOTE:
2981 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DIP/SOJ
TOP VIEW
PIN DESCRIPTIONS
A0–A13
Address Inputs
Chip Select
Write Enable
Power
CS
WE
VCC
DIN
DATAIN
DOUT
GND
DATAOUT
Ground
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Max. Unit
2981 tbl 01
CIN
VIN = 0V
7
7
pF
pF
COUT
VOUT = 0V
NOTE:
2981 tbl 04
TRUTH TABLE (1)
1. This parameter is determined by device characterization, but is not
production tested.
Mode
Standby
Read
Output
High-Z
Power
CS
H
WE
X
Standby
Active
L
H
DATAOUT
High-Z
Write
L
L
Active
NOTE:
1. H = VIH, L = VIL, X = Don't Care.
2981 tbl 02
RECOMMENDED DC OPERATING
CONDITIONS
Symbol
Parameter
Supply Voltage
Supply Voltage
Input High Voltage
Input Low Voltage
Min. Typ. Max. Unit
VCC
4.5
0
5.0
0
5.5
0
V
GND
VIH
V
V
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
2.2
—
—
6.0
0.8
VIL
–0.5(1)
V
Grade
Military
Commercial
Temperature
–55°C to +125°C
0°C to +70°C
GND
VCC
NOTE:
2981 tbl 05
1. VIL (min.) = –3.0V for pulse width less than 20ns, once per cycle.
0V
5V ± 10%
5V ± 10%
0V
2981 tbl 06
5.2
2
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6167SA/LA15 6167SA/LA20 6167SA/LA25
DC ELECTRICAL CHARACTERISTICS(1)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC – 0.2V)
Symbol
Parameter
Power Com’l. Mil. Com’l. Mil. Com’l. Mil.
Unit
ICC1
Operating Power Supply Current
CS ≤ VIL, Outputs Open,
VCC = Max., f = 0(3)
SA
90
90
90
90
90
90
mA
LA
SA
55
60
55
60
55
60
ICC2
ISB
Dynamic Operating Current
120
130
100
110
100
100
mA
mA
CS ≤ VIL, Outputs Open,
(3)
VCC = Max., f = fMAX
LA
SA
100
50
110
50
80
35
85
35
70
35
75
35
Standby Power Supply Current
(TTL Level)
CS ≥ VIH, Outputs Open,
VCC = Max., f = fMAX
LA
35
35
30
30
25
25
(3)
ISB1
Full Standby Power Supply Current
(CMOS Level)
SA
LA
5
10
2
5
10
2
5
10
mA
CS ≥ VHC, VCC = Max.
0.9
0.05
0.05
0.9
VIN ≥ VHC or VIN ≤ VLC, f = 0(3)
DC ELECTRICAL CHARACTERISTICS(1) (CONTINUED)
(VCC = 5.0V ± 10%, VLC = 0.2V, VHC = VCC – 0.2V)
6167SA/LA35 6167SA/LA45(2) 6167SA/LA55(2) 6167SA/LA70(2)
Symbol
Parameter
Power Com’l. Mil. Com’l. Mil. Com’l. Mil. Com’l. Mil.
Unit
ICC1
Operating Power Supply Current
CS ≤ VIL, Outputs Open,
VCC = Max., f = 0(3)
SA
90
90
—
90
—
90
—
90
mA
LA
SA
55
60
—
—
60
—
—
60
—
—
60
ICC2
ISB
Dynamic Operating Current
100
100
100
100
100
mA
mA
CS ≤ VIL, Outputs Open,
(3)
VCC = Max., f = fMAX
LA
SA
65
35
70
35
—
—
65
35
—
—
60
35
—
—
60
35
Standby Power Supply Current
(TTL Level)
CS ≥ VIH, Outputs Open,
VCC = Max., f = fMAX
LA
20
20
—
20
—
20
—
15
(3)
ISB1
Full Standby Power Supply Current
(CMOS Level)
SA
LA
5
10
—
—
10
—
—
10
—
—
10
mA
CS ≥ VHC, VCC = Max.
0.05
0.9
0.9
0.9
0.9
VIN ≥ VHC or VIN ≤ VLC, f = 0(3)
NOTES:
2981 tbl 07
1. All values are maximum guaranteed values.
2. –55°C to +125°C temperature range only. Also available; 85ns and 100ns Military devices.
3. fMAX = 1/tRC, only address inputs cycling at fMAX. f = 0 means no Address inputs change.
5.2
3
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
VCC = 5.0V ± 10%
IDT6167SA
IDT6167LA
Symbol
Parameter
Test Condition
VCC = Max.,
VIN = GND to VCC
Min.
Max.
Min.
Max.
Unit
|ILI|
Input Leakage Current
MIL
—
—
10
5
—
—
5
2
µA
COM’L
|ILO|
Output Leakage Current VCC = Max., CS= VIH,
VOUT = GND to VCC
MIL
—
—
10
5
—
—
5
2
µA
COM’L
VOL
VOH
Output Low Voltage
Output High Voltage
IOL = 8mA, VCC = Min.
IOH = –4mA, VCC = Min.
—
0.4
—
—
0.4
—
V
2.4
2.4
V
2981 tbl 08
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(LA Version Only) VLC = 0.2V, VHC = VCC – 0.2V
Typ. (1)
VCC @
Max.
VCC @
Symbol
VDR
Parameter
Test Condition
Min.
2.0
—
2.0v
—
3.0V
—
2.0V
—
3.0V
Unit
V
VCC for Data Retention
Data Retention Current
—
—
300
30
ICCDR
MIL.
0.5
0.5
—
1.0
1.0
—
200
20
µA
COM’L.
—
tCDR
Chip Deselect to Data
Retention Time
CS ≥ VHC
VIN ≥ VHC or ≤ VLC
0
—
—
ns
ns
(3)
tR
(2)
Operation Recovery Time
Input Leakage Current
tRC
—
—
—
—
—
2
—
2
|ILI|(3)
—
—
µA
NOTES:
1. TA = +25°C.
2. tRC = Read Cycle Time.
2981 tbl 09
3. This parameter is guaranteed by device characterization, but is not production tested.
LOW VCC DATA RETENTION WAVEFORM
DATA
RETENTION
MODE
VCC
4.5V
4.5V
VDR ≥ 2V
tCDR
tR
VDR
VIH
VIH
CS
2981 drw 03
5.2
4
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
5ns
1.5V
Input Timing Reference Levels
Output Reference Levels
AC Test Load
1.5V
See Figures 1 and 2
2981 tbl 10
5V
5V
480Ω
480
Ω
DATAOUT
DATAOUT
255Ω
255Ω
5pF*
30pF*
2981 drw 04
2981 drw 05
Figure 2. AC Test Load
(for tCLZ, tCHZ, tWHZ and tOW)
Figure 1. AC Test Load
*Includes scope and jig.
AC ELECTRICAL CHARACTERISTICS (VCC = 5.0V ± 10%, All Temperature Ranges)
6167SA15 6167SA20/25 6167SA35/45(1) 6167SA55(1)/70(1)
6167LA15
6167LA20/25 6167LA35/45(1) 6167LA55(1)/70(1)
Symbol
Parameter
Min. Max.
Min. Max. Min. Max.
Min.
Max. Unit
Read Cycle
tRC
tAA
Read Cycle Time
Address Access Time
15
—
—
3
—
15
15
—
10
—
—
15
20/25
—
—
20/25
20/25
—
35/45
—
—
35/45
35/45
—
55/70
—
—
55/70
55/70
—
ns
ns
ns
ns
ns
ns
ns
ns
tACS
Chip Select Access Time
—
—
—
(2)
tCLZ
tCHZ
tOH
Chip Deselect to Output in Low-Z
Chip Select to Output in High-Z
Output Hold from Address Change
Chip Select to Power-Up Time
Chip Deselect to Power-Down Time
5/5
—
5/5
—
5/5
—
(2)
—
3
10/10
—
15/30
—
40/40
—
5/5
0/0
—
5/5
0/0
—
5/5
0/0
—
(2)
tPU
tPD
0
—
—
—
(2)
—
20/25
35/45
55/70
Write Cycle
tWC
tCW
tAW
tAS
Write Cycle Time
15
15
15
0
—
—
—
—
—
—
—
—
7
20/20
15/20
15/20
0/0
—
—
—
—
—
—
—
—
8/8
—
30/45
30/40
30/40
0/0
—
—
55/70
45/55
45/55
0/0
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
—
—
—
—
tWP
tWR
tDW
tDH
Write Pulse Width
13
0
15/20
0/0
30/30
0/0
—
35/40
0/0
—
Write Recovery Time
—
—
Data Valid to End-of-Write
Data Hold Time
10
0
12/15
0/0
17/20
0/0
—
25/30
0/0
—
—
—
(2)
tWHZ
Write Enable to Output in High-Z
Output Active from End-of-Write
—
0
—
—
15/30
—
—
40/40
—
(2)
tOW
—
0/0
0/0
0/0
ns
NOTES:
1. –55°C to +125°C temperature range only. Also available: 85ns and 100ns Military devices.
2981 tbl 11
2. This parameter is guaranteed with AC Load (Figure 2) by device characterization, but is not production tested.
5.2
5
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(1, 2)
TIMING WAVEFORM OF READ CYCLE NO. 1
tRC
ADDRESS
tAA
tOH
PREVIOUS DATAOUT VALID
DATAOUT
DATAOUT VALID
2981 drw 06
(1, 3)
TIMING WAVEFORM OF READ CYCLE NO. 2
tRC
CS
(4)
tACS
tCHZ
(4)
tCLZ
HIGH IMPEDANCE
HIGH
DATAOUT
DATAOUT VALID
IMPEDANCE
t
PU
tPD
I
CC
SB
V
CC SUPPLY
CURRENT
I
2981 drw 07
NOTES:
1. WE is HIGH for Read cycle.
2. Device is continuously selected, CS is LOW.
3. Address valid prior to or coincedent with CS transition LOW.
4. Transition is measured ±200mV from steady state.
5.2
6
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TIMING WAVEFORM OF WRITE CYCLE NO. 1, (
CONTROLLED TIMING)(1, 2, 4)
WE
tWC
ADDRESS
tAW
CS
(5)
(3)
WR
tCHZ
t
tAS
tWP
WE
(5)
tWHZ
(5)
t
OW
(6)
DATAOUT
DATAOUT
DATAIN
PREVIOUS DATAOUT VALID
(6)
VALID
t
DW
tDH
DATAIN VALID
2981 drw 08
TIMING WAVEFORM OF WRITE CYCLE NO. 2, (
CONTROLLED TIMING)(1, 2, 4)
CS
tWC
ADDRESS
tAW
CS
(3)
tAS
tCW
tWR
WE
tDW
tDH
DATAIN
DATAIN VALID
2981 drw 09
NOTES:
1. WE or CS must be inactive during all address transitions.
2. A write occurs during the overlap of a LOW CS and a LOW WE.
3. tWR is measured from the earlier of CS or WE going HIGH to the end of the write cycle.
4. If the CS low transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state.
5. Transition is measured ±200mV from steady state.
6. During this period, the I/O pins are in the output state and the input signals must not be applied.
5.2
7
IDT6167SA/LA
CMOS STATIC RAM 16K (16K x 1-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
X
6167
XXX
XX
Device
Type
Power
Speed
Package
Process/
Temperature
Range
Blank
B
Commercial (0°C to +70°C)
Military (–55°C to +125°C)
Compliant to MIL-STD-883, Class B
P
D
Y
300MIL Plastic DIP (P20–1)
300MIL CERDIP (D20–1)
300MIL SOJ (SO20–1)
15
20
25
35
45
55
70
85
100
Military Only
Military Only
Military Only
Military Only
Military Only
Speed in nanoseconds
SA
LA
Standard Power
Low Power
2981 drw 10
5.2
8
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