IDT54FCT299CD [IDT]
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER; FAST CMOS 8输入通用移位寄存器
| 型号： | IDT54FCT299CD |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER |
| 文件： | 总7页 (文件大小：104K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT54/74FCT299
IDT54/74FCT299A
IDT54/74FCT299C
FAST CMOS
8-INPUT UNIVERSAL
SHIFT REGISTER
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• IDT54/74FCT299 equivalent to FAST speed
• IDT54/74FCT299A 25% faster than FAST
• IDT54/74FCT299C 35% faster than FAST
• Equivalent to FAST output drive over full temperature
and voltage supply extremes
• IOL = 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
The IDT54/74FCT299 and IDT54/74FCT299A/C are built
usinganadvanceddualmetalCMOStechnology. TheIDT54/
74FCT299 and IDT54/74FCT299A/C are 8-input universal
shift/storage registers with 3-state outputs. Four modes of
operation are possible: hold (store), shift left, shift right and
load data. The parallel load inputs and flip-flop outputs are
multiplexed to reduce the total number of package pins.
Additional outputs are provided for flip-flops Q0 and Q7 to
allow easy serial cascading. A separate active LOW Master
Reset is used to reset the register.
• Substantially lower input current levels than FAST
(5µA max.)
• 8-input universal shift register
• JEDEC standard pinout for DIP and LCC
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing# 5962-86862 is listed on this
function. Refer to section 2.
FUNCTIONAL BLOCK DIAGRAM
S1
S0
DS7
DS0
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
CP
CP
CP
CP
CP
CP
CP
CP
CD
CD
CD
CD
CD
CD
CD
CD
Q0
Q7
MR
OE1
OE2
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
2561 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MAY 1992
1994 Integrated Device Technology, Inc.
7.11
DSC-4604/3
1
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
INDEX
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
S0
OE1
OE2
I/O6
I/O4
I/O2
I/O0
Q0
Vcc
S1
DS7
Q7
I/O7
I/O5
I/O3
I/O1
CP
3
2
20 19
18
I/O
I/O
I/O
I/O
Q
6
4
2
0
0
4
5
6
7
8
DS
Q7
7
1
P20-1
D20-1
S020-2
&
17
16
15
14
L20-2
I/O
I/O
I/O
7
5
E20-1
3
10 11 12 13
9
MR
GND
DS0
DIP/SOIC/CERPACK
TOP VIEW
2561 drw 02
LCC
TOP VIEW
FUNCTION TABLE(1)
PIN DESCRIPTION
Inputs
Pin Names
Description
S1
X
H
L
S0
X
H
H
L
CP
X
↑
Response
Asynchronous Reset Q0–Q7 = LOW
Parallel Load; I/On → Qn
Shift Right; DS0 → Q0, Q0 → Q1, etc.
Shift Left; DS7 → Q7, Q7→ Q6, etc.
Hold
MR
CP
Clock Pulse Input (Active Edge Rising)
Serial Data Input for Right Shift
Serial Data Input for Left Shift
L
DS0
H
H
DS7
↑
S0, S1
MR
Mode Select Inputs
H
H
L
↑
Asynchronous Master Reset Input (Active LOW)
3-State Output Enable Inputs (Active LOW)
Parallel Data Inputs or 3-State Parallel Outputs
Serial Outputs
H
L
X
OE1, OE2
I/O0–I/O7
Q0, Q7
NOTE:
2561 tbl 02
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
2561 tbl 01
↑ = LOW-to-HIGH clock transition
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
Symbol
Rating
Commercial
Military
Unit
(2)
VTERM
Terminal Voltage
with Respect
to GND
–0.5 to +7.0 –0.5 to +7.0
V
CIN
Input Capacitance VIN = 0V
I/O Capacitance VOUT = 0V
6
8
10
12
pF
pF
CI/O
(3)
NOTE:
2561 tbl 04
VTERM
Terminal Voltage
with Respect
to GND
–0.5 to VCC –0.5 to VCC
V
1. This parameter is guaranteed by characterization data and not tested.
TA
Operating
0 to +70
–55 to +125 °C
Temperature
TBIAS
TSTG
Temperature
Under Bias
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Storage
Temperature
PT
Power Dissipation
DC Output Current
0.5
0.5
W
IOUT
120
120
mA
NOTES:
2561 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed Vcc by +0.5 unless otherwise noted.
2. Inputs and VCC terminals only.
3. Outputs and I/O terminals only.
7.11
2
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
Parameter
Test Conditions(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
Min.
2.0
—
Typ.(2)
Max.
—
Unit
V
Input HIGH Level
Input LOW Level
Input HIGH Current
(Except I/O Pins)
Input LOW Current
(Except I/O Pins)
Input HIGH Current
(I/O Pins Only)
—
VIL
—
0.8
5
5(4)
–5(4)
–5
V
IIH
VCC = Max.
VI = VCC
—
—
µA
VI = 2.7V
VI = 0.5V
VI = GND
VI = VCC
VI = 2.7V
VI = 0.5V
VI = GND
—
—
IIL
IIH
IIL
—
—
—
—
VCC = Max.
—
—
15
µA
—
—
15(4)
–15(4)
–15
–1.2
—
Input LOW Current
(I/O Pins Only)
—
—
—
—
VIK
IOS
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
Vcc = Min., IN = –18mA
Vcc = Max.(3), VO = GND
—
–0.7
–120
VCC
VCC
4.3
4.3
GND
GND
0.3
0.3
V
mA
V
–60
VHC
VHC
2.4
2.4
—
VOH
Vcc = 3V, VIN = VLC or VHC, IOH = –32µA
—
Vcc = Min.
IOH = –300µA
—
VIN = VIH or VIL
IOH = –12mA MIL.
IOH = –15mA COM’L.
—
—
VOL
Output LOW Voltage
Vcc = 3V, VIN = VLC or VHC, IOL = 300µA
VLC
V
(4)
Vcc = Min.
IOL = 300µA
—
VLC
VIN = VIH or VIL
IOL = 32mA MIL.
IOL = 48mA COM’L.
—
0.5
0.5
—
NOTES:
2561 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
7.11
3
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
ICC
Quiescent Power Supply
Current
Vcc = Max.
VIN ≥ VHC; VIN ≤ VLC
—
0.2
1.5
mA
∆ICC
Quiescent Power Supply
Current TTL Inputs HIGH
Vcc = Max.
—
—
0.5
2.0
mA
VIN = 3.4V(3)
ICCD
Dynamic Power Supply
Current(4)
Vcc = Max.
VIN ≥ VHC
VIN ≤ VLC
0.15
0.25 mA/MHz
Outputs Open
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS1 = GND
One Input Toggling
50% Duty Cycle
IC
Total Power Supply
Current(6)
Vcc = Max.
Outputs Open
fCP = 10MHz
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
1.7
4.0
mA
50% Duty Cycle
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS7 = GND
One Bit Toggling
at fi = 5MHz
VIN = 3.4V
VIN = GND
—
—
2.2
4.0
6.0
50% Duty Cycle
Vcc = Max.
Outputs Open
fCP = 10MHz
VIN ≥ VHC
VIN ≤ VLC
(FCT)
7.8(5)
50% Duty Cycle
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS7 = GND
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
VIN = 3.4V
VIN = GND
—
6.2
16.8(5)
NOTES:
2561 tbl 06
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
7.11
4
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT299
Com’l. Mil.
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Min.(2) Max. Unit
IDT54/74FCT299A
IDT54/74FCT299C
Com’l. Mil.
Com’l. Mil.
Symbol
Parameter
tPLH
tPHL
Propagation Delay
CP to Q0 or Q7
CL = 50pF 2.0
RL = 500Ω
10.0 2.0 14.0 2.0
12.0 2.0 12.0 2.0
10.0 2.0 10.5 2.0
15.0 2.0 15.0 2.0
11.0 1.5 15.0 1.5
7.2
7.2
7.2
8.7
6.5
6.0
—
2.0
2.0
2.0
9.5
9.5
9.5
2.0
2.0
2.0
6.5
6.5
6.5
6.5
6.5
6.0
—
2.0
2.0
2.0
2.0
1.5
1.5
4.0
7.5
7.5
7.5
7.5
7.5
6.5
—
ns
ns
ns
ns
ns
ns
ns
tPLH
tPHL
Propagation Delay
CP to I/On
2.0
2.0
2.0
1.5
1.5
7.5
tPHL
Propagation Delay
MRto Q0 or Q7
tPHL
Propagation Delay
MRto I/On
2.0 11.5 2.0
tPZH
tPZL
Output Enable Time
OEn to I/On
1.5
1.5
4.0
7.5
6.5
—
1.5
1.5
3.5
tPHZ
tPLZ
Output Disable Time
OEn to I/On
7.0
—
1.5
7.5
9.0
—
1.5
3.5
tSU
Set-up Time HIGH
or LOW
S0 or S1 to CP
tH
Hold Time HIGH
or LOW
S0 or S1 to CP
1.0
5.5
1.5
—
—
—
1.0
5.5
1.5
—
—
—
1.0
4.0
1.5
—
—
—
1.0
4.5
1.5
—
—
—
1.0
4.0
1.5
—
—
—
1.0
4.5
1.5
—
—
—
ns
ns
ns
tSU
tH
Set-up Time HIGH
or LOW I/On, DS0
or DS7 to CP
Hold Time HIGH
or LOW I/On, DS0
or DS7 to CP
tW
CP Pulse width
HIGH or LOW
7.0
7.0
7.0
—
—
—
7.0
7.0
7.0
—
—
—
5.0
5.0
5.0
—
—
—
6.0
6.0
6.0
—
—
—
5.0
5.0
5.0
—
—
—
6.0
6.0
6.0
—
—
—
ns
ns
tW
MR Pulse Width
LOW
tREM
Recovery Time
MR to CP
ns
NOTES:
2561 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
7.11
5
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
VCC
SWITCH POSITION
Test
Switch
Closed
Open
7.0V
Open Drain
Disable Low
Enable Low
500Ω
VOUT
VIN
Pulse
Generator
D.U.T.
All Other Tests
50pF
CL
500Ω
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
2561 tbl 08
R T
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
1.5V
0V
DATA
INPUT
tSU
t H
LOW-HIGH-LOW
1.5V
3V
1.5V
0V
TIMING
INPUT
PULSE
t W
ASYNCHRONOUS CONTROL
t REM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
t H
tSU
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
3V
CONTROL
INPUT
1.5V
0V
SAME PHASE
INPUT TRANSITION
1.5V
0V
tPZL
tPLZ
tPHL
tPLH
3.5V
1.5V
3.5V
OUTPUT
NORMALLY
LOW
VOH
SWITCH
CLOSED
OUTPUT
1.5V
0.3V
0.3V
VOL
VOH
tPZH
tPHZ
VOL
tPLH
tPHL
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
3V
1.5V
0V
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
0V
NOTES
2561 drw 04
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; ZO ≤ 50Ω; tF ≤ 2.5ns;
tR ≤ 2.5ns.
7.11
6
IDT54/74FCT299/A/C
FAST CMOS 8-INPUT UNIVERSAL SHIFT REGISTER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
X
X
IDT
XX
X
FCT
Process
Temperature
Range
Device Type Package
Blank
B
Commercial
MIL-STD-883, Class B
P
Plastic DIP
D
CERDIP
SO
L
E
Small Outline IC
Leadless Chip Carrier
CERPACK
299
8-Input Universal Shift Register
299A Fast 8-Input Universal Shift Register
299C Super Fast 8-Input Universal Shift Register
54
74
–55°C to +125°C
0°C to +70°C
2561 drw 03
7.11
7
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