IDT54FCT138PB [IDT]
FAST CMOS 1-OF-8 DECODER WITH ENABLE; FAST CMOS 1 - OF- 8解码器启用型号: | IDT54FCT138PB |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | FAST CMOS 1-OF-8 DECODER WITH ENABLE |
文件: | 总6页 (文件大小:70K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IDT54/74FCT138
IDT54/74FCT138A
IDT54/74FCT138C
FAST CMOS
1-OF-8 DECODER
WITH ENABLE
Integrated Device Technology, Inc.
FEATURES:
DESCRIPTION:
• IDT54/74FCT138 equivalent to FAST speed
• IDT54/74FCT138A 35% faster than FAST
• IDT54/74FCT138C 40% faster than FAST
• Equivalent to FAST speeds output drive over full tem-
perature and voltage supply extremes
• IOL = 48mA (commercial) and 32mA (military)
• CMOS power levels (1mW typ. static)
• TTL input and output level compatible
• CMOS output level compatible
The IDT54/74FCT138/A/C are 1-of-8 decoders built using
an advanced dual metal CMOS technology. The IDT54/
74FCT138/A/C accept three binary weighted inputs (A0, A1,
A2) and, when enabled, provide eight mutually exclusive
active LOW outputs (O0 - O7). The IDT54/74FCT138/A/C
feature three enable inputs, two active LOW (E1, E2) and one
active HIGH (E3). All outputs will be HIGH unless E1 and E2
are LOW and E3 is HIGH. This multiple enable function allows
easy parallel expansion of the device to a 1-of-32 (5 lines to
32 lines) decoder with just four IDT54/74FCT138/A/C devices
and one inverter.
• Substantially lower input current levels than FAST
(5µA max.)
• JEDEC standard pinout for DIP and LCC
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
• Standard Military Drawing # 5962-87654 is listed on this
function. Refer to section 2.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATIONS
A2
A1
A0
E3
E1 E2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
A
A
E
0
1
2
1
Vcc
O
O
0
P16-1,
D16-1,
SO16-1
&
1
O2
O3
O4
2
3
7
E
E
O
E16-1
O
5
O6
GND
DIP/SOIC/CERPACK
TOP VIEW
INDEX
3
2
20 19
18
4
5
6
7
8
A2
E1
NC
O1
O2
NC
1
17
16
15
14
L20-2
2
O3
O4
E
O7
O6
O5
O4
O3
O2
O1
O0
E3
10 11 12 13
9
2581 drw 02
2581 drw 01
LCC
TOP VIEW
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
MAY 1992
1992 Integrated Device Technology, Inc.
7.3
DSC-4625/3
1
IDT54/74FCT138/A/C
FAST CMOS 1-OF-8 DECODER-WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN DESCRIPTION
Pin Names
A0–A2
E1, E2
Description
Address Inputs
Enable Inputs (Active LOW)
Enable Input (Active HIGH)
Outputs (Active LOW)
E3
O0–O7
2581 tbl 05
FUNCTION TABLE
Inputs
Outputs
1
E
2
E
E3
A0
A1
A2
0
O
1
O
O2
3
O
4
O
5
O
6
O
7
O
H
X
X
X
H
X
X
X
L
X
X
X
X
X
X
X
X
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
L
L
L
L
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
H
H
L
H
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
L
H
H
2581 tbl 06
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions Typ. Max. Unit
Symbol
Rating
Commercial
Military
Unit
(2)
VTERM
Terminal Voltage
with Respect
to GND
–0.5 to +7.0 –0.5 to +7.0
V
CIN
Input Capacitance
VIN = 0V
6
8
10
12
pF
pF
COUT
Output Capacitance VOUT = 0V
(3)
NOTE:
2581 tbl 02
VTERM
Terminal Voltage
with Respect
to GND
–0.5 to VCC –0.5 to VCC
V
1. This parameter is guaranteed characterization data and not tested.
TA
Operating
0 to +70
–55 to +125 °C
Temperature
TBIAS
TSTG
Temperature
Under Bias
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Storage
Temperature
PT
Power Dissipation
DC Output Current
0.5
0.5
W
IOUT
120
120
mA
NOTES:
2581 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed VCC by +0.5V unless otherwise noted.
2. Inputs and VCC terminals only.
3. Outputs and I/O terminals only.
7.3
2
IDT54/74FCT138/A/C
FAST CMOS 1-OF-8 DECODER-WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V; VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Test Conditions(1)
Min.
2.0
—
Typ.(2)
Max.
—
Unit
V
Guaranteed Logic HIGH Level
—
VIL
Guaranteed Logic LOW Level
VCC = Max.
—
0.8
V
IIH
VI = VCC
VI= 2.7V
VI= 0.5V
VI = GND
—
—
5
µA
—
—
5(4)
–5(4)
–5
IIL
Input LOW Current
—
—
—
—
VIK
IOS
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VCC = Min., IN = –18mA
VCC = Max.(3), VO = GND
—
–0.7
–120
VCC
VCC
4.3
–1.2
—
V
mA
V
–60
VHC
VHC
2.4
2.4
—
VOH
VCC = 3V, VIN = VLC or VHC, IOH = –32µA
—
VCC = Min.
IOH = –300µA
—
VIN = VIH or VIL
IOH = –12mA MIL.
—
IOH = –15mA COM’L.
4.3
—
VOL
Output LOW Voltage
VCC = 3V, VIN = VLC or VHC, IOL = 300µA
GND
GND
0.3
VLC
V
(4)
VCC = Min.
IOL = 300µA
—
VLC
0.5
0.5
VIN = VIH or VIL
IOL = 32mA MIL.
IOL = 48mA COM’L.
—
—
0.3
NOTES:
2581 tbl 03
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
POWER SUPPLY CHARACTERISTICS
VLC = 0.2V; VHC = VCC – 0.2V
Symbol
Parameter
Test Conditions(1)
Vcc = Max.
Min.
Typ.(2)
Max.
Unit
ICC
Quiescent Power Supply Current
—
0.2
1.5
mA
VIN ≥ VHC; VIN ≤ VLC
∆ICC
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current(4)
Vcc = Max.
—
—
0.5
2.0
0.3
mA
VIN = 3.4V(3)
ICCD
Vcc = Max.
Outputs Open
VIN ≥ VHC
VIN ≤ VLC
0.15
mA/MHz
One Output Toggling
50% Duty Cycle
IC
Total Power Supply Current(5)
Vcc = Max.
VIN ≥ VHC
VIN ≤ VLC
(FCT)
—
—
1.7
2.0
4.5
5.5
mA
Outputs Open
Toggle E1, E2 or E3
50% Duty Cycle
fO = 10MHz
VIN = 3.4V
VIN = GND
One Output Toggling
NOTES:
2581 tbl 04
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fONO)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Output Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fO = Output Frequency
NO = Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
7.3
3
IDT54/74FCT138/A/C
FAST CMOS 1-OF-8 DECODER-WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT138
IDT54/74FCT138A
IDT54/74FCT138C
Com’l.
Mil.
Com’l.
Mil.
Com’l.
Mil.
(2)
(2)
(2)
(2)
(2)
(2)
Symbol
Parameter
Condition(1) Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
tPLH
tPHL
Propagation Delay
An to On
CL = 50pF
RL = 500Ω
1.5
9.0
9.0
9.0
1.5 12.0 1.5
1.5 12.5 1.5
1.5 12.5 1.5
5.8
5.9
5.9
1.5
7.8
1.5
1.5
1.5
5.1 1.5
5.2 1.5
5.2 1.5
6.0
6.1
6.1
ns
ns
ns
tPLH
tPHL
Propagation Delay
E1 or E2 to On
1.5
1.5
1.5
1.5
8.0
8.0
tPLH
tPHL
Propagation Delay
E3 to On
NOTES:
2581 tbl 07
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
7.3
4
IDT54/74FCT138/A/C
FAST CMOS 1-OF-8 DECODER-WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
VCC
SWITCH POSITION
Test
Switch
Closed
Open
7.0V
Open Drain
Disable Low
Enable Low
500Ω
V OUT
VIN
Pulse
Generator
D.U.T.
All Other Test
50pF
C L
500Ω
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
2581 tbl 08
RT
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
1.5V
0V
DATA
INPUT
tSU
t H
LOW-HIGH-LOW
1.5V
3V
1.5V
0V
TIMING
INPUT
PULSE
t W
ASYNCHRONOUS CONTROL
t REM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
CLEAR
CLOCK ENABLE
ETC.
3V
1.5V
0V
tH
t SU
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
3V
CONTROL
INPUT
1.5V
0V
SAME PHASE
INPUT TRANSITION
1.5V
0V
tPZL
tPLZ
tPHL
tPLH
3.5V
1.5V
3.5V
OUTPUT
NORMALLY
LOW
VOH
SWITCH
CLOSED
OUTPUT
1.5V
0.3V
0.3V
VOL
VOH
tPZH
tPHZ
VOL
tPLH
tPHL
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
3V
1.5V
0V
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
0V
NOTES
2581 drw 04
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0 MHz; ZO ≤ 50Ω; tF ≤ 2.5ns;
tR ≤ 2.5ns.
7.3
5
IDT54/74FCT138/A/C
FAST CMOS 1-OF-8 DECODER-WITH ENABLE
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT
XX
FCT
X
X
X
Temperature
Range
Device
Type
Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
P
Plastic DIP
D
CERDIP
SO
E
L
Small Outline IC
CERPACK
Leadless Chip Carrier
138
1-of-8 Decoder
138A
Fast 1-of-8 Decoder
138C Super Fast 1-of-8 Decoder
54
74
–55°C to +125°C
0°C to +70°C
2581 drw 03
7.3
6
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