IDT49FCT805CTQ [IDT]
FAST CMOS BUFFER/CLOCK DRIVER; 快速CMOS缓冲器/时钟驱动器
| 型号： | IDT49FCT805CTQ |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | FAST CMOS BUFFER/CLOCK DRIVER |
| 文件： | 总7页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT49FCT805BT/CT
IDT49FCT806BT/CT
FAST CMOS
BUFFER/CLOCK DRIVER
Integrated Device Technology, Inc.
• Military product compliant to MIL-STD-883, Class B
FEATURES:
• 0.5 MICRON CMOS Technology
• Guaranteed low skew < 500ps (max.)
• Very low duty cycle distortion < 600ps (max.)
• Low CMOS power levels
• TTL compatible inputs and outputs
• TTL level output voltage swings
• High drive: -32mA IOH, 48mA IOL
• Two independent output banks with 3-state control
• 1:5 fanout per bank
DESCRIPTION:
The IDT49FCT805BT/CT and IDT49FCT806BT/CT are
clock drivers built using advanced dual metal CMOS technol-
ogy. The IDT49FCT805BT/CT is a non-inverting clock driver
andtheIDT49FCT806BT/CTisaninvertingclockdriver.Each
device consists of two banks of drivers. Each bank drives five
output buffers from a standard TTL compatible input. The
805BT/CT and 806BT/CT have extremely low output skew,
pulse skew, and package skew. The devices has a "heart-
beat" monitor for diagnostics and PLL driving. The MON
output is identical to all other outputs and complies with the
output specifications in this document. The 805BT/CT and
806BT/CT offer low capacitance inputs with hysteresis.
• ‘Heartbeat’ monitor output
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Available in DIP, SOIC, SSOP, QSOP, Cerpack and
LCC packages
FUNCTIONAL BLOCK DIAGRAMS
IDT49FCT805T
IDT49FCT806T
OEA
OEA
5
5
5
IN
A
INA
INB
OA
1
1
-OA
5
5
OA1-OA5
OB1-OB5
5
INB
OB
-OB
OEB
OE
B
MON
MON
2920 drw 01
2920 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
OCTOBER 1995
1996 Integrated Device Technology, Inc.
9.2
DSC-2920/5
1
IDT49FCT805BT/CT, 806BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT49FCT805T
INDEX
VCC
OB1
OB2
OB3
GND
VCC
1
2
20
19
OA1
OA2
OA3
GND
3
2
20 19
1
3
4
18
17
OA
3
4
5
6
7
8
18
17
16
15
14
OB
2
3
GND
OB
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
OA
4
5
GND
L20-2
16
15
14
13
12
11
5
OA
OB
4
5
OA4
OA5
6
OB4
GND
OB
OB5
7
E20-1
9 10 11 12 13
MON
GND
8
OEB
INB
OEA
INA
9
10
LCC
TOP VIEW
2920 drw 04
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
2920 drw 03
IDT49FCT806T
INDEX
VCC
1
20
VCC
OA1
OA2
2
3
19
18
OB1
OB2
OB3
GND
3
9
2
20 19
1
OA
3
4
5
6
7
8
18
17
16
15
14
OB
OB
2
3
GND
OA3
GND
OA4
4
17
P20-1
D20-1
SO20-2
SO20-7
SO20-8
&
GND
OA
OA
4
5
L20-2
5
16
15
14
13
12
11
OB
OB
4
5
OB4
OB5
MON
6
GND
10 11 12 13
OA5
7
E20-1
GND
8
OEA
INA
9
OEB
INB
LCC
2920 drw 06
10
TOP VIEW
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
2920 drw 05
FUNCTION TABLE(1)
PIN DESCRIPTION
Outputs
Pin Names
OEA, OEB
Description
Inputs
49FCT805T
49FCT806T
3-State Output Enable Inputs (Active LOW)
A,
B
INA, INB OAn, OBn MON
n,
n
OE OE
OA OB
MON
INA, INB
OAn, OBn
OAn, OBn
MON
Clock Inputs
L
L
H
L
L
H
Z
Z
L
H
L
H
Clock Outputs (FCT805T)
Clock Outputs (FCT806T)
Monitor Output (FCT805T)
L
H
H
L
L
Z
Z
H
H
H
H
L
MON
Monitor Output (FCT806T)
2920 tbl 01
NOTE:
2920 tbl 02
1. H = HIGH, L = LOW, Z = High Impedance
9.2
2
IDT49FCT805BT/CT, 806BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Parameter(1)
Conditions
Typ. Max. Unit
Symbol
Rating
Commercial
Military
Unit
(2)
VTERM
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0
with Respect to
GND
V
CIN
Input
Capacitance
Output
VIN = 0V
4.5
5.5
6.0
pF
COUT
VOUT = 0V
8.0
pF
(3)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to VCC
+0.5
–0.5 to VCC
+0.5
V
Capacitance
2920 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
TA
Operating
Temperature
Temperature
Under Bias
Storage
0 to +70
–55 to +125 °C
TBIAS
TSTG
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Temperature
DC Output
Current
IOUT
–60 to +120 –60 to +120 mA
2920 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other condi-
tions above those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals.
3. Output and I/O terminals.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Min. Typ.(2) Max.
Unit
VIH
Guaranteed Logic HIGH Level
2.0
—
—
—
—
V
VIL
Input LOW Level
Guaranteed Logic LOW Level
0.8
V
I
I
I
I
I
I H
I L
Input HIGH Current(5)
Input LOW Current(5)
High Impedance Output Current
(3-State Output pins)(5)
Input HIGH Current(5)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
V
V
CC = Max.
CC = Max.
CC = Max.
V
V
V
V
I
I
= 2.7V
= 0.5V
—
—
±
±
±
±
±
1
1
1
1
1
µ
µ
µ
µ
µ
A
A
A
A
A
—
—
OZH
OZL
I
O
O
= 2.7V
= 0.5V
—
—
—
—
V
V
V
CC = Max., V
I
= VCC (Max.)
—
—
V
IK
CC = Min., IIN= –18mA
CC = Max.(3), V
—
–0.7
–1.2
V
I
OS
O
= GND
–60
2.4
–120 –225
mA
V
V
OH
OL
V
V
CC = Min.
IN = VIH or VIL
I
I
I
I
I
I
OH = –12mA MIL.
OH = –15mA COM'L.
OH = –24mA MIL.
OH = –32mA COM'L.(4)
OL = 32mA MIL.
3.3
3.0
0.3
—
2.0
—
—
V
Output LOW Voltage
V
V
V
CC = Min.
IN = VIH or VIL
0.55
V
OL = 48mA COM'L.
IOFF
Input/Output Power Off Leakage(5)
Input Hysteresis for all inputs
CC = 0V, VIN or V
O
≤
4.5V
—
—
—
—
—
150
5
±1
µA
V
H
—
mV
I
I
I
CCL
CCH
CCZ
Quiescent Power Supply Current
V
CC = Max., VIN = GND or VCC
500
µA
2920 lnk 05
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. Duration of the condition can not exceed one second.
5. The test limit for this parameter is ± 5µA at TA = –55°C.
9.2
3
IDT49FCT805BT/CT, 806BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Parameter
Test Conditions(1)
Min. Typ.(2) Max.
Unit
Quiescent Power Supply Current
TTL Inputs HIGH
V
V
CC = Max.
—
0.5
2.0
mA
∆ICC
IN = 3.4V(3)
I
CCD
Dynamic Power Supply Current(4)
Total Power Supply Current(6)
V
CC = Max.
V
IN = VCC
—
60
100
µA/
Outputs Open
OE = OE = GND
50% Duty Cycle
CC = Max.
VIN = GND
MHz/bit
mA
A
B
IC
V
VIN = VCC
—
—
1.5
1.8
3.0
4.0
Outputs Open
fo = 25MHz
VIN = GND
50% Duty Cycle
V
V
IN = 3.4V
IN = GND
OE
Mon. Output Toggling
CC = Max.
A = OEB =VCC
V
VIN = VCC
—
—
33
55.5(5)
Outputs Open
fo = 50MHz
VIN = GND
50% Duty Cycle
OEA = OEB = GND
V
V
IN = 3.4V
IN = GND
33.5 57.5(5)
Eleven Outputs
Toggling
2920 tbl 06
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fONO)
ICC = Quiescent Current (ICCL, ICCH and ICCZ)
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fO= Output Frequency
NO= Number of Outputs at fO
All currents are in milliamps and all frequencies are in megahertz.
9.2
4
IDT49FCT805BT/CT, 806BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE(3,4)
IDT49FCT805BT/806BT
IDT49FCT805CT/806CT
Com'l.
Mil.
Com'l.
Mil.
(2)
(2)
(2)
(2)
Condition(1)
CL = 50pF
RL = 500Ω
Unit
Min.
Max. Min.
Max. Min.
Max. Min.
Max.
Symbol
tPLH
tPHL
Parameter
Propagation Delay
INA to OAn, INB to OBn
Output Rise Time
1.5
5.0
1.5
5.7
1.5
4.5
1.5
5.2
ns
tR
tF
—
—
—
1.5
1.5
0.7
—
—
—
2.0
1.5
0.9
—
—
—
1.5
1.5
0.5
—
—
—
2.0
1.5
0.7
ns
ns
ns
Output Fall Time
tSK(o) Output skew: skew between outputs of all
banks of same package (inputs tied together)
tSK(p) Pulse skew: skew between opposite
transitions of same output (|tPHL–tPLH|)
—
—
0.7
1.2
—
—
0.9
1.5
—
—
0.6
1.0
—
—
0.8
1.2
ns
ns
tSK(t) Package skew: skew between outputs of
different packages at same power supply
voltage, temperature, package type and
speed grade
tPZL
tPZH
Output Enable Time
1.5
1.5
6.0
6.0
1.5
1.5
6.5
6.5
1.5
1.5
5.0
5.0
1.5
1.5
6.0
6.0
ns
OEA to OAn, OEB to OBn
Output Disable Time
OEA to OAn, OEB to OBn
tPLZ
ns
tPHZ
2920 tbl 07
NOTES:
1. See test circuits and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. tPLH, tPHL, tSK(t) are production tested. All other parameters guaranteed but not production tested.
4. Propagation delay range indicated by Min. and Max. limit is due to VCC, operating temperature and process parameters. These propagation delay
limits do not imply skew.
9.2
5
IDT49FCT805BT/CT, 806BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUIT FOR ALL OUTPUTS
VCC
ENABLE AND DISABLE TIME
SWITCH POSITION
7.0V
Test
Disable LOW
Enable LOW
Switch
Closed
500Ω
500Ω
V OUT
VIN
Disable HIGH
Enable HIGH
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Open
Pulse
Generator
D.U.T.
2920 lnk 08
50pF
C L
R T
Generator.
2920drw07
OUTPUT SKEW- tSK(o)
PACKAGE DELAY
3V
3V
1.5V
0V
1.5V
0V
INPUT
tPLH1
tPHL1
INPUT
VOH
tPLH
tPHL
1.5V
VOL
VOH
1.5V
VOL
OUTPUT 1
OUTPUT 2
2.0V
0.8V
tSK(o)
tSK(o)
VOH
1.5V
VOL
OUTPUT
tF
tPLH2
tR
tPHL2
2920 drw 08
tSK(o) = |tPLH2 - tPLH1| or |tPHL2 - tPHL1|
2920 drw 09
PULSE SKEW - tSK(p)
PACKAGE SKEW - tSK(t)
3V
1.5V
0V
3V
INPUT
tPLH1
1.5V
0V
tPHL1
INPUT
VOH
1.5V
VOL
tPHL
tPLH
VOH
1.5V
VOL
PACKAGE 1 OUTPUT
tSK(t)
tSK(t)
VOH
1.5V
VOL
OUTPUT
PACKAGE 2 OUTPUT
tSK(p) = |tPHL -tPLH|
tPLH2
tPHL2
tSK(t) = |tPLH2 - tPLH1| or |tPHL2 -tPHL1|
Package 1 and Package 2 are same device type and speed grade
2920 drw 10
2920 drw 11
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
CONTROL
INPUT
1.5V
0V
t PZL
t PLZ
3.5V
1.5V
3.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
t
t PZH
PHZ
OUTPUT
NORMALLY
HIGH
0.3V VOH
0V
SWITCH
OPEN
1.5V
0V
2920 drw 12
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH
2. Pulse Generator for All Pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
9.2
6
IDT49FCT805BT/CT, 806BT/CT
FAST CMOS BUFFER/CLOCK DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
X
IDT49FCT
XXX
Device Type
XX
Package
Process/
Temperature
Range
Blank
B
Commercial (0
°C to +70°C)
MIL-STD-883, Class B (–55°C to +125°C)
P
Plastic DIP
D
CERDIP
E
L
SO
PY
Q
CERPACK
Leadless Chip Carrier
Small Outline IC
Shrink Small Outline IC
Quarter-size Small Outline Package
805BT
806BT
805CT
806CT
Non-Inverting Buffer/Clock Driver
Inverting Buffer/Clock Driver
2920 drw 13
9.2
7
相关型号：
IDT49FCT805CTQG
Low Skew Clock Driver, FCT Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, GREEN, QSOP-20
IDT
IDT49FCT805CTSO8
Low Skew Clock Driver, FCT Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, SOIC-20
IDT
IDT49FCT805CTSOG
Low Skew Clock Driver, FCT Series, 5 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, GREEN, SOIC-20
IDT
©2020 ICPDF网 联系我们和版权申明