IDT49FCT5805Q [IDT]
Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20;型号: | IDT49FCT5805Q |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Low Skew Clock Driver, FCT Series, 10 True Output(s), 0 Inverted Output(s), CMOS, PDSO20, QSOP-20 驱动 光电二极管 逻辑集成电路 |
文件: | 总6页 (文件大小:96K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
GUARANTEED LOW SKEW
CMOS CLOCK
IDT49FCT5805/A/B/C
ADVANCE
DRIVER/BUFFER
INFORMATION
DESCRIPTION
FEATURES:
−
−
−
−
−
−
10 CMOS outputs
Monitor output
Rail-to-rail output voltage swing
Input hysteresis for better noise margin
Monitor output
The 49FCT5805 clock buffer/driver circuits can be used for clock
bufferingschemes where lowskewis a keyparameter.This device offers
twobanks offive non-invertingoutputs.The 49FCT5805device provides
low propagation delay buffering with on-chip skew of 0.3ns for same-
transition,same-banksignals.
Guaranteed low skew:
The 49FCT5805 is characterized for operation at -40°C to +85°C.
•
•
•
0.3ns output skew
0.6ns opposite transition
1ns different devices
−
−
Std., A, B, and C speed grades
Available in QSOP and SOIC packages
FUNCTIONALBLOCKDIAGRAM
OEA
INA
5
OA5 OA1
MON
5
INB
OB5 OB1
OEB
INDUSTRIAL TEMPERATURE RANGE
MARCH 2000
1
c
1999 Integrated Device Technology, Inc.
DSC-4579/-
IDT49FCT5805/A/B/C
GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS (1)
PINCONFIGURATION
Symbol
Description
Supply Voltage to Ground
DC Output Voltage VOUT
DC Input Voltage VIN
Max.
– 0.5 to +7
– 0.5 to +7
– 0.5 to +7
-3
Unit
V
(2)
VTERM
VCCB
OB1
VCCA
1
2
20
V
OA1
OA2
(3)
19
18
17
16
15
14
13
12
11
V
VTERM
OB2
V
AC
AC Input Voltage (pulse width ≤20ns)
V
3
OA3
IOUT
DC Output Current VIN < 0
-20
120
mA
mA
W
OB3
4
DC Output Current Max. Sink Current/Pin
GNDA
GNDB
5
SO20-2
SO20-8
PMAX
Maximum Power
QSOP
SOIC
.82
OA4
OA5
OB4
OB5
MON
OEB
INB
6
Dissipation (TA = 85°C)
Storage Temperature
.75
W
7
TSTG
– 65 to +150
°C
GNDQ
8
NOTES:
OEA
INA
9
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc Terminals.
10
QSOP/ SOIC
TOP VIEW
3. All terminals except Vcc.
O
CAPACITANCE (TA = +25 C, f = 1.0MHz, VIN = 0V)
QSOP
SOIC
Max. (1)
Pins
Typ.
Max. (1)
Typ.
Unit
CIN
4
6
5
6
pF
NOTE:
1. This parameter is guaranteed but not production tested.
PIN DESCRIPTION
Pin Names
I/O
Description
Output Enable Inputs
OEA, OEB
I
INA, INB
OAn, OBn
MON
I
Clock Inputs
O
O
Clock Outputs
Monitor Outputs (non-disable)
2
IDT49FCT5805/A/B/C
GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = -40°C to +85°C, VCC = 5.0V ± 10%, VHC = VCC - 0.2V, VLC = 0.2V
Symbol
Parameter
Input HIGH Voltage
Test Conditions
Min.
Typ.(1)
Max.
Unit
VIH
Guaranteed Logic HIGH for All Inputs
2
—
—
V
VIL
Input LOW Voltage
Clamp Diode Voltage (3)
Guaranteed Logic LOW for All Inputs
Vcc = Min., IIN = -18mA
—
—
—
–0.7
Vcc
4.3
3.8
GND
0.3
—
0.8
–1.2
—
V
V
VIC
VOH
Output HIGH Voltage
Vcc = Min., VIN = VIH or VIL, IOH = -300µA
Vcc = Min., VIN = VIH or VIL, IOH = -15mA
Vcc = Min., VIN = VIH or VIL, IOH = -24mA
Vcc = Min., VIN = VIH or VIL, IOL = 300µA
Vcc = Min., VIN = VIH or VIL, IOL = 64mA
Vcc = Max., VIN = Vcc or GND
VHC
3.6
2.4
—
—
V
V
—
VOL
Output LOW Voltage
VLC
0.55
±1
—
IIN
Input Leakage Current
Output Leakage Current
I/O Power Off Leakage
—
µA
µA
µA
mA
V
IOZ
IOFF
IOS
Vcc = Max., VOUT = Vcc or GND
Vcc = 0V, VIN or VO ≤ 4.5V
—
—
±1
—
—
±1
(2,3)
Short Circuit Current
Input Hysteresis
Vcc = Max., VOUT = GND
—
—
60
–
—
∆VT
VTLH - VTHL for All Inputs
0.2
—
NOTES:
1. Typical values are at VCC = 5.0V, TA = 25°C.
2. Not more than one output should be used to test this high power condition. Duration is less than one second.
3. Guaranteed by design but not tested.
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions (1)
VCC = Max., VIN = GND or Vcc
CC = Max., V = 3.4V
Typ. (3)
Max.
Unit
ICC
Quiescent Power Supply Current
0.005
0.5
0.5
2.5
0.2
mA
∆ICC
Supply Current per Input HIGH
V
mA
IN
ICCD
Dynamic Power Supply Current per Output (2) VCC = Max., OEA = OEB = GND
0.1
mA/MHz
Outputs Enabled, 50% duty cycle
IC
Total Supply Current Examples (2,4)
VCC = Max.,
VIN = GND or Vcc
VIN = GND or 3.4V
VIN = GND or Vcc
VIN = GND or 3.4V
5
3
mA
OEA = OEB = GND
50% duty cycle, fI = 10MHz
Five outputs toggling
VCC = Max.,
OEA = OEB = GND
50% duty cycle, fI = 2.5MHz
All outputs toggling
NOTES:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
2. Guaranteed by design but not tested. CL = 0pF.
3. Typical values are for reference only. Conditions are VCC = 5.0V, TA = 25°C.
4. IC = ICC + (∆ICC)(DH)(NT) + ICCD (fO)(NO)
where:
DH = Input Duty Cycle
NT = Number of TTL HIGH inputs at DH
fO = Output Frequency
NO = Number of outputs at fO
3
IDT49FCT5805/A/B/C
GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
SKEW CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 5.0V ± 10%
CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
49FCT5805
49FCT5805/A
49FCT5805/B
49FCT5805/C
Parameter (1)
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Symbol
tSK(01)
Skew between all outputs, same transition, same bank
—
0.5
—
0.35
—
0.3
—
0.3
ns
tSK(02)
tSK(P)
Skew between outputs of all banks, same transition
—
—
0.7
1
—
—
0.7
1
—
—
0.5
0.8
—
—
0.4
0.6
ns
ns
Pulse Skew; skew between opposite transitions of the same
output (tPHL - tPLH)
tSK(T)
Part-to-part skew (2)
—
1.5
—
1.5
—
1.2
—
1
ns
NOTES:
1. Skew parameters are guaranteed across temperature range, but not tested. Skew parameters are measured at 0.5Vcc.
2. tSK(T) only applies to devices of the same transition, part type, temperature, power supply voltage, loading, package, and speed grade.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
TA = -40°C to +85°C, VCC = 5.0V ± 10%
CLOAD = 50pF, RLOAD = 500Ω unless otherwise noted.
49FCT5805
Min. Max.
1.5 5.6
49FCT5805/A 49FCT5805/B
49FCT5805/C
Symbol
tPLH
Parameter (1)
Unit
Min.
Max.
Min.
Max.
Min.
Max.
Propagation Delay (2)
INA to OAn, INB to OBn
Output Enable Time
1.5
5.3
1.5
5
1.5
4.5
ns
tPHL
tPZL
1.5
1.5
8
7
1.5
1.5
8
7
1.5
1.5
7
6
1.5
1.5
7
6
ns
ns
tPZH
tPLZ
Output Disable Time (3)
tPZH
tR
tF
Output Rise Time, 0.8V to 2V (3)
—
—
1.5
3
—
—
1.5
3
—
—
1.5
3
—
—
1.5
3
ns
ns
Output Fall Time, 2Vcc to 0.8Vcc (3)
NOTES:
1. Minimums guaranteed but not production tested. Timing parameters are measured at 0.5Vcc.
2. The propagation delay other range indicated by Min. and Max. specifications results from process and environmental variables. These propagation
delays do not imply limit skew.
3. This parameter is guaranteed but not production tested.
4
IDT49FCT5805/A/B/C
GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
Parameter
Tested
Switch
Position
tPLZ, tPZL
All Others
Closed
Open
500Ω
VCC
7.0 V
VIN
VOUT
Pulse
Generator
DUT
450Ω
50Ω
50pF
50Ω coax to
oscilloscope
Pulse generator for all pulses: f ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
3V
3V
1.5V
INPUT
INPUT
0V
1.5V
0V
tPLH
tPHL
tPHL
VOH
2.0V
tPLH
VOH
OUPUT
0.5Vcc
0.8V
VOL
OUPUT
0.5Vcc
VOL
tR
tF
tSK(p)
= tPHL - tPLH
PROPAGATIONDELAY
PULSE SKEW — tSK(P)
3V
3V
1.5V
0V
1.5V
0V
INPUT
INPUT
tPHL1
tPLH1
tPHLA
tPLHA
VOH
VOH
OUPUT 1
OUPUT 2
0.5Vcc
VOL
OUPUT A
OUPUT B
0.5Vcc
VOL
tSK(01)
tSK(02)
tSK(01)
tSK(02)
VOH
VOH
0.5Vcc
VOL
0.5Vcc
VOL
tPLHB
tPLH2
= tPLH2 - tPLH1 or tPHL2 - tPHL1
tPHLB
tPHL2
tSK(01)
tSK(02) = tPLHB - tPLHA or tPHLB - tPHLA
OUTPUT SKEW (SAME BANK) — tSK(O1)
OUPUT SKEW (DIFFERENT BANKS) — tSK(O2)
ENABLE
DISABLE
3V
3V
CONTROL
INPUT
1.5V
0V
1.5V
0V
INPUT
PART 1 OUTPUT
PART 2 OUTPUT
tPLH1
tPHL1
tPZL
tPLZ
VOH
3V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.5Vcc
1.5V
1.5V
0.3V VOL
VOL
VOH
tPHZ
tSK(t)
tSK(t)
tPZH
VOH
0.3V
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
0.5Vcc
VOL
0V
tPLH2
tSK(t)
tPHL2
tPLH2 - tPLH1 or tPHL2 - tPHL1
=
PART-TO-PART SKEW — tSK(T)
ENABLE AND DISABLE TIMES
5
IDT49FCT5805/A/B/C
GUARANTEEDLOWSKEWCMOSCLOCKDRIVER/BUFFER
INDUSTRIALTEMPERATURERANGE
ORDERINGINFORMATION
XXXX
XX
IDT49FCT
Package
Device Type
Q
SO
Quarter Size Small Outline Pacakge (SO20-8)
Small Outline IC (SO20-2)
Guaranteed Low Skew CMOS Clock Driver/Buffer
5805
5805A
5805B
5805C
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6
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