IDT29FCT52CTD [IDT]
Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP24, CERDIP-24;
| 型号： | IDT29FCT52CTD |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, CDIP24, CERDIP-24 CD |
| 文件： | 总7页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
FAST CMOS
OCTAL REGISTERED
TRANSCEIVER
IDT29FCT52AT/BT/CT/DT
FEATURES:
DESCRIPTION:
−
−
−
−
Low input and output leakage ≤1µA (max.)
Extended commercial range of –40°C to +85°C
CMOS power levels
The IDT29FCT52AT/BT/CT/DT is an 8-bit registered transceiver built
usinganadvanceddualmetalCMOStechnology.Two8-bitback-to-back
registers store data flowing in both directions between two bidirectional
buses.Separateclock,clockenableand3-stateoutputenablesignals are
providedforeachregister. BothAoutputs andBoutputs are guaranteed
tosink64mA.
True TTL input and output compatibility
•
•
VOH = 3.3V (typ.)
VOL = 0.3V (typ.)
−
−
Meets or exceeds JEDEC standard 18 specifications
Product available in Radiation Tolerant and Radiation Enhanced
versions
−
−
−
−
Available in PDIP, SOIC, SSOP, QSOP, and TSSOP packages
A, B, C and D speed grades
High drive outputs (-15mA IOH, 64mA IOL)
Power off disable outputs permit “live insertion”
FUNCTIONALBLOCKDIAGRAM
CPA
CEA
OEB
CE
CP
A0
A1
A2
A3
A4
A5
A6
A7
D0
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
B0
1
B
1
D
D2
D3
D4
D5
D6
D7
B2
B3
B4
B5
B6
B7
A
Reg.
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
D0
D1
D2
D3
D4
D5
D6
D7
B
Reg.
CE
CP
CPB
CEB
OEA
COMMERCIAL TEMPERATURE RANGE
SEPTEMBER 1999
1
c
1999 Integrated Device Technology, Inc.
DSC-5483/-
IDT29FCT52AT/BT/CT/DT
FASTCMOSOCTALREGISTEREDTRANSCEIVER
COMMERCIALTEMPERATURERANGE
ABSOLUTE MAXIMUM RATINGS(1)
PINCONFIGURATION
Symbol
Rating
Max.
Unit
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
V
24
23
22
21
20
1
VCC
B7
B6
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–65 to +120
°C
mA
2
3
4
A7
A6
A5
NOTES:
B5
B4
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
A4
A3
A2
B3
B2
5
6
7
8
9
P24-1
D24-1
SO24-2 19
SO24-7
SO24-8
2. All device terminals.
B1
18
17
16
15
14
13
B0
A1
A0
CAPACITANCE (TA = +25OC, f = 1.0MHz)
Symbol
OEB
Parameter(1)
Conditions
Typ.
Max. Unit
OEA
CPB
CPA
10
11
CIN
Input Capacitance
VIN = 0V
6
10
12
pF
CEA
GND
COUT
Output Capacitance
VOUT = 0V
8
pF
8T-link
CEB
12
NOTE:
1. This parameter is measured at characterization but not tested.
PDIP/ SOIC/ SSOP/ QSOP
TOP VIEW
REGISTERFUNCTIONTABLE(1)
(Applies to A or B Register)
Inputs
Internal
D
X
L
CP
X
↑
CE
H
L
Q
N C
L
Function
HoldData
LoadData
H
↑
L
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
NC = No Change
↑ = LOW-to-HIGH Transition
OUTPUTCONTROL(1)
Internal
OE
Q
X
L
Y-Outputs
Function
H
L
Z
L
DisableOutputs
EnableOutputs
L
H
H
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-Impedance
2
IDT29FCT52AT/BT/CT/DT
FASTCMOSOCTALREGISTEREDTRANSCEIVER
COMMERCIALTEMPERATURERANGE
PINDESCRIPTION
Name
I/O
I/O
I/O
I
Description
EightbidirectionallinescarryingtheARegisterinputsorBRegisteroutputs.
EightbidirectionallinescarryingtheBRegisterinputsorARegisteroutputs.
A0-7
B0-7
CPA
CEA
Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition of the CPA signal.
I
ClockEnable forthe ARegister. WhenCEAis LOW, data is enteredintothe ARegisteronthe LOW-to-HIGHtransitionofthe CPAsignal. When
CEA is HIGH, the A Register holds its contents, regardless of CPA signal transitions.
OEB
I
OutputEnablefortheARegister. WhenOEBisLOW,theARegisteroutputsareenabledontotheB0-7 lines. WhenOEBisHIGH,theB0-7 outputs
areinthehigh-impedancestate.
CPB
CEB
I
I
Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition of the CPB signal.
ClockEnable forthe BRegister. WhenCEBis LOW, data is enteredintothe BRegisteronthe LOW-to-HIGHtransitionofthe CPBsignal. When
CEB is HIGH, the B Register holds its contents, regardless of CPB signal transitions.
OEA
I
OutputEnablefortheBRegister. WhenOEAisLOW,theBRegisteroutputsareenabledontotheA0-7 lines. WhenOEAisHIGH,theA0-7 outputs
areinthehigh-impedancestate.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = -40°C to +85°C, VCC = 5.0V ± 5%
Symbol
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
Typ.(2) Max.
Unit
VIH
2
—
—
—
0.8
±1
±1
±1
±1
±1
–1.2
—
1
V
VIL
IIH
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
—
—
—
—
—
—
—
V
Input HIGH Current(4)
Input LOW Current(4)
High Impedance Output Current
(3-State Output pins)(4)
Input HIGH Current(4)
Clamp Diode Voltage
Input Hysteresis
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
µA
IIL
—
IOZH
IOZL
II
VCC = Max.
—
—
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN = –18mA
—
µA
V
VIK
VH
ICC
–0.7
200
0.01
—
mV
mA
Quiescent Power Supply Current
VCC = 3V, VIN = GND or VCC
OUTPUT DRIVE CHARACTERISTICS
Symbol
Parameter
Output HIGH Voltage
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
VOH
VCC = Min.
IOH = -8mA
2.4
3.3
3
—
—
V
VIN = VIH or VIL
VCC = Min.
IOH = -15mA
IOL = 64mA
2
VOL
Output LOW Voltage
—
0.3
0.55
V
VIN = VIH or VIL
(3)
IOS
Short Circuit Current
Input/Output Power Off Leakage(5)
VCC = Max., VO = GND
–60
—
–120
—
–225
±1
mA
µA
IOFF
VCC = 0V, VIN or VO ≤ 4.5V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
5. This parameter is guaranteed but not tested.
3
IDT29FCT52AT/BT/CT/DT
FASTCMOSOCTALREGISTEREDTRANSCEIVER
COMMERCIALTEMPERATURERANGE
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Test Conditions(1)
Min.
Typ.(2) Max.
Unit
∆ICC
VCC = Max.
—
0.5
2
mA
(3)
VIN = 3.4V
ICCD
Dynamic Power Supply Current(4)
VCC = Max.
VIN = VCC
—
0.15
0.25
mA/
Outputs Open
OEA or OEB = GND
One Input Toggling
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OEA or OEB = GND
VIN = GND
MHz
IC
Total Power Supply Current(6)
VIN = VCC
—
—
1.5
2
3.5
5.5
mA
VIN = GND
VIN = 3.4V
VIN = GND
One Bit Toggling
at fi = 5MHz
50% Duty Cycle
VCC = Max.
Outputs Open
fCP = 10MHz
50% Duty Cycle
OEA or OEB = GND
VIN = VCC
—
—
3.8
6
7.3(5)
VIN = GND
VIN = 3.4V
VIN = GND
16.3(5)
Eight Bits Toggling
at fi = 2.5MHz
50% Duty Cycle
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT29FCT52AT/BT/CT/DT
FASTCMOSOCTALREGISTEREDTRANSCEIVER
COMMERCIALTEMPERATURERANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE (1)
29FCT52AT
29FCT52BT
29FCT52CT
29FCT52DT
Min (2)
Max. Unit
Symbol
tPLH
tPHL
tPZH
tPZL
Parameter
Propagation Delay
CPA, CPB to An, Bn
Condition(1)
CL = 50pF
RL = 500Ω
Min (2)
Max.
Min (2)
Max.
Min (2)
Max.
.
.
.
.
2
10
2
7.5
2
6.3
2
4.5
5.6
4.3
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
Output Enable Time
OEA or OEB to An, Bn
Output Disable Time
OEA or OEB to An, Bn
Set-up Time, HIGH or LOW
An, Bn to CPA, CPB
1.5
1.5
2.5
2
10.5
10
1.5
1.5
2.5
1.5
3
8
1.5
1.5
2.5
1.5
3
7
1.5
1.5
1.5
1
tPHZ
tPLZ
7.5
—
—
—
—
—
6.5
—
—
—
—
—
tSU
—
—
—
—
—
tH
tSU
Hold Time, HIGH or LOW
An, Bn to CPA, CPB
Set-up Time, HIGH or LOW
CEA, CEB to CPA, CPB
Hold Time, HIGH or LOW
CEA, CEB to CPA, CPB
Clock Pulse Width HIGH or
3
2
tH
2
2
2
1
tW
3
3
3
3
(3)
LOW
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not tested.
5
IDT29FCT52AT/BT/CT/DT
FASTCMOSOCTALREGISTEREDTRANSCEIVER
COMMERCIALTEMPERATURERANGE
TESTCIRCUITSANDWAVEFORMS
SWITCH POSITION
TEST CIRCUITS FOR ALL OUTPUTS
Test
Switch
Closed
Open
V CC
7.0V
Open Drain
Disable Low
Enable Low
All Other Tests
500Ω
500Ω
V OUT
VIN
Pulse
D.U.T.
Generator
8-link
50pF
DEFINITIONS:
T
CL = Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
R
L
C
Octal link
PULSEWIDTH
SET-UP, HOLD, AND RELEASE TIMES
3V
1.5V
0V
DATA
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
tW
ASYNCHRONOUS CONTROL
tREM
PRESET
3V
CLEAR
ETC.
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
Octal link
CLEAR
CLOCK ENABLE
ETC.
tSU
tH
Octal link
PROPAGATIONDELAY
ENABLEANDDISABLETIMES
ENABLE
DISABLE
3V
3V
SAME PHASE
INPUT TRANSITION
1.5V
0V
CONTROL
INPUT
1.5V
0V
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
OUTPUT
3.5V
1.5V
3.5V
VOL
1.5V
VOL
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
tPLH
0.3V
0.3V
3V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
1.5V
0V
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6
IDT29FCT52AT/BT/CT/DT
FASTCMOSOCTALREGISTEREDTRANSCEIVER
COMMERCIALTEMPERATURERANGE
ORDERINGINFORMATION
29
XXXX
X
X
X
FCT
Device Type
Temp. Range
Family
Package
Process
Blank
Commercial
P
Plastic DIP (P24-1)
D
CERDIP (D24-1)
SO
PY
Q
Small Outline IC (SO24-2)
Shrink Small Outline Package (SO24-7)
Quarter-size Small Outline Package (SO24-8)
52AT
52BT
52CT
52DT
Octal Registered Transceiver
Blank
29
High Drive
- 40°C to +85°C
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com*
*To search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
7
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