F2480EVBI [IDT]
Broadband RF Analog VGA 400 to 3000 MHz;
| 型号： | F2480EVBI |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Broadband RF Analog VGA 400 to 3000 MHz |
| 文件： | 总34页 (文件大小：4063K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Broadband RF Analog VGA
400 to 3000 MHz
F2480
Datasheet
Description
Features
The F2480 is a 400 to 3000 MHz RF Analog Variable Gain
Amplifier (AVGA) that can be used in receivers, transmitters and
other applications. Either the amplifier or voltage variable
attenuator (VVA) can be configured as the first stage in the
cascade.
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
400 to 3000 MHz (Amplifier Range)
50 to 6000 MHz (Attenuator Range)
12dB typical cascaded max gain
36dB continuous gain range
Excellent linearity +41.5dBm OIP3
Noise Figure 4.3dB
The F2480 RF AVGA provides 12dB typical maximum cascade
gain (no attenuation) with 4.3dB noise figure (amplifier as first
stage) and 36dB gain adjustment designed to operate with a
single +5V supply. Nominally, the amplifier offers +41.5dBm
output IP3 using 106mA of ICC.
ICC = 106mA
1.2mA Amplifier Standby Current
Biꢀdirectional attenuator RF ports
This device is packaged in a 5 x 5 mm, 32ꢀpin TQFN with 50ꢁ
singleꢀended RF input and RF output impedances for ease of
integration into the signalꢀpath lineup.
Positive amplifier gain slope vs. frequency to counteract
system PCB loss.
ꢀ
VMODE pin allows either positive or negative attenuation control
response
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
LinearꢀinꢀdB attenuation characteristic
4 RF Port pinout supporting multiple lineup configurations
50ꢂ input and output impedances
Competitive Advantage
The F2480 RF AVGA provides very highꢀperformance by
combining a silicon VVA & a Zero-Distortion™ RF amplifier in a
single, compact TQFN package. Because of the superb VVA IP3
performance over its full attenuation range, the VVA can be
placed after the amplifier while yielding the desired cascaded
OIP3 performance. Utilizing IDT’s technology, the resultant RF
AVGA provides +41.5dBm OIP3 performance at 900MHz. The
device is internally matched so there is no need to optimize
external matching elements.
Broadband, Internally Matched
5 x 5 mm, 32ꢀpin TQFN package
Block Diagram
Figure 1. Block Diagram
RFAMP_OUT ATTN_RF1
Typical Applications
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Multiꢀmode, Multiꢀcarrier Receivers
PCS1900 Base Stations
DCS1800 Base Stations
WiMAX and LTE Base Stations
UMTS/WCDMA 3G Base Stations
PHS/PAS Base Stations
Point to Point Infrastructure
Public Safety Infrastructure
Broadband Repeaters
RFAMP_IN
Band_Select
STBY
VCTRL
Bias
Control
VMODE
VCC
2
IBIAS
TM
Zero-DistortionTM
GPS Receivers
Distributed Antenna Systems
Cable Infrastructure
ATTN_RF2
Digital Radio
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Pin Assignments
Figure 2. Pin Assignments for 5 x 5 x 0.75 mm - TQFN Package – Top View
NC
GND
24
NC
NC
1
2
23
22
21
RFAMP_IN
3
4
5
6
VMODE
VCC
EP
GND
NC
VCTRL
NC
20
19
18
17
NC
Bias
Ctrl
NC
NC
NC
7
8
NC
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F2480 Datasheet
Pin Descriptions
Table 1. Pin Descriptions
Number
Name
Description
1, 5, 6, 7, 8,
14, 16, 17,
18, 19, 23,
24, 25, 27,
28, 32
No internal connection. These pins can be left unconnected, have voltage applied, or connected to ground
(recommended).
NC
2, 4, 29, 31
3
GND
Ground these pins. These pins are internally connected to the exposed paddle.
RFAMP_IN Amplifier input internally matched to 50ꢁ. Must use external DC block.
+5V Power Supply. Tie to VCC and connect bypass capacitors as close to the pin as possible. See Typical
Application Circuit for details.
9
VCC
Leave pin open circuited for lowꢀband select and connect 0Ω resistor to GND for midꢀband, highꢀband
and wideꢀband applications. A pullꢀup resistor of approximately 1.5Mꢁ connects between this pin and
VCC.
10
11
Band_Select
STBY
Logic Low or Open on this pin enables the device. Logic High puts the device into Standby mode. A pullꢀ
down resistor of approximately 1Mꢁ connects between this pin and GND.
12
13
RSET
Connect external resistor to GND to optimize amplifier bias. Used in conjunction with pin 13.
Connect external resistor to GND to optimize amplifier bias. Used in conjunction with pin 12.
RDSET
Attenuator RF Port 2. Matched to 50ꢁ. Use an external DC blocking capacitor as close to the device as
possible.
15
20
21
ATTN_RF2
VCTRL
Attenuator control voltage. Apply a voltage in the range as specified in the General Specifications Table.
See application section for details about VCTRL. This pin has an internal pull down resistor.
+5V Power Supply. Tie to VCC and connect bypass capacitors as close to the pin as possible. See Typical
Application Circuit for details.
VCC
Attenuator slope control. Set to logic LOW to enable negative attenuation slope (Attenuation low to high
as voltage is increased). Set to logic HIGH to enable positive attenuation slope (Attenuation high to low as
voltage is increased).
22
VMODE
Attenuator RF Port 1. Matched to 50ꢁ. Use an external DC blocking capacitor as close to the device as
possible.
26
30
ATTN_RF1
RFAMP_OUT Amplifier output internally matched to 50ꢁ. Must use external DC block as close to the pin as possible.
Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses multiple
— EP
ground vias to provide heat transfer out of the device into the PCB ground planes. These multiple ground
vias are also required to achieve the noted RF performance.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Absolute Maximum Ratings
The absolute maximum ratings are stress ratings only. Stresses greater than those listed below can cause permanent damage to the device.
Functional operation of the F2480 at absolute maximum ratings is not implied. Exposure to absolute maximum rating conditions may affect
device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Symbol
Minimum
Maximum
Units
VCC to GND
STBY, Band_Select
RSET
VCC
VLOGIC
IRSET
ꢀ0.3
ꢀ0.3
5.5
VCC + 0.25
+1.5
V
V
mA
mA
V
RDSET
IRDSET
+0.8
RFAMP_IN externally applied DC voltage
RFAMP_OUT externally applied DC voltage
VRFAMPin
VRFAMPout
+1.4
+3.6
VCC ꢀ 0.15
VCC + 0.15
V
Lower of
(VCC, 3.9)
VMODE to GND
VMODE
ꢀ0.3
V
Lower of
(VCC, 4.0)
VCTRL to GND (VCC = 0 to 5.25 V)
ATTEN_RF1, ATTEN_RF2
VCTRL
ꢀ0.3
ꢀ0.3
V
V
VATTENRF
PMAXAMP
+0.3
RFAMP_IN RF Input Power applied for 24 hours
maximum (VCC applied, RF = 2GHz, TA=+25°C)
+22
dBm
ATTN_RF1 or ATTN_RF2 RF Input Power
(@ 2GHz and +85°C)
PMAXATTEN
+30
dBm
Continuous Power Dissipation
Junction Temperature
Pdiss
Tj
1.5
W
°C
°C
°C
+150
+150
+260
Storage Temperature Range
Lead Temperature (soldering, 10s)
Tst
ꢀ65
Electrostatic Discharge – HBM
(JEDEC/ESDA JSꢀ001ꢀ2014)
Class 1C
Class C3
Electrostatic Discharge – CDM
(JEDEC 22ꢀC101F)
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F2480 Datasheet
Recommended Operating Conditions
Table 3. Recommended Operating Conditions
Parameter
Symbol
Condition
All VCC Pins
Minimum
Typical
Maximum
Units
Power Supply Voltage
VCC
TEP
4.75
ꢀ40
400
50
5.00
5.25
+105
3000
6000
V
Operating Temperature Range
Exposed Paddle Temperature
Amplifier
°C
RF Frequency Range
fRF
MHz
Attenuator
Amplifier RF Maximum Input
Operating Power
Pmax1, CW TEP = ꢀ40 to 105 °C
8
dBm
dBm
Attenuator RF Maximum Input
Operating Power
Pmax2, CW ATTEN_RF1 or ATTEN_RF2
See Figure 3
RFAMP_IN Port Impedance
RFAMP_OUT Port Impedance
ATTN_RF1 Port Impedance
ATTN_RF2 Port Impedance
ZRFAMPIN
ZRFAMPOUT
ZATTNRF1
ZATTNRF2
50
50
50
50
Ω
Ω
Ω
Ω
Figure 3. Attenuator Maximum RF Input Power vs. Frequency
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F2480 Datasheet
Electrical Characteristics
Table 4. General Electrical Characteristics
Parameter
Logic Input High Threshold
Logic Input Low Threshold
Symbol
VIH_AMP
VIL_AMP
Condition
STBY, Band_Select
STBY, Band_Select
VCC > 3.9V
Minimum
Typical
Maximum
Units
[b]
1.1 [a]
-0.3
1.17
1.17
0
VCC
V
V
0.63
3.6
VIH_Mode
VIL_Mode
VCTRL
VMODE Logic
3.15V ≤ VCC ≤ 3.9V
VCC – 0.3
0.63
3.6
V
V
3.9V < VCC ≤ 5.25V
3.15V ≤ VCC ≤ 3.9V
0
VCTRL Voltage
0
VCC – 0.3
12
ISTBY
IBand_Select
IMODE
-10
-10
-1
Logic Current
ꢃA
ꢃA
10
35
Control Current
ICTRL
Pin 20
-1
12
Pin 21
1.17
106
121
121
0.90
2.20
Pin 9 – Low Band Bias
Pin 9 – Mid Band Bias
Pin 9 – High Band Bias
170
1.7
Supply Current
ICC
mA
ns
Pin 9 – Wide Band Bias
Pin 9 – Standby
121
0.8
50% of STBY going low to
Gain within ± 1dB
Startup Time from STBY
250
a. Items in min/max columns in bold italics are guaranteed by test.
b. Items in min/max columns that are not bold/italics are guaranteed by design characterization.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Table 5. Stand Alone Amplifier Electrical Characteristics
Typical Application Circuit. See Table 8 band settings as noted (LB, MB, HB, WB), VCC = +5.0V, TEP = +25°C, fRF = 2000MHz,
POUT = 0dBm/tone for single tone and two tone tests, OIP3 tone delta = 1MHz, all RF source and RF load impedances = 50Ω, PCB board and
connector losses are deꢀembedded, unless otherwise noted.
Parameter
Input Return Loss
Symbol
Condition
Minimum
Typical
Maximum
Units
RLAMPIN
16
17
dB
dB
Output Return Loss
RLAMPOUT
400MHz Low Band Bias
900MHz Low Band Bias
2000MHz Mid Band Bias
2700MHz High Band Bias
400MHz Wide Band Bias
2700MHz Wide Band Bias
400MHz Low Band Bias
900MHz Low Band Bias
2000MHz Mid Band Bias
2700MHz High Band Bias
400MHz Wide Band Bias
2700MHz Wide Band Bias
400MHz Low Band Bias
900MHz Low Band Bias
2000MHz Mid Band Bias
2700MHz High Band Bias
400MHz Wide Band Bias
2700MHz Wide Band Bias
400MHz Low Band Bias
900MHz Low Band Bias
11.1
13.2
14.1
14.4
11.1
14.4
4.5
GLB
12.1 [a]
13.0
14.2
15.5
GMB
GHB
Gain
dB
dB
GWB
NFLB
4.3
NFMB
NFHB
4.5
Noise Figure
5.0
4.5
NFWB
5.0
37
OIP3LB
38 [b]
41.5
41
OIP3MB
OIP3HB
Output Third Order Intercept Point
Output 1dB Compression
Reverse Isolation
dBm
dBm
dB
40
35
OIP3WB
39
19.5
20.9
19.7
19.5
18.7
19.5
20.5
18.5
18
OP1dBLB
OP1dBMB 2000MHz Mid Band Bias
OP1dBHB 2700MHz High Band Bias
400MHz Wide Band Bias
OP1dBWB
2700MHz Wide Band Bias
400MHz Low Band Bias
RevISOLB
900MHz Low Band Bias
RevISOMB 2000MHz Mid Band Bias
RevISOHB 2700MHz High Band Bias
18
400MHz Low Band Bias
RevISOWB
20.5
18
2700MHz High Band Bias
a. Items in min/max columns in bold italics are guaranteed by test.
b. Items in min/max columns that are not bold/italics are guaranteed by design characterization.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Table 6. Stand Alone Voltage Variable Attenuator Electrical Characteristics
Typical Application Circuit. VCC = +5V, TEP = +25°C, signals applied to ATTEN_RF1 input, fRF = 2000MHz, minimum attenuation, PIN = 0dBm
for small signal parameters, PIN = +20dBm / tone for single tone and two tone linearity tests, two tone delta frequency = 50MHz, all RF source
and RF load impedances = 50Ω, PCB board traces and connector losses are deꢀembedded, unless otherwise noted.
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
50MHz [a]
700MHz
1.0
1.2
1.4
1.5
2.7
29
Insertion Loss
Amin
2000MHz
2700MHz
6000MHz
50MHz [a]
700MHz
dB
1.9
35.6
35.5
35.4
37
Maximum Attenuation
Amax
2000MHz
2700MHz
6000MHz
33.2
dB
deg
dB
ΦꢄMAX
ΦꢄMID
At 35dB attenuation
At 18dB attenuation
50MHz [a]
27
Relative Insertion Phase Relative to
Insertion Loss
10
16
700MHz
17
Minimum ATTEN_RF1 Return Loss
Over Control Voltage Range
S11
2000MHz
17
2700MHz
17
6000MHz
15
50MHz [a]
14
700MHz
15
Minimum ATTEN_RF2 Return Loss
Over Control Voltage Range
S22
IIP3
2000MHz
16
dB
2700MHz
17
6000MHz
13
65
dBm
dBm
dBm
Input IP3
IIP3ATTEN All attenuation settings
44
47
Minimum Output IP3
Input IP2 ( f1+ f2 )
OIP3MIN
IIP2
Maximum attenuation
PIN + IM2 [dBc]
35
95
dBm
IIP2MIN
HD2
All attenuation settings
PIN + H2 [dBc]
87
Input IH2
90
dBm
dBm
dBm
Input IH3
Input 1dB Compression [b]
HD3
PIN + H3 [dBc]/2
54
IP1dB
34.4
Any 1dB step in the 0dB to
TSETTL0.1dB 33dB range. 50% VCTRL to RF
settled to within ± 0.1dB
Settling Time
15
ꢃs
a. Set blocking capacitors C2 and C9 to 0.01ꢃF to achieve best return loss performance at 50MHz.
b. The input 1dB compression point is a linearity figure of merit. Refer to Absolute Maximum Ratings section for the maximum RF input power.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Thermal Characteristics
Table 7. Package Thermal Characteristics
Parameter
Symbol
Value
Units
θJAꢀAMP
θJAꢀATTN
Amplifier ꢀ Junction to Ambient Thermal Resistance.
Attenuator ꢀ Junction to Ambient Thermal Resistance.
40
80
°C/W
°C/W
Amplifier ꢀ Junction to Case Thermal Resistance.
(Case is defined as the exposed paddle)
θJC_BOT_AMP
θJC_BOT_ATTN
4
°C/W
°C/W
Attenuator ꢀ Junction to Case Thermal Resistance.
(Case is defined as the exposed paddle)
5
Moisture Sensitivity Rating (Per JꢀSTDꢀ020)
MSL 1
Typical Operating Conditions (TOC)
Unless otherwise noted:
ꢀ
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ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
VCC = +5.0V
TEP = +25°C (TEP is defined as the exposed paddle temperature).
Amplifier components configured for operation per Table 8 for each indicated band.
POUT = 0dBm/tone for all amplifier linearity tests.
1MHz tone spacing for all amplifier linearity tests.
PIN = +20dBm/tone applied to ATTEN_RF1 for all attenuator linearity tests.
50MHz tone spacing for all attenuator linearity tests.
VCTRL setting = minimum attenuation setting.
STBY = Logic HIGH (or open).
Band Select = GND.
VMODE = Logic LOW = Negative Slope.
Evaluation kit trace and connector losses are fully deꢀembedded.
Sꢀparameters for the amplifier and attenuator have external RF caps replaced by 0ꢁ resistors for purposes of displaying broadband
results.
ꢀ
Since the Wide Band and Mid Band settings are the same in Table 8, the Mid Band results will be the same curves as those displayed in
the Amplifier Wide Band section.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Typical Performance Characteristics – Attenuator [1]
Figure 4.
Attenuation vs. VCTRL over Frequency
and VMODE
Figure 5.
Attenuation vs. Frequency over VCTRL
0
-5
0
-10
-20
-30
-40
-10
-15
-20
-25
-30
-35
0.9GHz / Vmode = 0V
0.9GHz / Vmode = 3V
2.0GHz / Vmode = 0V
2.0GHz / Vmode = 3V
3.0GHz / Vmode = 0V
3.0GHz / Vmode = 3V
Vctrl = 0.0V
Vctrl = 1.2V
Vctrl = 1.8V
Vctrl = 0.8V
Vctrl = 1.4V
Vctrl = 2.4V
Vctrl = 1.0V
Vctrl = 1.6V
-40
-50
0
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
1
2
3
4
5
6
7
8
9
VCTRL (V)
Frequency (GHz)
Figure 6.
Min. and Max. Attenuation vs.
Frequency over Temperature
Figure 7.
Attenuation Delta to +25 C vs. VCTRL
over Frequency and Temperature
3.00
2.50
2.00
1.50
1.00
0.50
0.00
-0.50
-1.00
-1.50
-2.00
-2.50
-3.00
0
-1
-2
-3
-4
-5
-20
-40C / Vctrl = 0.0V
-40C / 0.9GHz
-40C / 2.0GHz
-40C / 3.0GHz
25C / Vctrl = 0.0V
105C / Vctrl = 0.0V
-40C / Vctrl = 3.0V
25C / Vctrl = 3.0V
105C / Vctrl = 3.0V
105C / 0.9GHz
105C / 2.0GHz
105C / 3.0GHz
-25
-30
-35
-40
-45
-50
-6
0
1
2
3
4
5
6
7
8
9
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
VCTRL (V)
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Typical Performance Characteristics – Attenuator [2]
Figure 8.
Attenuation vs. VCTRL over Frequency
Figure 9.
Attenuation Slope vs. VCTRL over
Frequency
0
-5
50
45
40
35
30
25
20
15
10
5
0.4GHz
0.7GHz
1.5GHz
2.7GHz
4.0GHz
5.0GHz
6.0GHz
0.4GHz
0.7GHz
1.5GHz
2.7GHz
4.0GHz
5.0GHz
6.0GHz
-10
-15
-20
-25
-30
-35
-40
0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
VCTRL (V)
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
VCTRL (V)
Figure 10. Return Loss (ATTEN_RF1 port) vs. VCTRL
over Frequency
Figure 11. Return Loss (ATTEN_RF2 port) vs. VCTRL
over Frequency
0
0
0.4GHz
0.4GHz
0.7GHz
0.7GHz
-5
-5
1.5GHz
1.5GHz
2.7GHz
2.7GHz
-10
-10
4.0GHz
4.0GHz
5.0GHz
5.0GHz
-15
-15
6.0GHz
6.0GHz
-20
-25
-30
-35
-20
-25
-30
-35
-40
-40
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
Figure 12. Insertion Phase Change vs. VCTRL over
Frequency
Figure 13. Insertion Phase Slope vs. VCTRL over
Frequency
70
100
0.4GHz
0.4GHz
(positive phase = electrically shorter)
0.7GHz
0.7GHz
60
1.5GHz
1.5GHz
80
2.7GHz
2.7GHz
4.0GHz
50
4.0GHz
60
5.0GHz
5.0GHz
40
6.0GHz
6.0GHz
30
20
10
0
40
20
0
-10
-20
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
VCTRL (V)
VCTRL (V)
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F2480 Datasheet
Typical Performance Characteristics – Attenuator [3]
Figure 14. Attenuation Response vs. VCTRL over
Figure 15. Attenuation Slope vs. VCTRL over
Frequency and Temperature
Frequency and Temperature
50
45
40
35
30
25
20
15
10
5
0
-40C / 0.9GHz
25C / 0.9GHz
105C / 0.9GHz
-40C / 2.0GHz
25C / 2.0GHz
105C / 2.0GHz
-40C / 3.0GHz
25C / 3.0GHz
105C / 3.0GHz
-40C / 0.9GHz
25C / 0.9GHz
-5
105C / 0.9GHz
-40C / 2.0GHz
-10
25C / 2.0GHz
105C / 2.0GHz
-15
-40C / 3.0GHz
25C / 3.0GHz
-20
105C / 3.0GHz
-25
-30
-35
-40
0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
VCTRL (V)
VCTRL (V)
Figure 16. Return Loss (ATTEN_RF1) vs. VCTRL
Figure 17. Return Loss (ATTEN_RF2) vs. VCTRL,
over Frequency and Temperature
over Frequency and Temperature
0
0
-40C / 0.9GHz
25C / 0.9GHz
105C / 0.9GHz
-40C / 2.0GHz
25C / 2.0GHz
105C / 2.0GHz
-40C / 3.0GHz
25C / 3.0GHz
105C / 3.0GHz
-40C / 0.9GHz
25C / 0.9GHz
105C / 0.9GHz
-40C / 2.0GHz
25C / 2.0GHz
105C / 2.0GHz
-40C / 3.0GHz
25C / 3.0GHz
105C / 3.0GHz
-5
-10
-15
-20
-25
-30
-35
-40
-5
-10
-15
-20
-25
-30
-35
-40
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
VCTRL (V)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 2.6
VCTRL (V)
Figure 18. Insertion Phase Change vs. VCTRL over
Frequency and Temperature
Figure 19. Insertion Phase Slope vs. VCTRL over
Frequency and Temperature
70
-40C / 0.9GHz
25C / 0.9GHz
105C / 0.9GHz
-40C / 2.0GHz
25C / 2.0GHz
105C / 2.0GHz
-40C / 3.0GHz
25C / 3.0GHz
105C / 3.0GHz
60
50
40
30
20
10
0
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
VCTRL (V)
© 2017 Integrated Device Technology, Inc.
12
March23,2017
F2480 Datasheet
Typical Performance Characteristics – Attenuator [4]
Figure 20. Return Loss (ATTEN_RF1 port) vs.
Figure 21. Return Loss (ATTEN_RF1 port) vs.
Attenuation over Frequency
Attenuation over Freq & Temp
0
0
-5
0.4GHz
0.7GHz
1.5GHz
2.7GHz
4.0GHz
5.0GHz
6.0GHz
-40C / 0.9GHz
25C / 0.9GHz
105C / 0.9GHz
-40C / 2.0GHz
25C / 2.0GHz
105C / 2.0GHz
-40C / 3.0GHz
25C / 3.0GHz
105C / 3.0GHz
-5
-10
-15
-20
-25
-30
-35
-40
-10
-15
-20
-25
-30
-35
-40
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
Figure 22. Return Loss (ATTEN_RF2 port) vs.
Figure 23. Return Loss (ATTEN_RF2 port) vs.
Attenuation over Frequency
Attenuation over Freq & Temp
0
0
0.4GHz
0.7GHz
1.5GHz
2.7GHz
4.0GHz
5.0GHz
6.0GHz
-40C / 0.9GHz
25C / 0.9GHz
105C / 0.9GHz
-40C / 2.0GHz
25C / 2.0GHz
105C / 2.0GHz
-40C / 3.0GHz
25C / 3.0GHz
105C / 3.0GHz
-5
-10
-15
-20
-25
-30
-35
-40
-5
-10
-15
-20
-25
-30
-35
-40
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
Figure 24. Insertion Phase Change vs.
Attenuation over Frequency
70
Figure 25. Insertion Phase Change vs.
Attenuation over Freq & Temp
0.4GHz
0.7GHz
(positive phase = electrically shorter)
60
50
40
30
20
10
0
1.5GHz
2.7GHz
4.0GHz
5.0GHz
6.0GHz
-10
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
© 2017 Integrated Device Technology, Inc.
13
March23,2017
F2480 Datasheet
Typical Performance Characteristics – Attenuator [5]
Figure 26. Min. and Max. Attenuation vs.
Figure 27. Min. and Max. Attenuation Slope vs.
Frequency
Frequency
0
-23
-25
-27
-29
-31
-33
-35
-37
-39
50
45
40
35
30
25
20
15
10
Max. Slope
Min. Slope
-1
-2
-3
-4
-5
-6
-7
-40C / Vctrl = 0V
-40C / Vctrl = 3V
25C / Vctrl = 0V
25C / Vctrl = 3V
105C / Vctrl = 0V
105C / Vctrl = 3V
-8
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Frequency (GHz)
Frequency (GHz)
Figure 28. Worst-Case Return Loss (ATTEN_RF1
port) vs. Frequency over Temp
Figure 29. Worst-Case Return Loss (ATTEN_RF2
port) vs. Frequency over Temp
0
0
-40C
-40C
25C
25C
105C
105C
-5
-5
-10
-15
-20
-25
-10
-15
-20
-25
0
1
2
3
4
5
6
0
1
2
3
4
5
6
Frequency (GHz)
Frequency (GHz)
Figure 30. Max. Insertion Phase Change vs.
Frequency over Temp
70
-40C
(positive phase = electrically shorter)
25C
60
105C
50
40
30
20
10
0
-10
0
1
2
3
4
5
6
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
14
March23,2017
F2480 Datasheet
Typical Performance Characteristics – 2 GHz Attenuator [6]
Figure 31. Input IP3 vs. VCTRL over VMODE and
Figure 32. Output IP3 vs. VCTRL over VMODE and
Temperature
Temperature
80
75
70
65
60
55
50
75
70
65
60
55
50
45
40
35
30
25
20
15
10
-40C / Vmode = 0V
-40C / Vmode = 0V
25C / Vmode = 0V
105C / Vmode = 0V
-40C / Vmode= 3V
25C / Vmode= 3V
105C / Vmode= 3V
45
40
35
30
25C / Vmode = 0V
105C / Vmode = 0V
-40C / Vmode= 3V
25C / Vmode= 3V
105C / Vmode= 3V
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
Figure 33. Input IP2 vs. VCTRL over VMODE and
Figure 34. Output IP2 vs. VCTRL over VMODE and
Temperature
120
Temperature
120
-40C / Vmode = 0V
25C / Vmode = 0V
105C / Vmode = 0V
-40C / Vmode = 3V
110
100
90
110
25C / Vmode = 3V
105C / Vmode = 3V
100
90
80
70
60
50
80
-40C / Vmode = 0V
70
25C / Vmode = 0V
105C / Vmode = 0V
-40C / Vmode = 3V
60
25C / Vmode = 3V
105C / Vmode = 3V
50
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
nd
rd
Figure 35.
2
Harmonic Input Intercept Point vs.
Figure 36.
3
Harmonic Input Intercept Point vs.
VCTRL over VMODE and Temperature
VCTRL over VMODE and Temperature
130
120
110
100
90
80
70
60
50
40
30
20
10
-40C / Vmode = 0V
-40C / Vmode = 0V
25C / Vmode = 0V
105C / Vmode = 0V
-40C / Vmode = 3V
25C / Vmode = 3V
105C / Vmode = 3V
80
25C / Vmode = 0V
105C / Vmode = 0V
-40C / Vmode = 3V
25C / Vmode = 3V
105C / Vmode = 3V
70
60
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
© 2017 Integrated Device Technology, Inc.
15
March23,2017
F2480 Datasheet
Typical Performance Characteristics – 2 GHz Attenuator [7]
Figure 37. Input IP3 vs. VCTRL over RF Port and
Figure 38. Output IP3 vs. VCTRL over RF Port and
Temperature
Temperature
80
75
70
65
60
55
75
-40C / RF1 Driven
70
25C / RF1 Driven
65
105C / RF1 Driven
-40C / RF2 Driven
60
25C / RF2 Driven
55
105C / RF2 Driven
50
45
40
35
30
25
20
15
10
50
-40C / RF1 Driven
45
25C / RF1 Driven
105C / RF1 Driven
40
-40C / RF2 Driven
35
25C / RF2 Driven
105C / RF2 Driven
30
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
Figure 39. Input IP2 vs. VCTRL over RF Port and
Temperature
Figure 40. Output IP2 vs. VCTRL over RF Port and
Temperature
120
120
110
100
90
-40C / RF1 Driven
25C / RF1 Driven
105C / RF1 Driven
110
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
100
90
80
70
60
50
80
-40C / RF1 Driven
70
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
60
25C / RF2 Driven
105C / RF2 Driven
50
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
nd
rd
Figure 41.
2
Harm Input Intercept Point vs. VCTRL
Figure 42.
3
Harm Input Intercept Point vs. VCTRL
over RF Port and Temp
over RF Port and Temp
130
120
110
100
90
80
70
60
50
40
30
20
10
-40C / RF1 Driven
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
-40C / RF1 Driven
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
80
70
60
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
2.2 2.4 2.6
VCTRL (V)
VCTRL (V)
© 2017 Integrated Device Technology, Inc.
16
March23,2017
F2480 Datasheet
Typical Performance Characteristics – 2 GHz Attenuator [8]
Figure 43. Input IP3 vs. Attenuation over
Figure 44. Output IP3 vs. Attenuation over
Temperature
Temperature
80
75
70
65
60
55
50
45
40
35
30
75
70
65
60
55
50
45
40
35
30
25
20
15
10
-40C
25C
105C
-40C
25C
125C
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
Figure 45. Input IP2 vs. Attenuation over
Temperature
Figure 46. Output IP2 vs. Attenuation over
Temperature
120
110
100
90
120
110
100
90
-40C
25C
105C
80
80
70
70
-40C
25C
60
60
105C
50
50
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
nd
rd
Figure 47.
2
Harm Input Intercept Point vs.
Figure 48.
3
Harm Input Intercept Point vs.
Attenuation over Temperature
Attenuation over Temperature
130
120
110
100
90
80
70
60
50
40
30
20
80
-40C
25C
-40C
25C
70
105C
105C
60
10
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
© 2017 Integrated Device Technology, Inc.
17
March23,2017
F2480 Datasheet
Typical Performance Characteristics – 2 GHz Attenuator [9]
Figure 49. Input IP3 vs. Attenuation over RF Port
Figure 50. Output IP3 vs. Attenuation over RF
and Temperature
Port and Temperature
80
75
70
65
60
55
50
75
70
65
60
55
50
45
40
35
30
25
20
15
10
-40C / RF1 Driven
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
45
-40C / RF1 Driven
25C / RF1 Driven
40
105C / RF1 Driven
-40C / RF2 Driven
35
25C / RF2 Driven
105C / RF2 Driven
30
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
Figure 51. Input IP2 vs. Attenuation over RF Port
and Temperature
Figure 52. Output IP2 vs. Attenuation over RF
Port and Temperature
120
120
110
100
90
-40C / RF1 Driven
25C / RF2 Driven
110
100
90
105C / RF1 Driven
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
80
80
-40C / RF1 Driven
70
70
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
60
60
25C / RF2 Driven
105C / RF2 Driven
50
50
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
nd
rd
Figure 53.
2
Harm Input Intercept Point vs.
Figure 54. 3 Harm Input Intercept Point vs.
Attenuation over RF Port and Temp
Attenuation over RF Port and Temp
130
120
110
100
90
80
70
60
50
40
30
20
-40C / RF1 Driven
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
-40C / RF1 Driven
25C / RF1 Driven
105C / RF1 Driven
-40C / RF2 Driven
25C / RF2 Driven
105C / RF2 Driven
80
70
60
10
0
4
8
12
16
20
24
28
32
36
0
4
8
12
16
20
24
28
32
36
Attenuation (dB)
Attenuation (dB)
© 2017 Integrated Device Technology, Inc.
18
March23,2017
F2480 Datasheet
Typical Performance Characteristics – Amplifier – Wide Band Mode [1]
Figure 55. Gain vs. Frequency over Temperature
Figure 56. Reverse Isolation vs. Frequency over
and Voltage – WB mode
Temperature and Voltage – WB Mode
16
15
14
13
12
11
10
9
-10
-12
-14
-16
-18
-20
-22
-24
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
8
7
6
-26
-28
-30
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
3.6
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
3.6
3.6
Frequency (GHz)
Frequency (GHz)
Figure 57. Input Match vs. Frequency over
Figure 58. Output Match vs. Frequency over
Temperature and Voltage – WB Mode
Temperature and Voltage – WB Mode
0
-2
0
-2
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-4
-4
-6
-6
-8
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-10
-12
-14
-16
-18
-20
-22
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-24
-26
-28
-30
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
Frequency (GHz)
Frequency (GHz)
nd
rd
Figure 59.
2
Harmonic vs. Fundamental Freq
Figure 60. 3
Harmonic vs. Fundamental Freq
over Temp and Voltage – WB Mode
over Temp and Voltage – WB Mode
0
-10
-20
-30
-40
-50
-60
-70
-80
0
-10
-20
-30
-40
-50
-60
-70
-80
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-90
0.4
-90
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
0.8
1.2
1.6
2.0
2.4
2.8
3.2
Frequency (GHz)
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
19
March23,2017
F2480 Datasheet
Typical Performance Characteristics – Amplifier – Wide Band Mode [2]
Figure 62. Output IP2H vs. Frequency over
Temperature and Voltage – WB Mode
Figure 61. Output IP3 vs. Frequency over
Temperature and Voltage – WB Mode
45
40
35
30
25
60
55
50
45
40
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
20
15
35
30
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
Figure 63. Output P1dB vs. Frequency over
Temperature and Voltage – WB Mode
Figure 64. Noise Figure vs. Frequency over
Temperature and Voltage – WB Mode
23
22
21
20
19
18
17
16
9
8
7
6
5
4
3
2
1
0
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
15
14
13
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
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March23,2017
F2480 Datasheet
Typical Performance Characteristics – Amplifier – Low Band Mode [1]
Figure 65. Gain vs. Frequency over Temperature
Figure 66. Reverse Isolation vs. Frequency over
and Voltage – LB mode
Temperature and Voltage – LB Mode
16
15
14
13
12
11
10
9
-10
-12
-14
-16
-18
-20
-22
-24
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
8
7
6
-26
-28
-30
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
3.6
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
3.6
3.6
Frequency (GHz)
Figure 67. Input Match vs. Frequency over
Temperature and Voltage – LB Mode
Frequency (GHz)
Figure 68. Output Match vs. Frequency over
Temperature and Voltage – LB Mode
0
-2
0
-2
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-4
-4
-6
-6
-8
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-10
-12
-14
-16
-18
-20
-22
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-24
-26
-28
-30
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
Frequency (GHz)
Harmonic vs. Fundamental Freq
over Temp and Voltage – LB Mode
Frequency (GHz)
Harmonic vs. Fundamental Freq
over Temp and Voltage – LB Mode
nd
rd
Figure 69.
2
Figure 70. 3
0
-10
-20
-30
-40
-50
-60
-70
-80
0
-10
-20
-30
-40
-50
-60
-70
-80
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-90
0.4
-90
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
0.8
1.2
1.6
2.0
2.4
2.8
3.2
Frequency (GHz)
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Typical Performance Characteristics – Amplifier – Low Band Mode [2]
Figure 71. Output IP3 vs. Frequency over
Figure 72. Output IP2H vs. Frequency over
Temperature and Voltage – LB Mode
Temperature and Voltage – LB Mode
45
40
35
30
25
60
55
50
45
40
35
30
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
20
15
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
Figure 73. Output P1dB vs. Frequency over
Temperature and Voltage – LB Mode
23
22
21
20
19
18
17
16
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
15
14
13
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
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F2480 Datasheet
Typical Performance Characteristics – Amplifier – High Band Mode [1]
Figure 74. Gain vs. Frequency over Temperature
and Voltage – HB mode
Figure 75. Reverse Isolation vs. Frequency over
Temperature and Voltage – HB Mode
16
15
14
13
12
11
10
9
-10
-12
-14
-16
-18
-20
-22
-24
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
8
7
6
-26
-28
-30
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
Figure 76. Input Match vs. Frequency over
Temperature and Voltage – HB Mode
Figure 77. Output Match vs. Frequency over
Temperature and Voltage – HB Mode
0
-2
0
-2
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-4
-4
-6
-6
-8
-8
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-10
-12
-14
-16
-18
-20
-22
-24
-26
-28
-30
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
nd
rd
Figure 78. 2 Harmonic vs. Fundamental Freq
over Temp and Voltage – HB Mode
Figure 79. 3 Harmonic vs. Fundamental Freq
over Temp and Voltage – HB Mode
0
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-10
-20
-30
-40
-50
-60
-70
-80
-90
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Typical Performance Characteristics – Amplifier – High Band Mode [2]
Figure 80. Output IP3 vs. Frequency over
Temperature and Voltage – HB Mode
Figure 81. Output IP2H vs. Frequency over
Temperature and Voltage – HB Mode
45
40
35
30
25
60
55
50
45
40
35
30
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
20
15
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
Frequency (GHz)
Figure 82. Output P1dB vs. Frequency over
Temperature and Voltage – HB Mode
23
22
21
20
19
18
17
16
15
14
13
-40 C / 4.75 V
+25 C / 4.75 V
+105 C / 4.75 V
-40 C / 5.00 V
+25 C / 5.00 V
+105 C / 5.00 V
-40 C / 5.25 V
+25 C / 5.25 V
+105 C / 5.25 V
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
3.6
Frequency (GHz)
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Device Usage
Table 8. Suggested Components for Optimum Linearity Performance of the Amplifier
RSET
Pin 12 to GND
(kΩ)
RDSET
Pin 13 to GND
(kΩ)
Frequency Range
(MHz)
Band_Select
Pin 10
C1
(pF)
Icc
(mA)
Band
Low Band
Mid Band
High Band
Wide Band
400 – 1100
1100 – 2200
2200 – 3000
400 – 3000
LB (Open)
HB (GND)
HB (GND)
HB (GND)
2.1
2.4
2.4
2.4
9.1
9
9
6
9
106
121
121
121
60.4
90.9
60.4
Note: Mid Band and Wide Band use the same setting and component values.
Table 9. Control Pins Usage for the TX VGA
Pin Description
Pin
Input Level
Function
Logic LOW
Improves higher frequency performance
Band_Select
10
Logic HIGH or Open Circuit Improves lower frequency performance
Logic LOW or Open Circuit
Logic HIGH
Amplifier Powered On
STBY
11
Amplifier Power Savings Mode
Negative Attenuation Slope
VCTRL = 0.0 V results in insertion loss
VCTRL = 2.8 V results in maximum attenuation
Logic LOW
Logic HIGH
VMODE
22
Positve Attenuation Slope
VCTRL = 2.8 V results in insertion loss
VCTRL = 0.0 V results in maximum attenuation
Application Information
The F2480 has been optimized for use in high performance RF applications from 400 to 3000 MHz.
STBY
The STBY control pin allows for power saving when the device is not in use. Setting the STBY pin as a logic low or by leaving the pin open
will produce a full current operation mode. The STBY pin has an internal 1 MΩ resistor to ground. Applying logic high to this pin will put the
part in the power savings mode.
Band_Select
The Band_Select control pin can be used to boost the current in the device. This is typical done in the High Band and Wide Band frequency
applications by grounding the Band_Select pin. Internally there is a 1.5 MΩ pullꢀup resistor to set this pin high if no connection is made to it.
RSET and RDSET
RSET (pin 12) and RDSET (pin 13) use external resistors to ground to set the DC current in the device and to optimize the linearity
performance of the amplifier stage. The resistor values in Table 8 can be used as a guide for the RF band of interest. By decreasing the
resistor value to ground on the RSET pin will increase the DC current in the amplifier stage. The maximum operating DC current through
RSET should never be higher than 1.5mA at TEP= 105 ºC. The resistor to ground on RDSET is used to optimize the linearity performance in
conjunction with the resistor on RSET.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Application Information (Cont.)
Amplifier Stability
The standalone amplifier is not unconditionally stable. Set RS = 5ꢁ and R1 = 500ꢁ to makes the circuit unconditionally stable. By increasing
RS from the EVKIT value of 0ꢁ to 5ꢁ decreases the small signal gain by approx. 0.5dB and increases the NF by approx. 0.5dB. By changing
R1 from an open to 500ꢁ decreases the small signal gain by approx. 0.5dB and decreases the OIP3 and OP1dB by approx. 0.5dB.
ATTEN_RF1 and ATTEN_RF2 Ports
The attenuator stage is biꢀdirectional thus allowing ATTEN_RF1 or ATTEN_RF2 to be used as the RF input. As displayed in the Typical
Operating Conditions curves, ATTEN_RF1 shows enhanced linearity. VCC must be applied prior to the application of RF power to ensure
reliability. DC blocking capacitors are required on the RF pins and should be set to a value that results in a low reactance over the frequency
range of interest.
Attenuator Default Start-up
The VCTRL pin has an internal pullꢀdown resistor while VMODE does not have an internal pullꢀup or pullꢀdown resistor and thus needs to be set
externally. If VMODE is set to a logic LOW and VCTRL = 0V, the part will power up in the insertion loss state. If VMODE is set to a logic HIGH and
VCTRL = 0V the part will power up in the maximum attenuation state. It is recommended that the user tie VMODE to either ground or logic HIGH.
Ensure the VMODE and VCTRL pin voltages meet the dependencies to VCC as noted in the General Specifications Table during power up or
under operation.
VCTRL
The VCTRL pin is used to control the attenuation of the attenuator stage. With VMODE set to a logic LOW (HIGH), this places the device in a
negative (positive) slope mode where increasing (decreasing) the VCTRL voltage produces an increasing (a decreasing) attenuation from min
attenuation (max attenuation) to max attenuation (min attenuation) respectively. See the General Specifications Table for the allowed control
voltage range and its dependence on VCC. Apply VCC before applying voltage to the VCTRL pin to prevent damage to the onꢀchip pullꢀup ESD
diode. If this sequencing is not possible, then set resistor R6 to 1kꢁ to limit the current into the VCTRL pin.
VMODE
The VMODE pin is used to set the attenuation vs. VCTRL slope. With VMODE set to logic LOW (HIGH) this will set the attenuation slope to be
negative (positive). A negative (positive) slope is defined as increasing (decreasing) attenuation with increasing (decreasing) VCTRL voltage.
The EVKit provides an onꢀboard jumper to manually set the VMODE. Installing a jumper on header J4 from VMODE to GND (VIH) to set the device
for a negative (positive) slope. Resistors R2 and R3 on the evaluation board form a voltage divider to establish a compatible logic HIGH level
using the VCC supply as a source. The VMODE does not have an internal pullꢀup or pullꢀdown resistor so it must be set externally.
Power Supplies
A common 5V power supply should be used for all pins requiring DC power. All supply pins should be bypassed with external capacitors to
minimize noise and fast transients. Supply noise can degrade noise figure and fast transients can trigger ESD clamps and cause them to fail.
Supply voltage change or transients should have a slew rate smaller than 1V / 20ꢃs. In addition, all control pins should remain at 0V (± 0.3V)
while the supply voltage ramps or while it returns to zero.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Control Pin Interface
If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit
at the input of each control pin is recommended. This applies to control pins 10, 11, 20, and 22 as shown below. Note the recommended
resistor and capacitor values do not necessarily match the EVKit BOM for the case of poor control signal integrity. For multiple devices driven
by a single control line, values will need to be adjusted accordingly so as to not load the control line.
Figure 83. Control Pin Components for Signal Integrity
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Evaluation Kit Picture
Figure 84. Top View
Figure 85. Bottom View
© 2017 Integrated Device Technology, Inc.
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March23,2017
F2480 Datasheet
Evaluation Kit / Applications Circuit
Figure 86. Electrical Schematic
Note: RS and R1 are used to produce unconditional stability for the amplifier and are not included in the performance stated in this datasheet.
See applications information section above.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Table 10. Bill of Material (BOM)
Part Reference
QTY
Description
Manufacturer Part #
Manufacturer
C1
1
2
1
1
3
2
1
1
0
2
0
5
1
1
0
0
0
5
6
1
2
2
1
1
9pF ±0.25pF, 50V, C0G Ceramic Capacitor (0402)
100pF ±5%, 50V, C0G Ceramic Capacitor (0402)
10ꢃF ±20%, 6.3V, X5R Ceramic Capacitor (0603)
47pF ±5%, 50V, C0G Ceramic Capacitor (0402)
1000pF ±5%, 50V, C0G Ceramic Capacitor (0402)
10nF ±5%, 50V, X7R Ceramic Capacitor (0603)
0.1ꢃF ±10%, 16V, X7R Ceramic Capacitor (0402)
0ꢁ ±1%, 1/10W, Resistor (0402)
Not Installed
GRM1555C1H9R0C
GRM1555C1H101J
GRM188R60J106M
GRM1555C1H470J
GRM1555C1H102J
GRM188R71H103J
GRM155R71C104K
ERJꢀ2GE0R00X
Murata
Murata
Murata
Murata
Murata
Murata
Murata
Panasonic
C2, C9
C3
C4
C5, C7, C10
C6, C8
C11
RS [a]
R1 [a]
R2, R3
100kꢁ ±1%, 1/10W, Resistor (0402)
Not Installed
ERJꢀ2RKF1003X
Panasonic
R4
R5, R6, R7, R11, R13
0ꢁ ±1%, 1/10W, Resistor (0402)
60.4kꢁ ±1%, 1/10W, Resistor (0402)
2.4kꢁ ±1%, 1/10W, Resistor (0402)
Not Installed, Alternate 1 Bias Resistor (0402)
Not Installed, Alternate 2 Bias Resistor (0402)
Not Installed, Alternate 3 Bias Resistor (0402)
Test Point
ERJꢀ2GE0R00X
ERJꢀ2RKF6042X
ERJꢀ2RKF2401X
Panasonic
Panasonic
Panasonic
R8
R9
R10, R12
R14, R15
R16, R17
TP1 – TP5
J1, J2, J3, J5, J6, J7
J4
5021
Keystone Electronics
SMA EndꢀLaunch (small)
142ꢀ0711ꢀ821
961103ꢀ6404ꢀAR
961102ꢀ6404ꢀAR
67997ꢀ108HLF
F2480NBGI
Emerson Johnson
CONN HEADER VERT SGL 3 POS GOLD
CONN HEADERS VERT SGL 2 POS GOLD
2 x 4 HEADER VERT
3M
3M
J8, J9
J10, J11
U1
FCI
IDT
IDT
RF Amplifier / VVA
Printed Circuit Board
F2480 PCB
a. The data included in this datasheet does not include these as stability resistors. For the amplifier to be unconditionally stable
RS and R1 must be installed. See the Applications Section for more details.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Evaluation Kit Operation
Below is a basic setup procedure for configuring and testing the F2480 EVKit.
Pre-Configure EVKit:
The section is a guide to setup the EVKit for testing. Remove the J8 header shunt if the application is for low band operation. All other
operating bands require the J8 shunt to be installed. Remove any shorting shunt from header J9 which will allow the part to be in the
operating mode when powered up. Verify that there is a shunt between pins 1, 2 of J11 and pins 1, 2 of J10. These pins configure the PCB to
use the installed bias resistors to support Mid Band and Wide Band (see Table 8). Alternate resistors can be installed on the unpopulated
resistor slots on J11 and J10 to support the other operating bands (see Additional EVKit Information section). If a negative (positive)
attenuator control slope is desired, connect a shunt between pins 1 and 2 (2 and 3) of header J4.
Power Supply Setup:
Without making any connections to the EVKit, setup one fixed power supply for 5V with a current limit of 160mA and one variable supply set
to 0V with a current limit of 10mA. Disable both power supplies.
RF Test Setup:
Set up the RF test set to the desired frequency and power ranges within the specified operating limits noted in this datasheet.
Disable the output power of all the RF sources.
Connect EVKit to Test setup:
With the RF sources and power supplies disabled connect the fixed 5V power supply to connector J3, the variable supply to J6 and the RF
connections to the desired RF ports. Terminate any unused RF ports (J1, J2, J5, J7) into 50ꢁ.
Powering Up the EVkit:
Enable the 5V supply and observe a DC current of approx. 120mA.
Enable the variable supply.
Enable the RF sources. Verify that the DC current stays about 120mA to verify that the amplifier is not being over driven by RF input power.
If the J4 connection is set for a negative (positive) attenuation slope then increasing the variable supply with produce increased (decreased)
attenuation for the attenuator path (J2 to J7).
Powering Down the EVkit:
Disable the RF power being applied to the device.
Adjust the variable supply down to 0V and disable it.
Disable the 5V supply.
Disconnect EVKit from the RF test stand.
Additional EVKIT Information
EVKit modification to support additional Table 8 bias settings:
The standard EVKit is setup for only one RSET / RDSET bias setting (pins 12/ 13 on the F2480) noted in Table 8.
Additional Table 8 values (R12/R10, R15/R14, R17/ R16) can be installed on the board to allow for different jumper settings. Never have two
shunts installed at the same time on header J11 since this may produce excessive bias current and damage the part. As the resistance to
ground decreases on pin 12 of the device, the DC current will increase. The DC current of the EVKIT should never exceed 250mA.
© 2017 Integrated Device Technology, Inc.
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F2480 Datasheet
Package Drawings
Figure 87. Package Outline Drawing (5 x 5 x 0.75 mm 32-pin TQFN), NBG32
© 2017 Integrated Device Technology, Inc.
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March23,2017
F2480 Datasheet
Recommended Land Pattern
Figure 88. Recommended Land Pattern
© 2017 Integrated Device Technology, Inc.
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March23,2017
F2480 Datasheet
Ordering Information
Orderable Part Number
Package
MSL Rating
Shipping Packaging
Temperature
F2480NBGI
F2480NBGI8
F2480EVBI
5 x 5 x 0.75 mm 32ꢀTQFN
5 x 5 x 0.75 mm 32ꢀTQFN
Evaluation Board
1
1
Tray
ꢀ40 to +105 °C
ꢀ40 to +105 °C
Tape and Reel
Marking Diagram
Line 1 ꢀ Company.
Line 2 ꢀ Product Number.
Line 3 ꢀ “Z” the initial alpha characters are the ASM Test Step.
IDT
Line 3 ꢀ “1503” is two digits for the year and week that the part was assembled (2015, Week 3).
Line 3 ꢀ “L” or last alpha characters are the Assembler Code.
Line 4 ꢀ Near Dot – Lot Code.
F2480NBGI
Z1503L
Q32A016Y
Revision History
Revision Date
Description of Change
March 23, 2017
Initial release.
Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138
Sales
Tech Support
www.IDT.com/go/support
1ꢀ800ꢀ345ꢀ7015 or 408ꢀ284ꢀ8200
Fax: 408ꢀ284ꢀ2775
www.IDT.com/go/sales
www.IDT.com
DISCLAIMER Integrated Device Technology, Inc. (IDT) and its affiliated companies (herein referred to as “IDT”) reserve the right to modify the products and/or specifications described herein at any time,
without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same
way when installed in customer products. The information contained herein is provided without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability
of IDT's products for any particular purpose, an implied warranty of merchantability, or nonꢀinfringement of the intellectual property rights of others. This document is presented only as a guide and does not
convey any license under intellectual property rights of IDT or any third parties.
IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be
reasonably expected to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the
property of IDT or their respective third party owners. For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary. All contents of this document are copyright of
Integrated Device Technology, Inc. All rights reserved.
© 2017 Integrated Device Technology, Inc.
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March23,2017
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