F0453BLEGK [IDT]
Dual Path RF Switch with LNA and DVGA 3300MHz to 4000MHz;
| 型号： | F0453BLEGK |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Dual Path RF Switch with LNA and DVGA 3300MHz to 4000MHz |
| 文件： | 总35页 (文件大小：2354K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual Path RF Switch with LNA and
DVGA 3300MHz to 4000MHz
F0453B
Datasheet
Description
Features
The F0453B is an integrated dual-path RF front-end consisting of
an RF switch and two gain stages with 6dB gain control used in
the analog front-end receiver of an Active Antenna System (AAS).
The F0453B supports frequencies from 3300MHz to 4000MHz.
.
Gain at 3500MHz
34.5dB typical in High Gain Mode
28.5dB typical in Low Gain Mode
1.35dB NF at 3500MHz
+23dBm OIP3 at 3500MHz
OP1dB at 3500MHz
.
.
.
The F0453B provides 34.5dB gain with +23dBm OIP3, +15dBm
output P1dB, and 1.35dB noise figure at 3500MHz. Gain is
reduced 6dB in a single step with a maximum settling time of
31ns. The device uses a single 3.3V supply and 130mA of IDD.
+15dBm in High Gain Mode
+14dBm in Low Gain Mode
The F0453B is offered in a 5 5 0.8 mm, 32-LGA package with
50Ω input and output amplifier impedances for ease of integration
into the signal path.
.
.
.
.
.
.
50Ω single-ended input / output amplifier impedances
IDD = 130mA
Independent Standby Mode for power savings
Supply voltage: +3.15V to +3.45V
5 5 mm, 32-LGA package
-40°C to +105°C exposed pad operating temperature range
Competitive Advantage
.
.
.
.
High integration
Low noise and high linearity
On-chip matching and bias
Extremely low current consumption
Block Diagram
Typical Applications
.
.
.
Multi-mode, Multi-carrier receivers
4.5G (LTE Advanced)
5G band 42 and 43
SW1_IN
STBY1
ATT1_CTRL
SW1_CTRL
SW2_CTRL
ATT2_CTRL
STBY2
SW2_IN
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F0453B Datasheet
Contents
Pin Assignments....................................................................................................................................................................................................5
Pin Descriptions.....................................................................................................................................................................................................6
Absolute Maximum Ratings...................................................................................................................................................................................7
Recommended Operating Conditions ...................................................................................................................................................................8
Electrical Characteristics: General ........................................................................................................................................................................9
Electrical Characteristics: 3300MHz [1]...............................................................................................................................................................11
Electrical Characteristics: 3300MHz [2]...............................................................................................................................................................12
Electrical Characteristics: 3400–3600MHz [1].....................................................................................................................................................13
Electrical Characteristics: 3400–3600MHz [2].....................................................................................................................................................14
Electrical Characteristics: 3600–3800MHz [1].....................................................................................................................................................15
Electrical Characteristics: 3600–3800MHz [2].....................................................................................................................................................16
Electrical Characteristics: 3800–4000MHz [1].....................................................................................................................................................17
Electrical Characteristics: 3800–4000MHz [2].....................................................................................................................................................18
Thermal Characteristics.......................................................................................................................................................................................19
Typical Operating Conditions ..............................................................................................................................................................................19
Programming.......................................................................................................................................................................................................24
Evaluation Kit Picture ..........................................................................................................................................................................................25
Evaluation Kit / Applications Circuit.....................................................................................................................................................................26
Evaluation Kit Operation......................................................................................................................................................................................28
Power Supply Setup...................................................................................................................................................................................28
Standby (STBY) Pin ...................................................................................................................................................................................28
Gain Step Control Setup.............................................................................................................................................................................29
Switch Control Pin ......................................................................................................................................................................................29
Mode Control Setup....................................................................................................................................................................................29
Power-On Procedure..................................................................................................................................................................................29
Power-Off Procedure..................................................................................................................................................................................29
Application Information........................................................................................................................................................................................30
Power Supplies...........................................................................................................................................................................................30
Control Pin Interface...................................................................................................................................................................................30
Package Outline Drawings ..................................................................................................................................................................................31
Ordering Information............................................................................................................................................................................................31
Marking Diagram .................................................................................................................................................................................................31
Revision History...................................................................................................................................................................................................32
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F0453B Datasheet
List of Figures
Figure 1. Pin Assignments for 5 5 0.8 mm 32-LGA – Top View...................................................................................................................5
Figure 2. Typical TX Input Power and Reduced Exposed Pad Temperature Profile[c]........................................................................................8
Figure 3. Rx Mode Gain (High Gain) ................................................................................................................................................................20
Figure 4. Rx Mode Gain (Low Gain).................................................................................................................................................................20
Figure 5. Rx Mode Channel Isolation (High Gain)............................................................................................................................................20
Figure 6. Rx Mode Channel Isolation (Low Gain).............................................................................................................................................20
Figure 7. Rx Mode Input Return Loss (High Gain)............................................................................................................................................20
Figure 8. Rx Mode Input Return Loss (Low Gain) ............................................................................................................................................20
Figure 9. Rx Mode Output Return Loss (High Gain).........................................................................................................................................21
Figure 10. Rx Mode Output Return Loss (Low Gain)..........................................................................................................................................21
Figure 11. Rx Mode OP1dB vs. Frequency (High Gain).....................................................................................................................................21
Figure 12. Rx Mode OP1dB vs. Frequency (Low Gain)......................................................................................................................................21
Figure 13. Rx Mode OIP3 vs. Frequency (High Gain)........................................................................................................................................21
Figure 14. Rx Mode OIP3 vs. Frequency (Low Gain).........................................................................................................................................21
Figure 15. Tx Mode Isolation (SW_IN to RX_OUT)............................................................................................................................................22
Figure 16. Tx Mode Channel Isolation (Switch Inputs).......................................................................................................................................22
Figure 17. Tx Mode Input Return Loss ...............................................................................................................................................................22
Figure 18. Stability Factor...................................................................................................................................................................................22
Figure 19. Rx Mode Noise Figure (High Gain) ...................................................................................................................................................22
Figure 20. Rx Mode Noise Figure (Low Gain) ....................................................................................................................................................22
Figure 21. Switching Time from TX to RX Mode ................................................................................................................................................23
Figure 22. Switching Time from RX to TX Mode ................................................................................................................................................23
Figure 23. Standby to RX Mode Transient Time.................................................................................................................................................23
Figure 24. RX Mode to Standby Transient Time.................................................................................................................................................23
Figure 25. 6dB Gain Reduction Transient Time..................................................................................................................................................23
Figure 26. 6dB Gain Increase Transient Time....................................................................................................................................................23
Figure 27. Evaluation Kit: Top View....................................................................................................................................................................25
Figure 28. Evaluation Kit: Bottom View ..............................................................................................................................................................25
Figure 29. Electrical Schematic ..........................................................................................................................................................................26
Figure 30. Connections of Evaluation Board ......................................................................................................................................................28
Figure 31. Standby and Switch Control Logics...................................................................................................................................................29
Figure 32. Control Pin Interface Schematic........................................................................................................................................................30
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F0453B Datasheet
List of Tables
Table 1. Pin Descriptions...................................................................................................................................................................................6
Table 2. Absolute Maximum Ratings.................................................................................................................................................................7
Table 3. Recommended Operating Conditions .................................................................................................................................................8
Table 4. Electrical Characteristics: General ......................................................................................................................................................9
Table 5. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance..........................................................................................11
Table 6. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance........................................................12
Table 7. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance..........................................................................................13
Table 8. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance........................................................14
Table 9. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance..........................................................................................15
Table 10. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance........................................................16
Table 11. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance..........................................................................................17
Table 12. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance........................................................18
Table 13. Thermal Characteristics.....................................................................................................................................................................19
Table 14. Gain Step Truth Table .......................................................................................................................................................................24
Table 15. Standby and RF Switch Truth Table..................................................................................................................................................24
Table 16. Bill of Material (BOM) ........................................................................................................................................................................27
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F0453B Datasheet
Pin Assignments
Figure 1. Pin Assignments for 5 5 0.8 mm 32-LGA – Top View
ATT1_CTRL
1
GND
24
23
22
21
20
19
18
17
STBY1
2
SW1_IN
GND
SW1_CTRL
GND
3
4
5
6
7
8
GND
GND
GND
SW2_CTRL
STBY2
GND
SW2_IN
GND
ATT2_CTRL
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F0453B Datasheet
Pin Descriptions
Table 1.
Pin Descriptions
Number
Name
Description
1-bit 6dB gain control for path 1. (Low/open = no attenuation; High = 6dB attenuation). A 500kΩ pull-down
resistor is connected between this input and GND.
1
2
ATT1_CTRL
STBY1
Standby (Low/open = path 1 power ON; High = path 1 power OFF). A 500kΩ pull-down resistor is connected
between this input and GND.
RF SWITCH 1 control (Low/open = select main RX PATH 1; High = termination). SW1_CTRL also puts path 1
into Standby Mode for minimum current consumption. A 500kΩ pull-down resistor is connected between this
input and GND.
3
SW1_CTRL
GND
4, 5, 9, 11,
13, 15, 17,
19, 20, 21,
22, 24, 26,
28, 30, 32
Ground these pins.
Power supply. Bypass to GND with capacitors shown in the F0453B Application Circuit (see Figure 29) as close
as possible to pin.
12, 14, 27, 29
VDD
SW2_CTRL
STBY2
RF SWITCH 2 control (Low/open = select main RX PATH 2; High = termination). SW2_CTRL also puts path 2
into Standby Mode for minimum current consumption. A 500kΩ pull-down resistor is connected between this
input and GND.
6
7
Standby (Low/open = path 2 power ON; High = path 2 power OFF). A 500kΩ pull-down resistor is connected
between this input and GND.
1-bit 6dB gain control for path 2. (Low/open = no attenuation; High = 6dB attenuation). A 500kΩ pull-down
resistor connects between this input and GND.
8
ATT2_CTRL
RX2_OUT
SW2_OUT
10
16
RF output path 2 matched to 50Ω. Use external DC block as close to the pin as possible.
RF2 switch output matched to 50Ω. Use external 50Ω terminating resistor with proper power rating as required
for the application.
18
23
SW2_IN
SW1_IN
RF2 switch input matched to 50Ω. Use external DC block as close to the pin as possible.
RF1 switch input matched to 50Ω. Use external DC block as close to the pin as possible.
RF1 switch output matched to 50Ω. Use external 50Ω terminating resistor with proper power rating as required
for the application
25
31
SW1_OUT
RX1_OUT
RF output path 1 matched to 50Ω. Use external DC block as close to the pin as possible.
Exposed Pad. Internally connected to GND. Solder this exposed pad to a PCB pad that uses multiple ground
vias to provide heat transfer out of the device into the PCB ground planes. These multiple via grounds are also
required to achieve the noted RF performance.
— EPAD
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F0453B Datasheet
Absolute Maximum Ratings
Stresses beyond those listed below may cause permanent damage to the device. Functional operation of the device at these or any other
conditions beyond those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Table 2.
Absolute Maximum Ratings
Parameter
Symbol
VDD
Minimum
-0.3
Maximum
+3.6
Units
VDD to GND
V
V
STBY1, STBY2, ATT1_CTRL, ATT2_CTRL, SW1_CTRL, SW2_CTRL to GND
VCTRL
-0.3
VDD + 0.25
SW1_IN, SW2_IN, RX1_OUT, RX2_OUT, SW1_OUT, SW2_OUT to GND
Externally Applied DC Voltage
VSW
-50
50
mV
Tx Mode CW Average Input Power +7.5dB PAR at SW1_IN, SW2_IN ports,
10s, 89% Duty Cycle
PABS_TX
+31
+33 [b]
dBm
50Ω, TEPAD = 105°C [a], VDD = +3.3V
Rx Mode Average Input Power +7.5dB PAR at SW1_IN, SW2_IN ports,
1 hour single event, 50% Duty Cycle
PABS_RX
+8
dBm
50Ω, TEPAD = 105°C [a], VDD = +3.3V
Storage Temperature Range
TST
-65
+150
+260
°C
°C
Lead Temperature (soldering, 10s)
TLEAD
Electrostatic Discharge – HBM
1500
VESDHBM
V
V
(JEDEC/ESDA JS-001-2012)
(Class 1C)
Electrostatic Discharge – CDM
(JEDEC JS-002-2014)
500
VESDCDM
(Class C2a)
ALL pins except pins 16, 18, 23, 25
Electrostatic Discharge – CDM
(JEDEC JS-002-2014)
Pins 16, 18, 23, 25
125
VESDCDM
V
(Class C0b)
[a] TEPAD = Temperature of the exposed paddle.
[b] RF input exposures greater than +31dBm and up to +33dBm for multiple extended periods will affect device reliability and lifetime if the
maximum recommended input junction temperature is exceeded.
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F0453B Datasheet
Recommended Operating Conditions
Table 3.
Recommended Operating Conditions
Parameter
Symbol
VDD
Condition
Minimum
3.15
Typical
Maximum
3.45
Units
V
Power Supply Voltage
3.3
Operating Temperature Range
RF Frequency Range
TEPAD
fRF
Exposed Paddle
-40
+105
°C
3300
4000
MHz
Tx Mode CW Average Input Power,
+7.5dB PAR, Full Life Time [a]
PMAX_TX
89% Duty Cycle
89% Duty Cycle
+30 [b]
-25
dBm
dBm
50Ω, VDD = +3.3V
Rx Mode CW Average Input Power,
+7.5dB PAR, Full Life Time [a]
PMAX_RX
50Ω, VDD = +3.3V
Port Impedance (SW1_IN, SW2_IN,
RX1_OUT, RX2_OUT)
ZRF
TJ
50
Ω
Junction Temperature
+125
°C
[a] Assumes device environmental temperature cycling within the specified exposed pad operating temperature range of -40°C and 105°C and a
maximum junction temperature of 125°C.
[b] Operation beyond the maximum recommended operating input power level should be limited and have reduced exposed pad temperatures to
maintain device reliability per foundry guidelines (see Figure 2). Electrical characteristics and lifetime are not guaranteed for RF input power
levels beyond what is specified in this table.
[c]
Figure 2. Typical TX Input Power and Reduced Exposed Pad Temperature Profile
Average Input Power +7.5dB PAR
35
34
33
32
31
30
29
28
27
26
25
60
65
70
75
80
85
90
95 100 105 110 115
Exposed Pad Temperature (°C)
[c] Profile represents estimates to maintain maximum junction temperature ≤ 125°C using IDT specific evaluation board and test environment.
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Electrical Characteristics: General
Table 4.
Electrical Characteristics: General
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, TEPAD = +25°C,
STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless otherwise noted.
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
Lower of
(VDD, 3.3)
Logic Input High Threshold
VIH
1.17 [a]
V
Logic Input Low Threshold
Logic Current
VIL
-0.3
0.63
10
V
IIH, IIL
For each control pin
2 paths in Rx Mode
-10
µA
130
70
180
1 path in Rx Mode
1 path in Tx Mode
100
1 path in Rx Mode
DC Current
IDD
67
5
mA
1 path in Standby Mode
1 path in Tx Mode
1 path in Standby Mode
2 paths in Standby Mode
fRF = 3300MHz to 3800MHz
fRF = 3800MHz to 4000MHz
5
6
5
Gain Step
GSTEP
dB
Relative to maximum gain,
over-voltage, and temperature
Gain Step Absolute Error
Relative Phase Gain Step
Gain Step Settling Time [b]
GSTEP_ERR
GSTEP_PH
GSTEP_SET
±0.5
21
dB
deg
ns
50% control logic to RF output
within ±0.1dB of final value
26
31
30
50% control logic to RF output
within ±1 degree of final value
Gain Step Phase Settling Time [b]
Power ON Switching Time [b]
GSTEP_PHSET
17
ns
To Rx Mode from Tx Mode
50% control logic to RF output
settled to within ±0.1dB of final
value
SWON
1
µs
To Tx Mode from Rx Mode
50% control logic to RF input
settled within ±0.1dB of final
value
Power OFF Switching Time [b]
SWOFF
0.5
µs
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F0453B Datasheet
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
To Rx Mode from Standby
Mode
Power ON from Standby Mode [b]
SWON_STANDBY
1
1
µs
50% STBY to RF output settled
within ±0.1dB of final value
To Standby Mode from Rx
Mode
Power OFF to Standby Mode [b]
SWOFF_STANDBY
µs
50% STBY to gain below
-25dB from max gain
[a] Items in the Minimum/Maximum columns in bold italics are guaranteed by test. Items in the Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] fRF = 3500MHz. Assumes the control signal is clean and no external RC circuitry is required on the pin. Adding RC circuitry increases switching
time.
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December 9, 2019
F0453B Datasheet
Electrical Characteristics: 3300MHz [1]
Table 5.
Electrical Characteristics: RX Path in Rx Mode Cascaded Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3300MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
Measured at SW1_IN, SW2_IN
High Gain Mode,
11
17
Measured at SW1_IN, SW2_IN
Low Gain Mode,
Input Return Loss
RLIN
9
9
15
13
dB
Measured at SW1_IN, SW2_IN
TX mode [a] [b]
Measured at RX1_OUT,
RX2_OUT,
Output Return Loss
RLOUT
5
6
dB
High/Low Gain Modes,
RX1_OUT to SW1_IN, or
RX2_OUT to SW2_IN
Reverse Isolation
Gain
ISOREV
44
60
34
dB
dB
GHG
GHG_TEMP
GLG
High Gain Mode
TEPAD = -40 to 105°C
Low Gain Mode
32
31
36
37
Gain Attenuated
Noise Figure
28
dB
dB
Measured at antenna port
ideally matched to LNA
NF
NF
1.3
1.5
2
TEPAD = 105°C
Low Gain Mode
Noise Figure
dB
1.3
[a] Specification reflects use of an external termination resistor at SW1_OUT, SW2_OUT with an RL > 22dB.
[b] Performance can be further improved with tuning at the SW1_OUT and SW2_OUT ports.
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Electrical Characteristics: 3300MHz [2]
Table 6.
Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3300MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Pout = 0dBm/tone
Minimum
Typical
Maximum
Units
OIP31
23
5MHz tone separation
Pout = 0dBm/tone
OIP32
OIP33
5MHz tone separation
TEPAD = -40 to 105°C
20
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
Output Third-Order Intercept Point
dBm
23
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
OIP34
18
TEPAD = -40 to 105°C
OP1dB1
OP1dB2
OP1dB3
OP1dB4
High Gain Mode [b]
G-23
G-24
15
13
High Gain Mode
TEPAD = -40 to 105°C
Output 1dB Compression
dBm
Low Gain Mode
Low Gain Mode
G-18
40
TEPAD = -40 to 105°C
RFISO1 = (푅푋1_푂푈푇
)
푅푋2_푂푈푇
푑퐵
with -60 ≤ SW1_IN ≤ -30dBm
Channel Isolation
ISOCH
50
60
dB
dB
RFISO2 = (푅푋2_푂푈푇
)
푅푋1_푂푈푇
푑퐵
with -60 ≤ SW2_IN ≤ -30dBm
Tx Mode
RF Switch Isolation
ISOSW
50
Measured at SW_IN to
RX_OUT of the same channel
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] In the OP1dB calculation formula, “G” denotes the gain of each part instance at the frequency of interest and appropriate High / Low gain state.
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Electrical Characteristics: 3400–3600MHz [1]
Table 7.
Electrical Characteristics: RX Path in Rx Mode Cascaded Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3500MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
Measured at SW1_IN, SW2_IN
High Gain Mode,
14 [a]
20
fRF = 3400MHz to 3600MHz
Measured at SW1_IN, SW2_IN
Low Gain Mode,
Input Return Loss
RLIN
dB
13
9
20
13
fRF = 3400MHz to 3600MHz
Measured at SW1_IN, SW2_IN
TX mode [b] [c]
Measured at RX1_OUT,
RX2_OUT,
Output Return Loss
RLOUT
6
9
dB
dB
High/Low Gain Modes,
fRF = 3400MHz to 3600MHz
Reverse Isolation, RX1_OUT to
SW1_IN, or RX2_OUT to SW2_IN
ISOREV
fRF = 3400MHz to 3600MHz
50
60
GHG
GHG_TEMP
GLG
High Gain Mode
32
31
34.5
37
38
Gain
dB
dB
TEPAD = -40 to 105°C
Low Gain Mode
Gain Attenuated
25.5
28.5
±0.2
31.5
fRF = 3400MHz to 3600MHz
(Difference between maximum
and minimum gain in each
100MHz subrange within the
specified frequency range)
Gain Ripple
Noise Figure
GRIPPLE
dB
dB
Measured at antenna port
ideally matched to LNA
1.35
1.4
1.55
2.1
NF
TEPAD = 105°C
Low Gain Mode
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] Specification reflects use of an external termination resistor at SW1_OUT, SW2_OUT with a RL > 22dB.
[c] Performance can be further improved with tuning at the SW1_OUT and SW2_OUT ports.
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Electrical Characteristics: 3400–3600MHz [2]
Table 8.
Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3500MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Pout = 0dBm/tone
Minimum
Typical
Maximum
Units
OIP31
23
5MHz tone separation
Pout = 0dBm/tone
OIP32
OIP33
5MHz tone separation
TEPAD = -40 to 105°C
20
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
Output Third-Order Intercept Point
dBm
23
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
OIP34
18
TEPAD = -40 to 105°C
OP1dB1
OP1dB2
OP1dB3
OP1dB4
High Gain Mode [b]
G-23
G-24
15
14
High Gain Mode
TEPAD = -40 to 105°C
Output 1dB Compression
dBm
Low Gain Mode
Low Gain Mode
G-18
40
TEPAD = -40 to 105°C
RFISO1 = (푅푋1_푂푈푇
)
푅푋2_푂푈푇
푑퐵
with -60 ≤ SW1_IN ≤ -30dBm
Channel Isolation
ISOCH
50
60
dB
dB
RFISO2 = (푅푋2_푂푈푇
)
푅푋1_푂푈푇
푑퐵
with -60 ≤ SW2_IN ≤ -30dBm
Tx Mode
RF Switch Isolation
ISOSW
50
Measured at SW_IN to
RX_OUT of the same channel
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] In the OP1dB calculation formula, “G” denotes the gain of each part instance at the frequency of interest and appropriate High / Low gain state.
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Electrical Characteristics: 3600–3800MHz [1]
Table 9.
Electrical Characteristics: RX Path in Rx Mode Cascaded Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3700MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
Measured at SW1_IN, SW2_IN
High Gain Mode,
14 [a]
20
fRF = 3600MHz to 3800MHz
Measured at SW1_IN, SW2_IN
Low Gain Mode,
Input Return Loss
RLIN
dB
13
9
20
13
fRF = 3600MHz to 3800MHz
Measured at SW1_IN, SW2_IN
[b] [c]
TX mode
Measured at RX1_OUT,
RX2_OUT,
Output Return Loss
RLOUT
8
11
dB
High/Low Gain Modes,
fRF = 3600MHz to 3800MHz
Reverse Isolation, S12
Gain
ISOREV
GHG
fRF = 3600MHz to 3800MHz
High Gain Mode
50
32
30
25
60
dB
dB
dB
33.5
37
38
GHG_TEMP
GLG
TEPAD = -40 to 105°C
Low Gain Mode
Gain Attenuated
28
31.5
fRF = 3600MHz to 3800MHz
(Difference between maximum
and minimum gain in each
100MHz subrange within the
specified frequency range)
Gain Ripple
Noise Figure
GRIPPLE
±0.4
dB
dB
Measured at antenna port
ideally matched to LNA
1.45
1.5
1.60
2.25
NF
TEPAD = 105°C
Low Gain Mode
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] Specification reflects use of an external termination resistor at SW1_OUT, SW2_OUT with a RL > 22dB.
[c] Performance can be further improved with tuning at the SW1_OUT and SW2_OUT ports.
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Electrical Characteristics: 3600–3800MHz [2]
Table 10. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3700MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Pout = 0dBm/tone
Minimum
Typical
Maximum
Units
OIP31
23
5MHz tone separation
Pout = 0dBm/tone
OIP32
OIP33
5MHz tone separation
TEPAD = -40 to 105°C
20
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
Output Third-Order Intercept Point
dBm
23
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
OIP34
18
TEPAD = -40 to 105°C
OP1dB1
OP1dB2
OP1dB3
OP1dB4
High Gain Mode [b]
G-23
G-24
15
14
High Gain Mode
TEPAD = -40 to 105°C
Output 1dB Compression
dBm
Low Gain Mode
Low Gain Mode
G-18
40
TEPAD = -40 to 105°C
RFISO1 = (푅푋1_푂푈푇
)
푅푋2_푂푈푇
푑퐵
with -60 ≤ SW1_IN ≤ -30dBm
Channel Isolation
ISOCH
50
60
dB
dB
RFISO2 = (푅푋2_푂푈푇
)
푅푋1_푂푈푇
푑퐵
with -60 ≤ SW2_IN ≤ -30dBm
Tx Mode
RF Switch Isolation
ISOSW
50
Measured at SW_IN to
RX_OUT of the same channel
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] In the OP1dB calculation formula, “G” denotes the gain of each part instance at the frequency of interest and appropriate High / Low gain state.
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Electrical Characteristics: 3800–4000MHz [1]
Table 11. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3900MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Minimum
Typical
Maximum
Units
Measured at SW1_IN, SW2_IN
High Gain Mode,
11 [a]
17
fRF = 3800MHz to 4000MHz
Measured at SW1_IN, SW2_IN
Low Gain Mode,
Input Return Loss
RLIN
dB
9
9
16
15
fRF = 3800MHz to 4000MHz
Measured at SW1_IN, SW2_IN
TX mode [b] [c]
Measured at RX1_OUT,
RX2_OUT,
Output Return Loss
RLOUT
9
12
dB
High/Low Gain Modes,
fRF = 3800MHz to 4000MHz
Reverse Isolation, S12
Gain
ISOREV
GHG
fRF = 3800MHz to 4000MHz
High Gain Mode
45
55
32
dB
dB
dB
29.5
27.5
34.5
35.5
GHG_TEMP
GLG
TEPAD = -40 to 105°C
Low Gain Mode
Gain Attenuated
27
fRF = 3800MHz to 4000MHz
(Difference between maximum
and minimum gain in each
100MHz subrange within the
specified frequency range)
Gain Ripple
Noise Figure
GRIPPLE
±0.5
dB
dB
Measured at antenna port
ideally matched to LNA
1.55
1.6
1.8
2.5
NF
TEPAD = 105°C
Low Gain Mode
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] Specification reflects use of an external termination resistor at SW1_OUT, SW2_OUT with a RL > 22dB.
[c] Performance can be further improved with tuning at the SW1_OUT and SW2_OUT ports.
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Electrical Characteristics: 3800–4000MHz [2]
Table 12. Electrical Characteristics: RX Path in Rx Mode Cascaded Performance and TX Performance
See the F0453B Application Circuit in Figure 29. Specifications apply when operated as an Rx RF amplifier with VDD = +3.3V, fRF = 3900MHz,
TEPAD = +25°C, STBY = LOW, RX output power = -10dBm, ZS = ZL = 50Ω, and EVKit trace and connector losses are de-embedded unless
otherwise noted.
Parameter
Symbol
Condition
Pout = 0dBm/tone
Minimum
Typical
Maximum
Units
OIP31
22
5MHz tone separation
Pout = 0dBm/tone
OIP32
OIP33
5MHz tone separation
TEPAD = -40 to 105°C
18
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
Output Third-Order Intercept Point
dBm
22
Pout = 0dBm/tone
5MHz tone separation
Low Gain Mode
OIP34
17
TEPAD = -40 to 105°C
OP1dB1
OP1dB2
OP1dB3
OP1dB4
High Gain Mode [b]
G-23
G-24
13
12
High Gain Mode
TEPAD = -40 to 105°C
Output 1dB Compression
dBm
Low Gain Mode
Low Gain Mode
G-18
37
TEPAD = -40 to 105°C
RFISO1 = (푅푋1_푂푈푇
)
푅푋2_푂푈푇
푑퐵
with -60 ≤ SW1_IN ≤ -30dBm
Channel Isolation
ISOCH
47
60
dB
dB
RFISO2 = (푅푋2_푂푈푇
)
푅푋1_푂푈푇
푑퐵
with -60 ≤ SW2_IN ≤ -30dBm
Tx Mode
RF Switch Isolation
ISOSW
50
Measured at SW_IN to
RX_OUT of the same channel
[a] Items in Minimum/Maximum columns in bold italics are guaranteed by test. Items in Minimum/Maximum columns NOT in bold italics are
guaranteed by design characterization.
[b] In the OP1dB calculation formula, “G” denotes the gain of each part instance at the frequency of interest and appropriate High / Low gain state.
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Thermal Characteristics
Table 13. Thermal Characteristics
Parameter
Symbol
Value
Units
Junction-to-Ambient Thermal Resistance
θJA
43
°C/W
Junction-to-Case Thermal Resistance
(Case is defined as the exposed paddle)
θJC_BOT
11.7
°C/W
Moisture Sensitivity Rating (Per J-STD-020)
MSL3
Typical Operating Conditions
Unless otherwise noted:
.
.
.
.
.
.
VDD = +3.3V
TEPAD = 25°C
ZL = ZS = 50Ω single-ended with matching networks
STBY = Low or open
SW_CTRL = Low or open
Gain Setting = High Gain Mode
.
PIN ≤ -30dBm
.
.
All temperatures are referenced to the exposed paddle
Evaluation Kit traces and connector losses are de-embedded
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Typical Performance Characteristics: Part 1
Figure 3.
Rx Mode Gain (High Gain)
Figure 4.
Rx Mode Gain (Low Gain)
40
38
36
34
32
30
28
26
24
22
40
38
36
34
32
30
28
26
24
22
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
20
3
20
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
Frequency(GHz)
Frequency(GHz)
Figure 5.
Rx Mode Channel Isolation (High Gain)
Figure 6.
Rx Mode Channel Isolation (Low Gain)
70
65
60
55
50
45
40
35
70
65
60
55
50
45
40
35
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
30
3
30
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
Frequency(GHz)
Frequency(GHz)
Figure 7.
Rx Mode Input Return Loss (High Gain)
Figure 8.
Rx Mode Input Return Loss (Low Gain)
0
-5
0
-5
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-10
-15
-20
-25
-30
-35
-10
-15
-20
-25
-30
-35
-40
3
-40
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
Frequency(GHz)
Frequency(GHz)
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Typical Performance Characteristics: Part 2
Figure 9.
Rx Mode Output Return Loss
(High Gain)
Figure 10. Rx Mode Output Return Loss
(Low Gain)
0
-5
0
-5
-10
-15
-20
-25
-30
-10
-15
-20
-25
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-30
3
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
Frequency(GHz)
Frequency(GHz)
Figure 11. Rx Mode OP1dB vs. Frequency
Figure 12. Rx Mode OP1dB vs. Frequency
(High Gain)
(Low Gain)
20
20
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
19
18
17
16
15
14
13
12
11
10
19
18
17
16
15
14
13
12
11
10
3.3
3.4
3.5
3.6
3.7
3.8
3.3
3.4
3.5
3.6
3.7
3.8
Frequency(GHz)
Frequency(GHz)
Figure 13. Rx Mode OIP3 vs. Frequency
(High Gain)
Figure 14. Rx Mode OIP3 vs. Frequency
(Low Gain)
30
30
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
29
28
27
26
25
24
23
22
21
20
29
28
27
26
25
24
23
22
21
20
3.3
3.4
3.5
3.6
3.7
3.8
3.3
3.4
3.5
3.6
3.7
3.8
Frequency(GHz)
Frequency(GHz)
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Typical Performance Characteristics: Part 3
Figure 15. Tx Mode Isolation (SW_IN to
RX_OUT)
Figure 16. Tx Mode Channel Isolation
(Switch Inputs)
100
90
100
90
80
70
60
50
40
80
70
60
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
50
40
+25 C, +3.30 V
+105 C, +3.30 V
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
4
4
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
Frequency(GHz)
Frequency(GHz)
Figure 17. Tx Mode Input Return Loss
Figure 18. Stability Factor
1000
0
-5
100
10
-10
-15
-20
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
-40 C, +3.30 V
-40 C, +3.45 V
+105 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.30 V
+25 C, +3.30 V
-25
-30
1
0
1
2
3
4
5
6
7
8
9
Frequency(GHz)
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
Frequency(GHz)
Figure 19. Rx Mode Noise Figure (High Gain)
Figure 20. Rx Mode Noise Figure (Low Gain)
3
3
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
-40 C, +3.15 V
+25 C, +3.15 V
+105 C, +3.15 V
-40 C, +3.30 V
+25 C, +3.30 V
+105 C, +3.30 V
-40 C, +3.45 V
+25 C, +3.45 V
+105 C, +3.45 V
2.5
2
2.5
2
1.5
1
1.5
1
0.5
0
0.5
0
3
3.2
3.4
3.6
3.8
3
3.2
3.4
3.6
3.8
4
Frequency(GHz)
Frequency(GHz)
© 2019 Integrated Device Technology, Inc.
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F0453B Datasheet
Typical Performance Characteristics: Part 4
Figure 21. Switching Time from TX to RX Mode
Figure 23. Standby to RX Mode Transient Time
Figure 25. 6dB Gain Reduction Transient Time
Figure 22. Switching Time from RX to TX Mode
Figure 24. RX Mode to Standby Transient Time
Figure 26. 6dB Gain Increase Transient Time
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Programming
Table 14. Gain Step Truth Table
ATT1_CTRL, ATT2_CTRL
Attenuation Setting
Low or NC
High
0dB
6dB
Table 15. Standby and RF Switch Truth Table
In TX Mode, the amplifiers are OFF, but the bias will remain ON for fast turn-on recovery time.
STBY
Low or NC
Low or NC
High
SW_CTRL
Low or NC
MODE
RX
Amplifier State
ON
OFF
OFF
High
TX
High or Low or NC
STANDBY
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Evaluation Kit Picture
Figure 27. Evaluation Kit: Top View
Figure 28. Evaluation Kit: Bottom View
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Evaluation Kit / Applications Circuit
Figure 29. Electrical Schematic
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Table 16. Bill of Material (BOM)
Part Reference
QTY
Description
0Ω Jumper 1/10W
50Ω termination (0805)
Cap 8pF (0402)
Manufacturer Part #
ERJ2GE0R00X
Manufacturer
R3, R4, R5, R6
4
2
4
4
1
1
1
Panasonic
VISHAY
R2, R7
PCAN0805E49R9BST5
GRM1555C1H8R0DA01D
GRM155R61A105KE15D
67996_108HLF
C10, C11, C20, C21
Murata
C5, C6, C25, C26
Cap 1µF, 10V, X5R (0402)
2x4 Pin Header
Murata
J5
J1
J8
Digi-Key/Amphenol FCI
Digi-Key/Amphenol FCI
Digi-Key/Amphenol FCI
2x2 Pin Header
67996-104HLF
2x3 Pin Header
67996-106HLF
J2, J3, J4, J6, J7, J9,
J10, J11
8
SMA Edge Mount
Do not Install
142-0761-881
Cinch Connectivity
C12, C13, C14, C15,
C16, C17
Dual Path RF Switch with LNA
and DVGA 5X5 QFN
U1
1
1
F0453BZL LEG32K
IDT
SI 10522
Printed Circuit Board
F0453B EVKIT SI10522
© 2019 Integrated Device Technology, Inc.
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December 9, 2019
F0453B Datasheet
Evaluation Kit Operation
Power Supply Setup
Set up a power supply in the voltage range of 3.15V to 3.45V with the power supply output disabled. The voltage is applied by wiring to Pin 1
and 3 of header J1 for CH1_VDD, and wiring to Pin 1 and 3 of header J8 for CH2_VDD, as displayed in Figure 30.
Figure 30. Connections of Evaluation Board
CH1_att_ctr
CH1_out
CH1_VDD
GND
CH1_in
CH2_in
GND
CH2_VDD
CH2_att_ctr
CH2_out
Standby (STBY) Pin
The Evaluation Board can control the F0453B for standby operation. On header J5, the standby pins are pin 2 for CH1 and pin 8 for CH2 as
shown in Figure 30. Ground (logic LOW) pins are available to make a connection with a jumper. VDD (logic HIGH) could be wired either from
CH1_VDD of header J1 or CH2_VDD of header J8.
To place channel 1 in the normal operation mode (on), use one of these options:
.
.
Keep STBY1 open by making no connection on pin 2 of J5, or
Apply a logic LOW signal to STBY1 by making a connection between pin 1 and pin 2 of J5.
To place channel 1 in the standby mode (off), apply a logic HIGH signal to the STBY1 by making a connection between pin 2 of J5 and pin 1
(or pin 3) of J1.
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F0453B Datasheet
To place channel 2 in the normal operation mode (on), use one of these options:
.
.
Keep STBY2 open by making no connection on pin 8 of J5, or
Apply a logic LOW signal to STBY2 by making a connection between pin 7 and pin 8 of J5.
To place channel 2 in the standby mode (off), apply a logic HIGH signal to the STBY2 by making a connection between pin 8 of J5 and pin 1
(or pin 3) of J8.
Gain Step Control Setup
To get 6dB gain attenuation for channel 1, make a connection of SMA Connector J4, marked as “CH1_att_ctr” in Figure 30, to logic HIGH (see
also Error! Reference source not found.). In contrast, if J4 is open or logic LOW the minimum attenuation is obtained for channel 1.
To get 6dB gain attenuation for channel 2, make a connection of SMA Connector J6, marked as “CH2_att_ctr” in Figure 30, to logic HIGH.
In contrast, if J6 is open or logic LOW the minimum attenuation is obtained for channel 2.
Switch Control Pin
To switch channel 1 into TX throw, make a connection of pin 4 of J5, marked as “sw1_ctr” in Figure 30, to logic HIGH (see also Error! Reference
source not found.). In contrast, if pin 4 of J5 is open or logic LOW the result is to switch channel 1 into RX throw.
To switch channel 2 into TX throw, make a connection of pin 6 of J5, marked as “sw2_ctr” in Figure 30, to logic HIGH. In contrast, if pin 6 of J5
is open or logic LOW the result is to switch channel 2 into RX throw.
Mode Control Setup
There are three operation modes as displayed in Table 13. Based on each mode, set up the standby pin and switch control pin as described in
Standby (STBY) Pin and in Switch Control Pin. The standby and switch control logic are displayed in the following figure.
Figure 31. Standby and Switch Control Logics
Power-On Procedure
Set up the voltage supplies and Evaluation Board as described in Power Supply Setup with the Standby (STBY) Pin set for open or logic LOW,
then enable the power supply.
Power-Off Procedure
Disable the power supply.
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F0453B Datasheet
Application Information
Power Supplies
A common VDD power supply should be used for all pins requiring DC power. All supply pins should be bypassed with external capacitors to
minimize noise and fast transients. Supply noise can degrade the noise figure, and fast transients can trigger ESD clamps and cause them to
fail. Supply voltage change or transients should have a slew rate smaller than 1V / 20µs. In addition, all control pins should remain at
0V (±0.3V) while the supply voltage ramps up or while it returns to zero.
Control Pin Interface
If control signal integrity is a concern and clean signals cannot be guaranteed due to overshoot, undershoot, ringing, etc., the following circuit
at the input of each control pin is recommended. This applies to control pins 1, 2, 3, 6, 7, and 8 displayed in Figure 32.
Figure 32. Control Pin Interface Schematic
5 k
ATT1_CTRL
2 pF
5 k
STBY1
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
2 pF
5 k
SW1_CTRL
2 pF
5 k
SW2_CTRL
2 pF
5 k
STBY2
2 pF
5 k
ATT2_CTRL
2 pF
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F0453B Datasheet
Package Outline Drawings
The package outline drawings are appended at the end of this document and are accessible from the link below. The package information is
the most current data available.
www.idt.com/document/psc/leg32-package-outline-50-x-50-mm-body-08-mm-thick-05mm-pitch-lga
Ordering Information
Orderable Part Number
Package
MSL Rating
MSL3
Shipping Packaging
Temperature
-40° to +105°C
-40° to +105°C
F0453BLEGK
Tray
Reel
5.0 5.0 0.8 mm 32-LGA
5.0 5.0 0.8 mm 32-LGA
F0453BLEGK8
MSL3
F0453BEVBK
Evaluation Board
Marking Diagram
.
.
Lines 1 and 2 indicate the part number
Line 3 indicates the following:
“#” denotes stepping
IDTF04
53BLEGK
#YYWW$
“YY” is the last two digits of the year; “WW” is the work week number when the part
was assembled.
LOT
“$” denotes the mark code.
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F0453B Datasheet
Revision History
Revision Date
Description of Change
December 9, 2019
August 29, 2019
March 20, 2019
Updated to reflect 3.3GHz specifications.
.
.
Updated to reflect 4GHz specifications
Completed other minor improvements
Initial release.
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F0453B Datasheet
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without notice, at IDT's sole discretion. Performance specifications and operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same
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