83947AYILNT [IDT]
Low Skew, 1-to-9 LVCMOS Fanout Buffer;
| 型号： | 83947AYILNT |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | Low Skew, 1-to-9 LVCMOS Fanout Buffer 驱动 逻辑集成电路 |
| 文件： | 总10页 (文件大小：106K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Low Skew, 1-to-9
LVCMOS Fanout Buffer
83947
Data Sheet
GENERAL DESCRIPTION
FEATURES
The 83947I is a low skew, 1-to-9 LVCMOS Fanout Buffer. The low
impedance LVCMOS/LVTTL outputs are designed to drive 50Ω series
or parallel terminated transmission lines. The effective fanout can be
increased from 9 to 18 byutilizing the ability of the outputs to drive two
series terminated lines.
• 9 LVCMOS/LVTTL outputs
• Selectable CLK0 and CLK1 can accept the following
input levels: LVCMOS and LVTTL
• Maximum output frequency: 110MHz
• Output skew: 500ps (maximum)
• Part-to-part skew: 2ns (maximum)
• 3.3V operating supply
Guaranteed output and part-to-part skew characteristics make the
83947I ideal for high performance, single ended applications that also
require a limited output voltage.
• -40°C to 85°C ambient operating temperature
• Lead-Free package available
BLOCK DIAGRAM
PIN ASSIGNMENT
32 31 30 29 28 27 26 25
GND
Q3
1
2
3
4
5
6
7
24
23
22
21
20
19
18
17
GND
CLK_SEL
CLK0
VDDO
Q4
CLK1
ICS83947I
GND
Q5
CLK_EN
OE
VDDO
GND
VDD
GND
8
9
10 11 12 13 14 15 16
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
©2016 Integrated Device Technology, Inc
1
Revision B March 17, 2016
83947 Data Sheet
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Power
Input Pullup
Description
1, 8, 9, 12, 16, 17, 20,
24, 25, 29, 32
GND
Power supply ground.
Clock select input. When HIGH, selects CLK1. When LOW,
selects CLK0. LVCMOS / LVTTL interface levels.
2
CLK_SEL
3, 4
CLK0, CLK1
CLK_EN
OE
Input Pullup Reference clock inputs. LVCMOS / LVTTL interface levels.
Input Pullup Clock enable. LVCMOS / LVTTL interface levels.
Input Pullup Output enable. LVCMOS / LVTTL interface levels.
5
6
7
VDD
Power
Power
Coree supply pin.
Output supply pins.
10, 14, 18, 22, 27, 31
VDDO
11, 13, 15, 19, 21, 23, Q8, Q7, Q6, Q5, Q4,
Q0 thru Q8 clock outputs.
LVCMOS / LVTTL interface levels.
Output
26, 28, 30
Q3, Q2, Q1, Q0
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
Parameter
Test Conditions
Minimum Typical Maximum Units
CIN
Input Capacitance
4
pF
Power Dissipation Capacitance
(per output)
CPD
25
pF
RPULLUP
Input Pullup Resistor
51
51
7
KΩ
KΩ
Ω
RPULLDOWN Input Pulldown Resistor
ROUT Output Impedance
5
12
TABLE 3. OUTPUT ENABLE AND CLOCK ENABLE FUNCTION TABLE
Control Inputs
Output
Q0:Q8
OE
CLK_EN
0
1
1
X
0
1
Hi-Z
LOW
Follows CLK input
©2016 Integrated Device Technology, Inc
2
Revision B March 17, 2016
83947 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
4.6V
DD
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device.These ratings are stress specifications only.Functional
operation of product at these conditions or any conditions
beyond those listed in the DC Characteristics or AC Charac-
teristics is not implied.Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
Inputs, V
-0.5V to VDD + 0.5 V
-0.5V to VDDO + 0.5V
47.9°C/W (0 lfpm)
-65°C to 150°C
I
Outputs, VO
Package Thermal Impedance, θ
JA
Storage Temperature, T
STG
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = -40°C TO 85°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
VDD
VDDO
IDD
Coret Supply Voltage
3.0
3.0
3.3
3.3
33
3.6
3.6
50
V
V
Output Supply Voltage
Input Supply Current
mA
TABLE 4B. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = -40°C TO 85°C
Symbol Parameter
Test Conditions
Minimum
Typical Maximum Units
VIH
VIL
Input High Voltage
2
3.6
0.8
V
V
Input Low Voltage
CLK0, CLK1, CLK_SEL,
OE, CLK_EN
IIN
Input Current
-100
2.5
µA
VOH
VOL
Output High Voltage
Output Low Voltage
IOH = -20mA
IOL = 20mA
V
V
0.4
©2016 Integrated Device Technology, Inc
3
Revision B March 17, 2016
83947 Data Sheet
TABLE 5. AC CHARACTERISTICS, VDD = VDDO = 3.3V 0.3V, TA = -40°C TO 85°C
Symbol Parameter
fMAX Output Frequency
tPD
Test Conditions
Minimum
110
Typical
Maximum
Units
MHz
ns
Propagation Delay, NOTE 1
Output Skew; NOTE 2, 5
CLK to Q
1.8
4.5
Measured on
rising edge @VDDO/2
tsk(o)
500
ps
ns
Measured on
rising edge @VDDO/2
tsk(pp)
Part-to-Part Skew; NOTE 3, 5
2
tPW
tS
Output Pulse Width
tPeriod/2 - 800
tPeriod/2 + 800
ps
ns
ns
ns
ns
ns
ns
Clock Enable Setup Time; NOTE 6
Clock Enable Hold Time; NOTE 6
Output Enable Time; NOTE 4
Output Disable Time; NOTE 4
Output Rise Time
CLK_EN to CLK
CLK_EN to CLK
0
1
tH
tZL, tZH
tLZ, tHZ
tR
11
11
1
0.8V to 2.0V
0.8V to 2.0V
0.2
0.2
tF
Output Fall Time
1
All parameters measured at fMAX unless noted otherwise.
NOTE 1: Measured from VDD/2 of the input to VDDO/2 of the output.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at VDDO/2.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with
equal load conditions. Using the same type of inputs on each device, the outputs are measured at VDDO/2.
NOTE 4: These parameters are guaranteed by characterization. Not tested in production.
NOTE 5: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 6: Setup and Hold times are relative to the rising edge of the input clock.
©2016 Integrated Device Technology, Inc
4
Revision B March 17, 2016
83947 Data Sheet
PARAMETER MEASUREMENT INFORMATION
3.3V OUTPUT LOAD AC TEST CIRCUIT
OUTPUT SKEW
PROPAGATION DELAY
PART-TO-PART SKEW
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
OUTPUT RISE/FALL TIME
©2016 Integrated Device Technology, Inc
5
Revision B March 17, 2016
83947 Data Sheet
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE FOR 32 LEAD LQFP
θ
JA by Velocity (Linear Feet per Minute)
0
200
55.9°C/W
500
50.1°C/W
Single-Layer PCB, JEDEC Standard Test Boards
67.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards
47.9°C/W
42.1°C/W
39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for 83947I is: 1040
©2016 Integrated Device Technology, Inc
6
Revision B March 17, 2016
83947 Data Sheet
PACKAGE OUTLINE -Y SUFFIX FOR 32 LEAD LQFP
TABLE 7. PACKAGE DIMENSIONS
JEDEC VARIATION
ALL DIMENSIONS IN MILLIMETERS
BBA
SYMBOL
MINIMUM
NOMINAL
MAXIMUM
N
A
32
--
--
--
1.60
0.15
1.45
0.45
0.20
A1
A2
b
0.05
1.35
0.30
0.09
1.40
0.37
c
--
D
9.00 BASIC
7.00 BASIC
5.60 Ref.
9.00 BASIC
7.00 BASIC
5.60 Ref.
0.80 BASIC
0.60
D1
D2
E
E1
E2
e
L
0.45
0°
0.75
7°
θ
--
ccc
--
--
0.10
Reference Document: JEDEC Publication 95, MS-026
©2016 Integrated Device Technology, Inc
7
Revision B March 17, 2016
83947 Data Sheet
TABLE 8. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging
Temperature
32 Lead “Lead-Free/Annealed”
LQFP
83947AYILN
ICS3947AYIN
ICS3947AYIN
tray
-40°C to 85°C
-40°C to 85°C
32 Lead “Lead-Free/Annealed”
LQFP
83947AYILNT
Tape & Reel
©2016 Integrated Device Technology, Inc
8
Revision B March 17, 2016
83947 Data Sheet
REVISION HISTORY SHEET
Description of Change
Rev
Table
Page
Date
AC Characterisitics Table, tS and tH rows- revised Test Conditions to read
CLK_EN to CLK.
A
T5
4
6/21/02
1
2
Added Lead Free bullet in Features section.
T2
T8
Pin Characteristics Table - changed CIN from 4pF max. to 4pF min.
R
OUT added 5Ω min and 12Ω max.
B
B
10/11/04
8/9/10
8
Ordering Information Table - add Lead-Free part.
Updated format throughout data sheet.
Updated datasheet’s header/footer with IDT from ICS.
Removed ICS prefix from Part/Order Number column.
Added Contact Page.
T8
T8
8
10
Updated datasheet format
Ordering information - removed leaded part numbers - PDN CQ-13-02 expired
B
B
8
11/10/14
3/17/16
Removed ICS from part number where needed.
Updated header and footer.
©2016 Integrated Device Technology, Inc
9
Revision B March 17, 2016
83947 Data Sheet
Tech Support
www.idt.com/go/support
Corporate Headquarters
6024 Silver Creek Valley Road
San Jose, CA 95138 USA
www.IDT.com
Sales
1-800-345-7015 or 408-284-8200
Fax: 408-284-2775
www.IDT.com/go/sales
DISCLAIMER Integrated Device Technology, Inc. (IDT) reserves the right to modify the products and/or specifications described herein at any time, without notice, at IDT's sole discretion. Performance specifications and
operating parameters of the described products are determined in an independent state and are not guaranteed to perform the same way when installed in customer products. The information contained herein is provided
without representation or warranty of any kind, whether express or implied, including, but not limited to, the suitability of IDT's products for any particular purpose, an implied warranty of merchantability, or non-infringe-
ment of the intellectual property rights of others. This document is presented only as a guide and does not convey any license under intellectual property rights of IDT or any third parties.
IDT's products are not intended for use in applications involving extreme environmental conditions or in life support systems or similar devices where the failure or malfunction of an IDT product can be reasonably expect-
ed to significantly affect the health or safety of users. Anyone using an IDT product in such a manner does so at their own risk, absent an express, written agreement by IDT.
Integrated Device Technology, IDT and the IDT logo are trademarks or registered trademarks of IDT and its subsidiaries in the United States and other countries. Other trademarks used herein are the property of IDT or
their respective third party owners.
For datasheet type definitions and a glossary of common terms, visit www.idt.com/go/glossary.
Copyright ©2016 Integrated Device Technology, Inc. All rights reserved.
相关型号：
83947AYIT
Low Skew Clock Driver, 83947 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
IDT
83948AYI-01
Clock Driver, 83948 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
IDT
83948AYI-147
Low Skew Clock Driver, 83948 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026ABC-HD, LQFP-32
IDT
83948AYI-147T
Low Skew Clock Driver, 83948 Series, 12 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026ABC-HD, LQFP-32
IDT
©2020 ICPDF网 联系我们和版权申明