75N43102 [IDT]

NETWORK SEARCH ENGINE 32K x 72 Entries; 网络搜索引擎为32K x 72项


型号：	75N43102
厂家：	INTEGRATED DEVICE TECHNOLOGY
描述：	NETWORK SEARCH ENGINE 32K x 72 Entries 网络搜索引擎为32K x 72项
文件：	总4页 (文件大小：45K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Datasheet

Brief

75N43102

NETWORK SEARCH ENGINE

32K x 72 Entries

To request the full IDT75N43102 datasheet, please contact your local

IDT Sales Representative or call 1-831-754-4555

BlockDiagram

DeviceDescription

IDT provides proven, industry-leading network search engines

(NSEs) thatenableandacceleratetheintelligentprocessingofnetwork

services incommunications equipment. As a partofthe complete IDT

classificationsubsystemthatincludescontentinspectionengines,theIDT

family of NSEs delivers high-performance, feature-rich, easy-to-use,

integratedsearchaccelerators.

CONFIGIN

MATCHIN

CONFIGOUT

Configuration Registers

CLK2X

CCLK

PHASEN

RST

REQSTB

R/W

INSTR UC TION

Command Bus

TheIDT 75N43102 isideallysuitedforcost-sensitiveapplications

inthe enterprise andaccess markets. Itis a full-ternary32Kx72entry

devicewhereeachentrylocationintheNSEhasbothaDataentryand

anassociatedMaskentry. TheNSEdevicesintegratecontentaddres-

sable memory (CAM) technology with high-performance logic. The

devicecanperformLookupoperationsplusReadandWritemaintenance

operations.

Index

Bus

32K

X 72

Address

Request

Bus

REQDATA

The IDT 75N43102 NSE device has a bi-directional bus that is a

multiplexedaddressanddatabusthatcansupport62.5millionsustained

searchespersecond. Thisdevicecanbeconfiguredtoenablemultiple

widthlookups from72to288bits wide. The IDT75N43102requires a

1.5-volt VDD1 supply and a 2.5-volt VDD2 supply.

MATCHOUT

DATA

Global Mask Registers

64 3 5 d rw 0 1

TheIDT75N43102NSEutilizesthelatesthigh-performance1.5V

CMOSprocessingtechnologyandis packagedinaJEDECStandard,

256 pin low profile Ball Grid Array.

SystemConfigurations

Figure 1.0 ASIC / FPGA Compatible NSE

The IDT NSEs are designed to fulfill the needs of various types of

networking systems. In solutions requiring data searching such as

routers,asystemconfigurationasshowninFigure1.0mayberealized.

Inthis compatible configuration, the NSE interfaces directly toan

ASIC/FPGAforlookupsandroutesanIndexdirectlybacktotheASIC/

FPGA.Controloftheassociatedhandshakesignalsisprovidedbythe

NSEsforthisconfiguration.

IDT75N43102

Network

ASIC

FPGA

Engine

5346 drw02

APRIL 2004

DSC-6435/0B

Network Search Engine 32K x 72 Entries

Datasheet Brief 75N43102

Features

Bus Interface

■

Full Ternary 32K x 72 bit content addressable memory

TheNSEutilizesadualbusinterfaceconsistingoftheNSERequest

Bus and the NSE Response Bus.

■

GlobalMaskRegisters

■

72/144/288multiplewidthlookups

The NSERequestBus is comprisedofthe CommandBus andthe

RequestDataBus. TheCommandBushandlestheinstructiontotheNSE

whiletheRequestDataBus is themaindatapathtotheNSE.

The72bitbi-directionalRequestDataBusfunctionsasamultiplexed

address and data bus, which performs the writing and reading of NSE

entries,as wellas presentinglookupdatatothedevice.

■

62.5Msustainedlookups persecondat72and144widthlookups

■

Dualbusinterface

■

Cascadable to2devices withnoglue logicorlatencypenalty

■

BoundaryScanJTAGInterface(IEEE1149.1compliant)

■

1.5Vmatchpowersupply

TheNSEResponseBus is comprisedofanindependentunidirec-

tionalIndexBuswhichdrivestheresultofthelookup(orindex) to anASIC.

■

2.5V core and I/O power supply

Command Bus

TheCommandBusloadsthespecificinstructionsintotheNSE.These

include:

FunctionalHighlights

Data and Mask Array

TheNSEhasDatacellentriesandassoci-

atedMaskcellentriesasshowninFig.1.1. This

■Read or Write

ARead orWriteinstructionoperatesonaspecifieddataentry,mask

entry, or register.

Mask

Data

combinationofDataandMaskcellentriesen-

ablestheNSEtostore0,1orX,makingitafull

ternary Network Search Engine. During a

lookup operation, both arrays are used along

withaGlobalMaskRegistertofindamatchtoa

requesteddataword.

■Lookup

Alookupcanbe requestedin72-bit, 144-bit or 288-bit widths. A 36-

bitlookupcanbeaccomplishedbyusingtwoGlobalMaskRegisters.

Registers

There are three basictypes ofregisters supported:

■ConfigurationRegistersareusedatinitializationtodefinethe

segmentationoftheentries.

Figure 1.1

A6435 drw 03

■Global Mask Registers are provided to support Lookup

instructions bymaskingindividualbits duringa search.

■ReplyWidthRegisters areusedwithLookupoperations.

Network Search Engine 32K x 72 Entries

Datasheet Brief 75N43102

SignalDescriptions

Pin Function

I/O

Description

NSE Buses:

Request Strobe

Command Bus

Input

This input signifies a valid input request and signals the start of an NSE operation cycle.

This defines the instruction to be performed by the NSE and selects a global mask

Input/Output The Request Data Bus is a multiplexed address/data bus used to perform reads (and

Three State writes) from (to) the NSE, and to present search data for lookups.

Request Data Bus

Index Bus

Output

This bus is used to drive the Lookup result information directly to the NSE's ASIC/FPGA.

Three State The Index Bus contains the encoded location at which the compare was found.

Clock and Initialization:

Clock Input

Input

All inputs and outputs are referenced to the positive edge of this clock.

Clock Phase Enable

This signal is used to generate an internal clock at ½ the frequency of the input clock.

This pin will force all outputs to a high impedence condition, as well as clearing the NSE

enable bit.

Reset

Input

Depth Expansion:

Configuration

Input

Configures the Device ID at power up.

Configuration

Output

Match

Input

The Match Input signal is driven by the upstream Match Output signal. This indicates to the

down stream NSE that a hit in the higher priority NSE has occurred.

Input

Match

Output

The Match Output signal signifies that a match has occurred in the NSE. The signal is fed

into the Match Input line of the lower priority NSE.

Output

6435 tbl 01

6.42

Network Search Engine 32K x 72 Entries

Datasheet Brief 75N43102

Revision History

REV

DATE

PAGES

p.1-3

p.4

DESCRIPTION

Initialrelease

7/11/03

08/14/03

04/12/04

Updatedpinout.

All

Updated,removedpinout.

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