7429FCT520ATPB [IDT]
MULTILEVEL PIPELINE REGISTERS; 多级流水线寄存器
| 型号： | 7429FCT520ATPB |
| 厂家： | 
INTEGRATED DEVICE TECHNOLOGY |
| 描述： | MULTILEVEL PIPELINE REGISTERS |
| 文件： | 总7页 (文件大小：97K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IDT29FCT520AT/BT/CT/DT
IDT29FCT521AT/BT/CT/DT
MULTILEVEL
PIPELINE REGISTERS
Integrated Device Technology, Inc.
DESCRIPTION:
FEATURES:
The IDT29FCT520AT/BT/CT/DT and IDT29FCT521AT/
BT/CT/DT each contain four 8-bit positive edge-triggered
registers. These may be operated as a dual 2-level or as a
single 4-level pipeline. A single 8-bit input is provided and any
of the four registers is available at the 8-bit, 3-state output.
These devices differ only in the way data is loaded into and
between the registers in 2-level operation. The difference is
illustrated in Figure 1. In the IDT29FCT520AT/BT/CT/DT
when data is entered into the first level (I = 2 or I = 1), the
existing data in the first level is moved to the second level. In
the IDT29FCT521AT/BT/CT/DT, these instructions simply
cause the data in the first level to be overwritten. Transfer of
data to the second level is achieved using the 4-level shift
instruction (I = 0). This transfer also causes the first level to
change. In either part I=3 is for hold.
• A, B, C and D speed grades
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Product available in Radiation Tolerant and Radiation
Enhanced versions
• Military product compliant to MIL-STD-883, Class B
and DESC listed (dual marked)
• Available in DIP, SOIC, SSOP, QSOP, CERPACK and
LCC packages
FUNCTIONAL BLOCK DIAGRAM
D0 -D7
8
MUX
2
I0,I1
REGISTER
CONTROL
OCTAL REG. A1
OCTAL REG. B1
OCTAL REG. B2
1
CLK
OCTAL REG. A2
2
S0,S1
MUX
OE
8
2619 drw 01
Y0-Y7
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
APRIL 1994
1994 Integrated Device Technology, Inc.
DSC-4215/4
6.2
1
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
INDEX
I0
1
24
Vcc
S0
S1
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
OE
I1
D0
D1
D2
D3
D4
D5
D6
D7
23
22
2
4
3
2
28 27 26
3
5
25
24
23
22
21
20
19
Y
Y
Y
0
1
2
D
D
1
2
1
P24-1 21
4
6
D24-1
5
20
7
D
3
SO24-2
19
6
NC
NC
8
L28-1
SO24-7
7
18
9
SO24-8*
Y
Y
Y
3
4
5
D
D
D
4
5
6
&
17
16
15
14
13
8
10
11
E24-1
9
12 13 14 15 16 17 18
10
11
12
CLK
GND
2619 drw 03
2619 drw 02
DIP/SOIC/SSOP/QSOP/CERPACK
TOP VIEW
LCC
TOP VIEW
*FCT520 only
DEFINITION OF FUNCTIONAL TERMS
REGISTER SELECTION
Pin Names
Description
S1
S0
Register
Dn
Register input Port.
0
0
B2
B1
A2
A1
CLK
Clock input. Enter data into registers on LOW-
to-HIGH transitions.
0
1
1
0
I0, I1
Instruction inputs. See Figure 1 and
struction Control Tables.
in-
1
1
2619 tbl 02
S0, S1
Multiplexerselect. InputseitherregisterA1, A2,
B1 or B2 data to be available at the output port.
OE
Yn
Output enable for 3-state output port.
Register output port.
2619 tbl 01
DUAL 2-LEVEL
SINGLE 4-LEVEL
A1
A2
B1
A1
A2
B1
B2
A1
A2
B1
B2
IDT29FCT520T
B2
I = 2
I = 1
I = 0
A1
A2
B1
B2
A1
A2
B1
B2
A1
A2
B1
B2
IDT29FCT521T
I = 2
I = 1
I = 0
NOTE:
1. I = 3 for hold.
2619 drw 04
Figure 1. Data Loading in 2-Level Operation
6.2
2
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol
Rating
Commercial
Military
Unit
Symbol
Parameter(1)
Conditions Typ. Max. Unit
(2)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to +7.0 –0.5 to +7.0
V
CIN
Input
Capacitance
Output
VIN = 0V
6
8
10
pF
COUT
VOUT = 0V
12
pF
(3)
VTERM
Terminal Voltage
with Respect to
GND
–0.5 to
–0.5 to
V
Capacitance
VCC +0.5
VCC +0.5
2619 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
TA
Operating
0 to +70
–55 to +125 °C
Temperature
Temperature
Under Bias
Storage
TBIAS
TSTG
–55 to +125 –65 to +135 °C
–55 to +125 –65 to +150 °C
Temperature
Power Dissipation
PT
0.5
0.5
W
IOUT
DC Output
Current
–60 to +120 –60 to +120 mA
2619 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
onlyandfunctionaloperationofthedeviceattheseoranyotherconditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability. No terminal voltage may exceed
VCC by +0.5V unless otherwise noted.
2. Input and VCC terminals only.
3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol
VIH
VIL
Parameter
Input HIGH Level
Test Conditions(1)
Min.
2.0
—
Typ.(2)
Max.
—
Unit
V
Guaranteed Logic HIGH Level
—
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
0.8
±1
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
High Impedance(4)
Output Current
Input HIGH Current(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VI = 2.7V
VI = 0.5V
VO = 2.7V
VO = 0.5V
—
—
µA
µA
µA
IIL
VCC = Max.
—
—
±1
IOZH
IOZL
II
VCC = Max.
—
—
±1
—
—
±1
VCC = Max., VI = VCC (Max.)
VCC = Min., IN = –18mA
VCC = Max.(3), VO = GND
VCC = Min.
—
—
±1
µA
V
VIK
—
–0.7
–120
3.3
–1.2
–225
—
IOS
–60
2.4
mA
V
VOH
IOH = –6mA MIL.
VIN = VIH or VIL
IOH = –8mA COM’L.
IOH = –12mA MIL.
IOH = –15mA COM’L.
IOL = 32mA MIL.
2.0
—
3.0
0.3
—
VOL
Output LOW Voltage
Input Hysteresis
VCC = Min.
VIN = VIH or VIL
—
0.5
V
IOL = 48mA COM’L.
VH
—
—
200
—
1
mV
mA
ICC
Quiescent Power
Supply Current
VCC = Max.
VIN = GND or VCC
0.01
NOTES:
2619 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = -55°C.
6.2
3
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply
Current, TTL Inputs HIGH
VCC = Max.
—
0.5
2.0
mA
VIN = 3.4V(3)
ICCD
IC
Dynamic Power Supply Current(4)
Total Power Supply Current(6)
VCC = Max., Outputs Open
OE = GND
One Input Toggling
50% Duty Cycle
VIN = VCC
VIN = GND
—
—
0.15
1.5
0.25
3.5
mA/
MHz
VCC = Max., Outputs Open
fCP = 10MHz
VIN = VCC
VIN = GND
mA
50% Duty Cycle
OE = GND
One Bit Toggling
at fi = 5MHz
VIN = 3.4V
VIN = GND
—
—
2.0
3.8
5.5
50% Duty Cycle
VCC = Max., Outputs Open
fCP = 10MHz
VIN = VCC
VIN = GND
7.3(5)
50% Duty Cycle
OE = GND
Eight Bits Toggling
at fi = 2.5MHz
VIN = 3.4V
VIN = GND
—
6.0
16.3(5)
50% Duty Cycle
NOTES:
2619 tbl 06
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT +IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2 + fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL HIgh Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Input Frequency
Ni = Number of Inputs at fi
All currents are in milliamps and all frequencies are in megahertz.
6.2
4
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT520AT/521AT
FCT520BT/521BT
Com'l. Mil.
Com'l.
Mil.
(2)
(2)
(2)
(2)
Symbol
Parameter
Propagation Delay
CLK to Yn
Condition(1)
CL = 50pF
RL = 500Ω
Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
tPHL
tPLH
tPHL
tPLH
tSU
2.0
2.0
5.0
2.0
5.0
2.0
1.5
1.5
7.0
14.0
13.0
—
2.0
16.0
15.0
—
2.0
7.5
7.5
—
2.0
8.0
8.0
—
ns
ns
ns
ns
ns
ns
ns
ns
Propagation Delay
S0 or S1 to Yn
2.0
6.0
2.0
6.0
2.0
1.5
1.5
8.0
2.0
2.5
2.0
4.0
2.0
1.5
1.5
5.5
2.0
2.8
2.0
4.5
2.0
1.5
1.5
6.0
Set-up Time, HIGH or LOW
Dn to CLK
tH
Hold Time, HIGH or LOW
Dn to CLK
—
—
—
—
tSU
tH
Set-up Time, HIGH or LOW
I0 or I1 to CLK
—
—
—
—
Hold Time, HIGH or LOW
I0 or I1 to CLK
—
—
—
—
tPHZ
tPLZ
tPZH
tPZL
tW
Output Disable Time
12.0
15.0
—
13.0
16.0
—
7.0
7.5
—
7.5
8.0
—
Output Enable Time
Clock Pulse Width
HIGH or LOW
ns
2619 tbl 07
FCT520CT/521CT
Com'l. Mil.
FCT520DT/521DT
Com'l. Mil.
(2)
(2)
(2)
(2)
Symbol
Parameter
Propagation Delay
CLK to Yn
Condition(1)
CL = 50pF
RL = 500Ω
Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
tPHL
tPLH
tPHL
tPLH
tSU
2.0
6.0
6.0
—
2.0
7.0
7.0
—
2.0
5.2
4.8
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
Propagation Delay
S0 or S1 to Yn
2.0
2.5
2.0
4.0
2.0
1.5
1.5
5.5
2.0
2.8
2.0
4.5
2.0
1.5
1.5
6.0
2.0
1.5
1.0
2.0
1.0
1.5
1.5
3.0
Set-up Time, HIGH or LOW
Dn to CLK
tH
Hold Time, HIGH or LOW
Dn to CLK
—
—
—
tSU
tH
Set-up Time, HIGH or LOW
I0 or I1 to CLK
—
—
—
Hold Time, HIGH or LOW
I0 or I1 to CLK
—
—
—
tPHZ
tPLZ
tPZH
tPZL
tW
Output Disable Time
6.0
6.0
—
6.0
7.0
—
4.8
4.0
—
Output Enable Time
Clock Pulse Width
HIGH or LOW(3)
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum units are guaranteed but not tested on Propagation Delays.
2619 tbl 08
6.2
5
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
SWITCH POSITION
Test
Switch
VCC
7.0V
Open Drain
Disable Low
Closed
500
Ω
Ω
Enable Low
VOUT
VIN
Open
All Other Tests
DEFINITIONS:
CL= Load capacitance: includes jig and probe capacitance.
RT = Termination resistance: should be equal to ZOUT of the Pulse
Generator.
Pulse
Generator
D.U.T.
2619 lnk 09
50pF
500
T
R
C
L
2619 drw 05
SET-UP, HOLD AND RELEASE TIMES
PULSE WIDTH
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
PULSE
t
H
t
t
SU
1.5V
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
t
REM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
1.5V
0V
2619 drw 07
CLEAR
CLOCK ENABLE
ETC.
SU
t
H
2619 drw 06
PROPAGATION DELAY
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
t
PLH
t
t
PHL
PHL
t
PZL
tPLZ
V
OH
OUTPUT
3.5V
1.5V
3.5V
1.5V
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
V
OL
t
PLH
0.3V
0.3V
VOL
3V
1.5V
0V
t
PZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
VOH
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
2619 drw 08
0V
2619 drw 09
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
HIGH
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns
6.2
6
IDT29FCT520AT/BT/CT/DT, 521AT/BT/CT/DT
MULTILEVEL PIPELINE REGISTERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
29FCT
X
X
X
XX
XX
Temperature
Range
Family
Device Type Package
Process
Blank
B
Commercial
MIL-STD-883, Class B
Plastic DIP
P
CERDIP
D
Leadless Chip Carrier
Small Outline IC
L
SO
PY
E
Shrink Small Outline Package
CERPACK
Quarter-size Small Outline Package
Q
520AT Multilevel Pipeline Register
521AT Multilevel Pipeline Register
520BT
521BT
520CT
521CT
520DT
521DT
Blank
2
High Drive
Balanced Drive
54
74
-55
°C to +125°C
0
°
C to +70°C
2619 drw 10
6.2
7
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