722MLFT [IDT]
Clock Generator, 28MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8;型号: | 722MLFT |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | Clock Generator, 28MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, SOIC-8 时钟 光电二极管 外围集成电路 晶体 |
文件: | 总7页 (文件大小:172K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DATASHEET
LOW COST 27 MHZ 3.3 VOLT VCXO
ICS722
Description
Features
The ICS722 is a low cost, low-jitter, high-performance 3.3
volt VCXO designed to replace expensive discrete VCXOs
modules. The on-chip Voltage Controlled Crystal Oscillator
accepts a 0 to 3.3 V input voltage to cause the output
clocks to vary by over ±±00 ppm. Using IDT’s patented
VCXO techniques, the device uses an inexpensive external
pullable crystal in the range of ±6.2 to 28 MHz to produce a
VCXO output clock at that same frequency.
• Packaged in 8-pin SOIC (Pb free, RoHS compliant)
• Operational frequency range of ±6.2 MHz to 28 MHz
• Uses an inexpensive external crystal
• On-chip patented VCXO with pull range of 230 ppm
(minimum)
• VCXO tuning voltage of 0 to 3.3 V
• Operating voltage of 3.3 V
The frequency of the on-chip VCXO is adjusted by an
external control voltage input into pin VIN. Because VIN is a
high-impedance input, it can be driven directly from an
PWM RC integrator circuit. Frequency output increases
with VIN voltage input. The usable range of VIN is 0 to 3.3
V.
• ±2 mA output drive capability at TTL levels
• Advanced, low-power, sub-micron CMOS process
IDT manufactures the largest variety of Set-Top Box and
multimedia clock synthesizers for all applications. Consult
IDT to eliminate VCXOs, crystals, and oscillators from your
board.
Block Diagram
VDD
VIN
X1
Voltage
16.2-28MHz
Pullable
Controlled
Crystal
16.2-28MHz Clock
(REFOUT)
Crystal
Oscillator
X2
GND
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
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VCXO
Pin Assignment
X 1
V D D
V I N
8
7
6
5
1
2
3
4
X 2
D C
D C
G N D
R E F O U T
I C S 7 2 2
8 - P i n ( 1 5 0 m i l ) S O I C
Pin Descriptions
Pin
Number
Pin
Name
Pin
Type
Pin Description
±
2
3
XI
Input
Crystal connection. Connect to the external pullable crystal.
VDD
VIN
Power Connect to +3.3 V (0.0±µf decoupling capacitor recommended).
Input
Voltage input to VCXO. Zero to 3.3 V signal which controls the
VCXO frequency.
4
5
GND
Power Connect to ground.
REFOUT
Output VCXO CMOS level clock output matches the nominal frequency of
the crystal.
6
7
8
DC
DC
X2
—
—
Do not connect anything to this pin.
Do not connect anything to this pin.
Input
Crystal connection. Connect to a external pullable crystal.
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
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as possible and should be on the same side of the PCB as
the ICS722. There should be no via’s between the crystal
pins and the X± and X2 device pins. There should be no
signal traces underneath or close to the crystal. See
application note MAN05.
External Component Selection
The ICS722 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Crystal Tuning Load Capacitors
A decoupling capacitor of 0.0±µF should be connected
between VDD and GND on pins 2 and 4 as close to the
ICS722 as possible. For optimum device performance, the
decoupling capacitor should be mounted on the component
side of the PCB. Avoid the use of vias in the decoupling
circuit.
The crystal traces should include pads for small fixed
capacitors, one between X± and ground, and another
between X2 and ground. Stuffing of these capacitors on the
PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture and
frequency) and by PCB layout. The typical required
capacitor value is ± to 4 pF.
Series Termination Resistor
When the PCB trace between the clock output and the load
is over ± inch, series termination should be used. To series
terminate a 50Ωtrace (a commonly used trace impedance),
place a 33Ωresistor in series with the clock line, as close to
the clock output pin as possible. The nominal impedance of
the clock output is 20Ω.
The procedure for determining the value of these capacitors
can be found in application note MAN05.
Quartz Crystal
The ICS722 VCXO function consists of the external crystal
and the integrated VCXO oscillator circuit. To assure the
best system performance (frequency pull range) and
reliability, a crystal device with the recommended
parameters (shown below) must be used, and the layout
guidelines discussed in the following section shown must be
followed.
The oscillation frequency of a quartz crystal is determined
by its “cut” and by the load capacitors connected to it. The
ICS722 incorporates on-chip variable load capacitors that
“pull” (change) the frequency of the crystal. The crystal
specified for use with the ICS722 is designed to have zero
frequency error when the total of on-chip + stray
capacitance is
±4 pF.
Recommended Crystal Parameters:
Initial Accuracy at 25°C
Temperature Stability
Aging
Load Capacitance
Shunt Capacitance, C0
C0/C± Ratio
±20 ppm
±30 ppm
±20 ppm
±4 pf
7 pF Max
250 Max
35 Ω Max
Equivalent Series Resistance
The external crystal must be connected as close to the chip
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
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Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS722. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Rating
Supply Voltage, VDD
All Inputs and Outputs
7 V
-0.5 V to VDD+0.5 V
0 to +70° C
Ambient Operating Temperature
Storage Temperature
-65 to +±50° C
260°C
Soldering Temperature
Recommended Operation Conditions
Parameter
Min.
Typ.
Max.
+70
Units
° C
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Reference crystal parameters
0
–
+3.±5
+3.45
V
Refer to page 3
DC Electrical Characteristics
VDD=3.3 V ±±% , Ambient temperature 0 to +70°C, unless stated otherwise
Parameter
Symbol
Conditions
Min.
3.±45
2.4
Typ.
Max.
Units
Operating Voltage
VDD
3.465
V
V
V
V
Output High Voltage
Output Low Voltage
V
I
I
I
= -±2 mA
= ±2 mA
= -4 mA
OH
OH
OL
OH
V
0.4
OL
Output High Voltage (CMOS
Level)
V
VDD-0.4
OH
Operating Supply Current
Short Circuit Current
IDD
No load
6
mA
mA
V
I
±50
OS
VIN, VCXO Control Voltage
V
0
3.3
IA
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
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VCXO
AC Electrical Characteristics
VDD = 3.3 V ±±%, Ambient Temperature 0 to +70° C, unless stated otherwise
Parameter
Output Frequency
Crystal Pullability
VCXO Gain
Symbol
Conditions
Min. Typ. Max. Units
F
±6.2
28
MHz
ppm
ppm/V
ns
O
F
0V< VIN < 3.3 V, Note ±
+ ±±5
P
VIN = VDD/2 + ± V, Note ±
±20
Output Rise Time
Output Fall Time
t
0.8 to 2.0 V, C =±5 pF
±.5
±.5
60
OR
L
t
2.0 to 0.8 V, C =±5 pF
ns
OF
L
Output Clock Duty
Cycle
t
Measured at ±.4 V, C =±5 pF
40
50
%
D
L
Maximum Output
Jitter, short term
t
C =±5 pF
±±0
ps
J
L
Note ±: External crystal device must conform with Pullable Crystal Specifications listed on page 3.
Thermal Characteristics
Parameter
Symbol
Conditions
Min.
Typ. Max. Units
Thermal Resistance Junction to
Ambient
θ
Still air
±50
±40
±20
40
° C/W
° C/W
° C/W
° C/W
JA
θ
± m/s air flow
3 m/s air flow
JA
θ
JA
Thermal Resistance Junction to Case
θ
JC
Marking Diagram
8
5
722MLF
######
YYWW
1
4
Notes:
±. ###### is the lot number.
2. YYWW is the last two digits of the year and week that the part was assembled.
3. “LF” denotes Pb (lead) free package.
4. Bottom marking: (origin)
Origin = country of origin if not USA.
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
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Package Outline and Package Dimensions (8-pin SOIC)
Package dimensions are kept current with JEDEC Publication No. 95
8
Millimeters
Min Max
Inches
Min Max
Symbol
A
A±
B
C
D
E
e
±.35
±.±0
0.33
0.±9
4.80
3.80
±.75
0.25
0.5±
0.25
5.00
4.00
0.0532 0.0688
0.0040 0.0098
0.0±3
0.0075 0.0098
.±890 .±968
0.020
E
H
INDEX
AREA
0.±497 0.±574
0.050 Basic
±.27 Basic
H
h
L
5.80
0.25
0.40
0°
6.20
0.50
±.27
8°
0.2284 0.2440
±
2
0.0±0
0.0±6
0°
0.020
0.050
8°
D
a
A
h x 45
A±
C
- C -
e
SEATING
PLANE
B
L
.10 (.004)
C
Ordering Information
Part / Order Number
722MLF
Marking
see page 5
Shipping Packaging
Tubes
Package
8-pin SOIC
8-pin SOIC
Temperature
0 to +70° C
0 to +70° C
722MLFT
Tape and Reel
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT™ / ICS™ LOW COST 27 MHZ 3.3 VOLT VCXO
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VCXO
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408-284-8200
Fax: 408-284-2775
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Integrated Device Technology, Inc.
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© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated Device
Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks or registered
trademarks used to identify products or services of their respective owners.
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