54FCT299TLB [IDT]
LCC-20, Tube;型号: | 54FCT299TLB |
厂家: | INTEGRATED DEVICE TECHNOLOGY |
描述: | LCC-20, Tube |
文件: | 总7页 (文件大小:121K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
FAST CMOS
IDT54/74FCT299T/AT/CT
8-INPUT UNIVERSAL
SHIFT REGISTER
FEATURES:
DESCRIPTION:
• Std., A, and C grades
TheFCT299Tis builtusinganadvanceddualmetalCMOStechnology.
The FCT299T is an 8-input universal shift/storage register with 3-state
outputs. Four modes of operation are possible: hold (store), shift left, shift
right and load data. The parallel load inputs and flip-flop outputs are
multiplexedtoreducethetotalnumberofpackagepins. Additionaloutputs
are provided for flip-flops Q0 and Q7 to allow easy serial cascading. A
separate active low Master Reset is used to reset the register.
• Low input and output leakage ≤1µA (max.)
• CMOS power levels
• True TTL input and output compatibility:
– VOH = 3.3V (typ.)
– VOL = 0.3V (typ.)
• High Drive outputs (-15mA IOH, 48mA IOL)
• Meets or exceeds JEDEC standard 18 specifications
• Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
• Power off disable outputs permit "live insertion"
• Available in the following packages:
– Industrial: SOIC, QSOP
– Military: CERDIP, LCC
FUNCTIONALBLOCKDIAGRAM
1
0
S
S
7
DS
0
DS
CP
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
D
Q
P
P
P
P
P
P
P
P
C
C
C
C
C
C
C
C
D
D
D
D
D
D
D
D
C
C
C
C
C
C
C
C
0
Q
7
Q
MR
1
OE
OE
2
0
1
2
3
4
5
6
7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
JUNE 2002
1
© 2002 Integrated Device Technology, Inc.
DSC-2632/8
IDT54/74FCT299T/AT/CT
FASTCMOS8-INPUTUNIVERSALSHIFTREGISTER
MILITARYANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
20
19
18
17
16
15
14
13
12
11
1
2
S0
OE1
OE2
I/O6
I/O4
VCC
S1
INDEX
3
2
20 19
3
4
DS7
Q7
1
4
5
6
7
8
18
17
16
15
14
I/O6
DS7
Q7
I/O4
I/O7
I/O5
5
I/O2
I/O0
Q0
I/O7
I/O5
I/O3
I/O2
I/O0
Q0
6
I/O3
I/O1
CP
7
9
10 11 12 13
8
9
MR
DS0
GND
10
CERDIP/ SOIC/ QSOP
TOP VIEW
LCC
TOP VIEW
ABSOLUTEMAXIMUMRATINGS(1)
PINDESCRIPTION
Symbol
Description
Max
Unit
V
Pin Names
Description
(2)
VTERM
Terminal Voltage with Respect to GND
–0.5 to +7
CP
DS0
Clock Pulse Input (Active Edge Rising)
SerialDataInputforRightShift
(3)
VTERM
Terminal Voltage with Respect to GND –0.5 to VCC+0.5
V
TSTG
IOUT
Storage Temperature
DC Output Current
–65 to +150
–60 to +120
°C
mA
DS7
SerialDataInputforLeftShift
S0, S1
MR
ModeSelectInputs
NOTES:
Asynchronous Master Reset Input (Active LOW)
3-StateOutputEnableInputs(ActiveLOW)
ParallelDataInputsor3-StateParallelOutputs
SerialOutputs
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage may exceed
Vcc by +0.5V unless otherwise noted.
OE1, OE2
I/O0–I/O7
O0, O7
2. Inputs and Vcc terminals only.
3. Output and I/O terminals only.
FUNCTIONTABLE(1)
Inputs
CAPACITANCE (TA = +25°C, F = 1.0MHz)
MR
S1
X
H
L
S0
X
H
H
L
CP
X
Response
Symbol
Parameter(1)
Input Capacitance
Output Capacitance
Conditions
Typ.
Max. Unit
L
Asynchronous Reset Q0–Q7 = LOW
Parallel Load; I/Ox → Qx
Shift Right; DS0 → Q0, Q0 → Q1, etc.
Shift Left; DS7 → Q7, Q7→ Q6, etc.
Hold
H
H
↑
CIN
VIN = 0V
6
8
10
12
pF
pF
COUT
VOUT = 0V
↑
H
H
L
↑
NOTE:
1. This parameter is measured at characterization but not tested.
H
L
X
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑ = LOW-to-HIGH clock transition
2
IDT54/74FCT299T/AT/CT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOS8-INPUTUNIVERSALSHIFTREGISTER
DCELECTRICALCHARACTERISTICSOVEROPERATINGRANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±5%; Military: TA = –55°C to +125°C, VCC = 5.0V ±10%
Symbol
VIH
VIL
Parameter
Input HIGH Level
Test Conditions(1)
Guaranteed Logic HIGH Level
Min.
2
Typ.(2)
—
Max.
—
Unit
V
Input LOW Level
Guaranteed Logic LOW Level
VCC = Max.
—
—
0.8
±1
V
IIH
Input HIGH Current(4)
Input LOW Current(4)
Input HIGH Current(4)
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
VI = 2.7V
VI = 0.5V
—
—
µA
IIL
VCC = Max.
—
—
±1
II
VCC = Max., VI = VCC (Max.)
VCC = Min., IIN = –18mA
VCC = Max., VO = GND(3)
—
—
±1
µA
V
VIK
IOS
VOH
—
–0.7
–120
3.3
–1.2
–225
—
–60
2.4
mA
VCC = Min
VIN = VIH or VIL
IOH = –6mA MIL
IOH = –8mA IND
IOH = –12mA MIL
IOH = –15mA IND
IOL = 32mA MIL
IOL = 48mA IND
V
V
2
3
—
VOL
Output LOWVoltage
VCC = Min
VIN = VIH or VIL
—
0.3
0.5
IOFF
VH
Input/Output Power Off Leakage(5)
Input Hysteresis
VCC = 0V, VIN or VO ≤ 4.5V
—
—
—
—
±1
—
1
µA
mV
µA
—
200
0.01
ICC
Quiescent Power Supply Current
VCC = Max.
VIN = GND or VCC
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. The test limit for this parameter is ±5µA at TA = –55°C.
5. This parameter is guaranteed but not tested.
3
IDT54/74FCT299T/AT/CT
FASTCMOS8-INPUTUNIVERSALSHIFTREGISTER
MILITARYANDINDUSTRIALTEMPERATURERANGES
POWERSUPPLYCHARACTERISTICS
Symbol
Parameter
TestConditions(1)
Min.
Typ.(2)
Max.
Unit
∆ICC
Quiescent Power Supply
Current TTL Inputs HIGH
Vcc = Max.
VIN = 3.4V(3)
—
0.5
2
mA
ICCD
Dynamic Power Supply Current (4)
Vcc = Max.
VIN = VCC
—
0.15
0.25
mA/MHz
OutputsOpen
VIN = GND
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS1 = GND
OneInputToggling
50% Duty Cycle
IC
TotalPowerSupplyCurrent(6)
Vcc = Max.
VIN = VCC
—
1.5
3.5
mA
OutputsOpen
VIN = GND
fCP = 10MHz
50% Duty Cycle
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS7 = GND
OneBitToggling
at fi = 5MHz
VIN = 3.4V
VIN = GND
—
—
2
5.5
50% Duty Cycle
Vcc = Max.
VIN = VCC
3.8
7.3(5)
OutputsOpen
VIN = GND
fCP = 10MHz
50% Duty Cycle
OE1 = OE2 = GND
MR = VCC
S0 = S1 = VCC
DS0 = DS7 = GND
EightBitsToggling
at fi = 2.5MHz
50% Duty Cycle
VIN = 3.4V
VIN = GND
—
6
16.3(5)
NOTES:
1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input; (VIN = 3.4V). All other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of ∆ICC formula. These limits are guaranteed but not tested.
6. IC = IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ∆ICC DHNT + ICCD (fCP/2+ fiNi)
ICC = Quiescent Current
∆ICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fi = Output Frequency
Ni = Number of Outputs at fi
All currents are in milliamps and all frequencies are in megahertz.
4
IDT54/74FCT299T/AT/CT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOS8-INPUTUNIVERSALSHIFTREGISTER
SWITCHINGCHARACTERISTICSOVEROPERATINGRANGE
IDT54FCT299T
IDT54/74FCT299AT
IDT54/74FCT299CT
Ind. Mil.
Mil.
Ind. Mil.
(2)
(2)
(2)
(2)
(2)
Symbol Parameter
Condition(1)
CL = 50pF
RL = 500Ω
Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
tPLH
tPHL
tPLH
tPHL
tPHL
PropagationDelay
2
14
12
10.5
15
15
9
2
2
2
2
7.2
7.2
7.2
8.7
6.5
6
2
2
2
2
9.5
9.5
9.5
11.5
7.5
6.5
—
2
2
2
2
6.5
6.5
6.5
6.5
6.5
6
2
2
2
2
7.5
7.5
7.5
7.5
7.5
6.5
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CP to Q0 or Q7
PropagationDelay
CP to I/Ox
2
2
PropagationDelay
MR to Q0 or Q7
tPHL
PropagationDelay
MR to I/Ox
2
tPZH
tPZL
tPHZ
tPLZ
tSU
OutputEnableTime
OEx to I/Ox
1.5
1.5
7.5
5.5
1
1.5
1.5
3.5
4
1.5
1.5
4
1.5
1.5
3.5
4
1.5
1.5
4
OutputDisableTime
OEx to I/Ox
Set-up Time HIGH or LOW
S0 or S1 to CP
—
—
—
—
—
—
tSU
tH
Set-up Time HIGH or LOW
I/On, DS0 or DS7 to CP
Hold Time HIGH or LOW
S0 or S1 to CP
—
4.5
1
—
—
4.5
1
—
1
—
—
1
—
—
tH
Hold Time HIGH or LOW
I/Ox, DS0 or DS7 to CP
CP Pulse Width, HIGH or LOW
MR Pulse Width LOW
RecoveryTime
1.5
1.5
—
1.5
—
1.5
—
1.5
—
tW
tW
7
7
7
—
—
—
5
5
5
—
—
—
6
6
6
—
—
—
5
5
5
—
—
—
6
6
6
—
—
—
ns
ns
ns
tREM
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
5
IDT54/74FCT299T/AT/CT
FASTCMOS8-INPUTUNIVERSALSHIFTREGISTER
MILITARYANDINDUSTRIALTEMPERATURERANGES
TESTCIRCUITSANDWAVEFORMS
VCC
SWITCHPOSITION
7.0V
Test
Switch
Closed
Open
500Ω
Open Drain
Disable Low
Enable Low
VOUT
VIN
Pulse
Generator
D.U.T
.
All Other Tests
50pF
500Ω
T
R
DEFINITIONS:
CL = Load capacitance: includes jig and probe capacitance.
L
C
RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Octal link
Test Circuits for All Outputs
3V
DATA
1.5V
0V
INPUT
LOW-HIGH-LOW
tH
tSU
1.5V
PULSE
3V
1.5V
0V
TIMING
INPUT
ASYNCHRONOUS CONTROL
tW
tREM
PRESET
CLEAR
ETC.
3V
1.5V
0V
HIGH-LOW-HIGH
PULSE
1.5V
SYNCHRONOUS CONTROL
PRESET
3V
Octal link
1.5V
0V
CLEAR
tSU
tH
CLOCK ENABLE
ETC.
Pulse Width
Octal link
Set-Up, Hold, and Release Times
ENABLE
DISABLE
3V
1.5V
0V
3V
SAME PHASE
CONTROL
INPUT
1.5V
0V
INPUT TRANSITION
tPLH
tPLH
tPHL
tPHL
tPZL
tPLZ
VOH
1.5V
VOL
OUTPUT
3.5V
1.5V
3.5V
VOL
VOH
OUTPUT
NORMALLY
LOW
SWITCH
CLOSED
0.3V
0.3V
3V
1.5V
0V
tPZH
tPHZ
OPPOSITE PHASE
INPUT TRANSITION
OUTPUT
NORMALLY
HIGH
SWITCH
OPEN
1.5V
0V
Octal link
0V
Octal link
Propagation Delay
Enable and Disable Times
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.
2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.
6
IDT54/74FCT299T/AT/CT
MILITARYANDINDUSTRIALTEMPERATURERANGES
FASTCMOS8-INPUTUNIVERSALSHIFTREGISTER
ORDERINGINFORMATION
IDT
XX
FCT
XXXX
XX
X
Temp. Range
Package
Process
Device Type
Blank
Industrial
B
MIL-STD-883, Class B
Industrial Options
SO
Q
Small Outline IC
Quarter-size Small Outline Package
Military Options
CERDIP
Leadless Chip Carrier
D
L
8-Input Universal Shift Register
299T
299AT
299CT
54
74
– 55°C to +125°C
– 40°C to +85°C
DATASHEETDOCUMENTHISTORY
6/24/2002 Updated as per PDNs Logic-00-07 and Logic-01-04
CORPORATE HEADQUARTERS
2975StenderWay
Santa Clara, CA 95054
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
for Tech Support:
logichelp@idt.com
(408) 654-6459
www.idt.com
7
相关型号:
©2020 ICPDF网 联系我们和版权申明