23S05E-1HDC
更新时间：2024-09-18 18:09:35
品牌：IDT
描述：PLL Based Clock Driver, 23S Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8
概述
规格参数
数据手册23S05E-1HDC 概述
PLL Based Clock Driver, 23S Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8 时钟驱动器
23S05E-1HDC 规格参数
| 是否Rohs认证： | 不符合 | 生命周期： | Obsolete |
| 零件包装代码： | SOIC | 包装说明： | SOP, SOP8,.25 |
| 针数： | 8 | Reach Compliance Code： | not_compliant |
| HTS代码： | 8542.39.00.01 | 风险等级： | 5.53 |
| 系列： | 23S | 输入调节： | STANDARD |
| JESD-30 代码： | R-PDSO-G8 | JESD-609代码： | e0 |
| 逻辑集成电路类型： | PLL BASED CLOCK DRIVER | 最大I（ol）： | 0.012 A |
| 湿度敏感等级： | 1 | 功能数量： | 1 |
| 反相输出次数： | 端子数量： | 8 | |
| 实输出次数： | 4 | 最高工作温度： | 70 °C |
| 最低工作温度： | 输出特性： | 3-STATE | |
| 封装主体材料： | PLASTIC/EPOXY | 封装代码： | SOP |
| 封装等效代码： | SOP8,.25 | 封装形状： | RECTANGULAR |
| 封装形式： | SMALL OUTLINE | 电源： | 3.3 V |
| 传播延迟（tpd）： | 0.35 ns | 认证状态： | Not Qualified |
| Same Edge Skew-Max（tskwd）： | 0.25 ns | 子类别： | Clock Drivers |
| 最大供电电压 (Vsup)： | 3.6 V | 最小供电电压 (Vsup)： | 3 V |
| 标称供电电压 (Vsup)： | 3.3 V | 表面贴装： | YES |
| 温度等级： | COMMERCIAL | 端子面层： | Tin/Lead (Sn85Pb15) |
| 端子形式： | GULL WING | 端子节距： | 1.27 mm |
| 端子位置： | DUAL | 最小 fmax： | 200 MHz |
| Base Number Matches： | 1 |
23S05E-1HDC 数据手册
通过下载23S05E-1HDC数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载IDT23S05E
3.3V ZERO DELAY CLOCK
BUFFER, SPREAD SPECTRUM
COMPATIBLE
FEATURES:
DESCRIPTION:
• Phase-Lock Loop Clock Distribution
• 10MHz to 200MHz operating frequency
• Distributes one clock input to one bank of five outputs
• Zero Input-Output Delay
The IDT23S05E is a high-speed phase-lock loop (PLL) clock buffer,
designedtoaddress high-speedclockdistributionapplications.The zero
delayis achieved byaligningthe phase betweenthe incomingclockand
the outputclock, operable withinthe range of10to200MHz.
• Output Skew < 250ps
The IDT23S05E is an 8-pin version of the IDT23S09E. IDT23S05E
accepts one reference input,anddrives outfive lowskewclocks.The -1H
versionofthis device operates upto200MHzfrequencyandhas a higher
drivethanthe-1device.Allparts haveon-chipPLLs whichlocktoaninput
clockontheREFpin.ThePLLfeedbackison-chipandisobtainedfromthe
CLKOUT pad. In the absence of an input clock, the IDT23S05E enters
• Low jitter <200 ps cycle-to-cycle
• IDT23S05E-1 for Standard Drive
• IDT23S05E-1H for High Drive
• No external RC network required
• Operates at 3.3V VDD
• Power down mode
• Spread spectrum compatible
• Available in SOIC package
power down. In this mode, the device will draw less than 12µA for
CommercialTemperaturerangeandlessthan25µAforIndustrialtempera-
ture range, the outputs are tri-stated,andthe PLLis notrunning,resulting
ina significantreductionofpower.
The IDT23S05E is characterized for both Industrial and Commercial
operation.
FUNCTIONALBLOCKDIAGRAM
8
CLKOUT
3
CLK1
PLL
1
Control
Logic
REF
2
CLK2
CLK3
CLK4
5
7
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
MARCH 2006
1
c
2006 Integrated Device Technology, Inc.
DSC - 6398/7
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
PINCONFIGURATION
ABSOLUTEMAXIMUMRATINGS(1)
Symbol
Rating
Max.
–0.5to+4.6
–0.5to+5.5
–0.5to
VDD+0.5
–50
Unit
V
VDD
SupplyVoltageRange
InputVoltageRange(REF)
InputVoltageRange
(2)
VI
V
1
REF
8
7
6
5
CLKOUT
CLK4
VI
V
CLK2
2
(exceptREF)
IIK (VI < 0)
InputClampCurrent
ContinuousOutputCurrent
ContinuousCurrent
mA
mA
mA
W
VDD
3
4
CLK1
GND
IO (VO = 0 to VDD)
VDD or GND
TA = 55°C
±50
CLK3
±100
MaximumPowerDissipation
0.7
(3)
(instillair)
TSTG
StorageTemperatureRange
CommercialTemperature
Range
–65to+150
0 to +70
° C
° C
SOIC
TOP VIEW
Operating
Temperature
Operating
Temperature
NOTES:
IndustrialTemperature
Range
-40to+85
° C
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. The input and output negative-voltage ratings may be exceeded if the input and output
clamp-current ratings are observed.
3. The maximum package power dissipation is calculated using a junction temperature
of 150°C and a board trace length of 750 mils.
APPLICATIONS:
• SDRAM
• Telecom
• Datacom
• PC Motherboards/Workstations
• Critical Path Delay Designs
PINDESCRIPTION
Pin Name
Pin Number
Type
IN
FunctionalDescription
REF(1)
1
2
3
4
5
6
7
Inputreferenceclock,5Volttolerantinput
Output clock
CLK2(2)
CLK1(2)
GND
Out
Out
Output clock
Ground
Out
Ground
CLK3(2)
Output clock
VDD
CLK4(2)
PWR
Out
3.3V Supply
Output clock
(2)
CLKOUT
8
Out
Outputclock,internalfeedbackonthis pin
NOTES:
1. Weak pull down.
2. Weak pull down on all outputs.
2
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
OPERATINGCONDITIONS-COMMERCIAL
Symbol
VDD
TA
Parameter
Min.
3
Max.
3.6
70
Unit
V
SupplyVoltage
OperatingTemperature(AmbientTemperature)
LoadCapacitance <100MHz
0
°C
pF
CL
—
—
—
30
Load Capacitance 100MHz - 200MHz
InputCapacitance
10
CIN
7
pF
DCELECTRICALCHARACTERISTICS-COMMERCIAL
Symbol
VIL
Parameter
Conditions
Min.
—
2
Max.
0.8
—
Unit
V
InputLOWVoltageLevel
Input HIGH Voltage Level
InputLOWCurrent
Input HIGH Current
OutputLOWVoltage
VIH
V
IIL
VIN = 0V
—
—
—
50
µ A
µ A
V
IIH
VIN = VDD
100
0.4
VOL
StandardDrive
High Drive
IOL = 8mA
IOL = 12mA (-1H)
IOH = -8mA
VOH
OutputHIGHVoltage
StandardDrive
High Drive
2.4
—
V
IOH = -12mA (-1H)
IDD_PD
IDD
Power Down Current
SupplyCurrent
REF = 0MHz
—
—
12
32
µ A
mA
UnloadedOutputsat 66.66MHz
SWITCHINGCHARACTERISTICS(23S05E-1)-COMMERCIAL(1,2)
Symbol
Parameter
Conditions
Min.
Typ. Max.
Unit
t1
OutputFrequency
10pFLoad
30pFLoad
10
—
—
50
—
—
—
0
200
100
60
MHz
10
Duty Cycle = t2 ÷ t1
RiseTime
Measured at 1.4V, FOUT = 66.66MHz
Measured between 0.8V and 2V
Measured between 0.8V and 2V
Alloutputsequallyloaded
40
%
ns
ns
ps
ps
ps
ps
t3
t4
t5
t6
t7
tJ
—
—
—
—
—
—
2.5
2.5
250
350
700
200
FallTime
OutputtoOutputSkew
Delay, REF Rising Edge to CLKOUT Rising Edge MeasuredatVDD/2
Device-to-Device Skew
Measured at VDD/2 on the CLKOUT pins of devices
0
Cycle-to-Cycle Jitter, pk - pk
Measuredat66.66MHz,loadedoutputs
—
tLOCK
PLLLockTime
Stable power supply, valid clock presented on REF pin
—
—
1
ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
3
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
SWITCHINGCHARACTERISTICS(23S05E-1H)-COMMERCIAL(1,2)
Symbol
Parameter
Conditions
Min.
Typ. Max.
Unit
t1
OutputFrequency
10pFLoad
30pFLoad
10
—
—
200
100
MHz
10
Duty Cycle = t2 ÷ t1
Duty Cycle = t2 ÷ t1
RiseTime
Measured at 1.4V, FOUT = 66.66MHz
Measured at 1.4V, FOUT <50MHz
Measured between 0.8V and 2V
Measured between 0.8V and 2V
Alloutputsequallyloaded
40
45
—
—
—
—
—
1
50
50
—
—
—
0
60
55
%
%
t3
1.5
1.5
250
350
700
—
200
1
ns
t4
FallTime
ns
t5
OutputtoOutputSkew
ps
t6
Delay, REF Rising Edge to CLKOUT Rising Edge MeasuredatVDD/2
ps
t7
t8
Device-to-Device Skew
OutputSlewRate
Measured at VDD/2 on the CLKOUT pins of devices
0
ps
Measured between 0.8V and 2V using Test Circuit #2
Measuredat66.66MHz,loadedoutputs
—
—
—
V/ns
ps
tJ
Cycle-to-Cycle Jitter, pk - pk
PLLLockTime
—
—
tLOCK
Stable power supply, valid clock presented on REF pin
ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
OPERATINGCONDITIONS-INDUSTRIAL
Symbol
VDD
TA
Parameter
Min.
3
Max.
3.6
+85
30
Unit
SupplyVoltage
V
°C
pF
OperatingTemperature(AmbientTemperature)
LoadCapacitance <100MHz
-40
—
—
—
CL
Load Capacitance 100MHz - 200MHz
InputCapacitance
10
CIN
7
pF
DCELECTRICALCHARACTERISTICS-INDUSTRIAL
Symbol
VIL
Parameter
Conditions
Min.
—
2
Max.
Unit
V
InputLOWVoltageLevel
Input HIGH Voltage Level
InputLOWCurrent
Input HIGH Current
OutputLOWVoltage
0.8
—
VIH
V
IIL
VIN = 0V
—
—
—
50
µ A
µ A
V
IIH
VIN = VDD
100
0.4
VOL
StandardDrive
High Drive
IOL = 8mA
IOL = 12mA (-1H)
IOH = -8mA
VOH
OutputHIGHVoltage
StandardDrive
High Drive
2.4
—
V
IOH = -12mA (-1H)
IDD_PD
IDD
Power Down Current
SupplyCurrent
REF = 0MHz
—
—
25
35
µ A
mA
UnloadedOutputsat66.66MHz
4
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
SWITCHINGCHARACTERISTICS(23S05E-1)-INDUSTRIAL(1,2)
Symbol
Parameter
Conditions
Min.
Typ. Max.
Unit
t1
OutputFrequency
10pFLoad
30pFLoad
10
—
—
50
—
—
—
0
200
100
60
MHz
10
Duty Cycle = t2 ÷ t1
RiseTime
Measured at 1.4V, FOUT = 66.66MHz
Measured between 0.8V and 2V
Measured between 0.8V and 2V
Alloutputsequallyloaded
40
%
ns
ns
ps
ps
ps
ps
t3
t4
t5
t6
t7
tJ
—
—
—
—
—
—
2.5
2.5
250
350
700
200
FallTime
OutputtoOutputSkew
Delay, REF Rising Edge to CLKOUT Rising Edge MeasuredatVDD/2
Device-to-Device Skew
Measured at VDD/2 on the CLKOUT pins of devices
0
Cycle-to-Cycle Jitter, pk - pk
Measuredat66.66MHz,loadedoutputs
—
tLOCK
PLLLockTime
Stable power supply, valid clock presented on REF pin
—
—
1
ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
SWITCHINGCHARACTERISTICS(23S05E-1H)-INDUSTRIAL(1,2)
Symbol
Parameter
Conditions
Min.
Typ. Max.
Unit
t1
OutputFrequency
10pFLoad
30pFLoad
10
—
—
200
100
MHz
10
Duty Cycle = t2 ÷ t1
Duty Cycle = t2 ÷ t1
RiseTime
Measured at 1.4V, FOUT = 66.66MHz
Measured at 1.4V, FOUT <50MHz
Measured between 0.8V and 2V
Measured between 0.8V and 2V
Alloutputsequallyloaded
40
45
—
—
—
—
—
1
50
50
—
—
—
0
60
55
%
%
t3
1.5
1.5
250
350
700
—
200
1
ns
t4
FallTime
ns
t5
OutputtoOutputSkew
ps
t6
Delay, REF Rising Edge to CLKOUT Rising Edge MeasuredatVDD/2
ps
t7
t8
Device-to-Device Skew
OutputSlewRate
Measured at VDD/2 on the CLKOUT pins of devices
0
ps
Measured between 0.8V and 2V using Test Circuit #2
Measuredat66.66MHz,loadedoutputs
—
—
—
V/ns
ps
tJ
Cycle-to-Cycle Jitter, pk - pk
PLLLockTime
—
—
tLOCK
Stable power supply, valid clock presented on REF pin
ms
NOTES:
1. REF Input has a threshold voltage of VDD/2.
2. All parameters specified with loaded outputs.
5
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
ZERO DELAY AND SKEW CONTROL
All outputs should be uniformly loaded in order to achieve Zero I/O Delay. Since the CLKOUT pin is the internal feedback for the PLL, its relative
loadingcanaffectandadjustthe input/outputdelay.
Fordesigns utilizingzeroI/ODelay, alloutputs includingCLKOUTmustbe equallyloaded. Evenifthe outputis notused, itmusthave a capacitive
load equal to that on the other outputs in order to obtain true zero I/O Delay. For zero output-to-output skew, all outputs must be loaded equally.
SPREAD SPECTRUM COMPATIBLE
Manysystems beingdesignednowuse a technologycalledSpreadSpectrumFrequencyTimingGeneration. This productis designednottofilter
offtheSpreadSpectrumfeatureofthereferenceinput,assumingitexists. WhenazerodelaybufferisnotdesignedtopasstheSpreadSpectrumfeature
through,the resultis a significantamountoftrackingskew,whichmaycause problems insystems requiringsynchronization.
6
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
SWITCHINGWAVEFORMS
1.4V
t1
Output
t2
1.4V
1.4V
1.4V
1.4V
Output
t5
Output to Output Skew
Duty Cycle Timing
3.3V
0V
VDD/2
REF
2V
0.8V
t4
0.8V
t3
2V
Output
VDD/2
Output
t6
Input to Output Propagation Delay
All Outputs Rise/Fall Time
CLKOUT
Device 1
VDD/2
CLKOUT
Device 2
VDD/2
t7
Device to Device Skew
TESTCIRCUITS
VDD
VDD
1KΩ
1KΩ
CLKOUT
CLKOUT
10pF
0.1μF
0.1μF
OUTPUTS
OUTPUTS
CLOAD
VDD
GND
VDD
0.1μF
0.1μF
GND
GND
GND
Test Circuit 2 (t8, Output Slew Rate On -1H Devices)
Test Circuit 1 (all Parameters Except t8)
7
IDT23S05E
3.3VZERODELAYCLOCKBUFFER,SPREADSPECTRUM
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
ORDERINGINFORMATION
XXXXX
XX
X
Package Process
Device Type
o
o
Commercial (0 C to +70 C)
Blank
I
o
o
Industrial (-40 C to +85 C)
DC
DCG
Small Outline
SOIC - Green
Zero Delay Clock Buffer with High Drive Output,
Spread Spectrum Compatible
23S05E-1
23S05E-1H
CORPORATE HEADQUARTERS
for SALES:
for Tech Support:
6024 Silver Creek Valley Road
San Jose, CA 95138
800-345-7015 or 408-284-8200
fax: 408-284-2775
clockhelp@idt.com
www.idt.com
8
23S05E-1HDC 相关器件
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| 23S05E-1HDC8 | IDT | Clock Driver, PDSO8 | 获取价格 |
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| 23S05E-1HDCG | IDT | 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE | 获取价格 |
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| 23S05E-1HDCG8 | IDT | 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE | 获取价格 |
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| 23S05E-1HDCGI | IDT | 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE | 获取价格 |
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| 23S05E-1HDCGI8 | IDT | 3.3V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE | 获取价格 |
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| 23S05E-1HDCI | IDT | PLL Based Clock Driver, 23S Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8 | 获取价格 |
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| 23S05E-1HDCI8 | IDT | Clock Driver, PDSO8 | 获取价格 |
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| 23S05T-1DC | IDT | PLL Based Clock Driver, 23S Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8 | 获取价格 |
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| 23S05T-1DC8 | IDT | PLL Based Clock Driver, 23S Series, 4 True Output(s), 0 Inverted Output(s), PDSO8, SOIC-8 | 获取价格 |
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| 23S05T-1DCG | IDT | 2.5V ZERO DELAY CLOCK BUFFER, SPREAD SPECTRUM COMPATIBLE | 获取价格 |
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