MK1709AGTR [ICSI]

Low EMI Clock Generator; 低EMI时钟发生器
MK1709AGTR
型号: MK1709AGTR
厂家: INTEGRATED CIRCUIT SOLUTION INC    INTEGRATED CIRCUIT SOLUTION INC
描述:

Low EMI Clock Generator
低EMI时钟发生器

时钟发生器 逻辑集成电路 光电二极管 驱动
文件: 总9页 (文件大小:170K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MK1709  
Low EMI Clock Generator  
Description  
Features  
The MK1709 generates a low EMI output clock from a  
clock input. The part is designed to dither the LCD  
interface clock for flat panel graphics controllers. The  
device uses ICS’ proprietary mix of analog and digital  
Phase Locked Loop (PLL) technology to spread the  
frequency spectrum of the output, thereby reducing the  
frequency amplitude peaks by several dB.  
Packaged in 8-pin SOIC (MK1709S) and in 8-pin  
TSSOP (MK1709AG)  
8-pin TSSOP available in lead (Pb) free package  
Provides a spread spectrum output clock  
Supports flat panel controllers  
Guaranteed to +85°C operation  
Accepts a clock input, provides same frequency  
The MK1709 offers centered spread from a high speed  
clock input. Refer to the MK1714-01/02 for a crystal  
input and the widest selection of input frequencies and  
multipliers.  
dithered output  
Good for all VGA modes from 80 to 167 MHz  
Peak reduction by 7dB - 14dB typical on 3rd - 19th  
odd harmonics  
ICS offers many other clocks for computers and  
computer peripherals. Consult us when you need to  
remove crystals and oscillators from your board.  
Low EMI feature can be disabled  
Includes power-down  
Operating voltage of 3.3 V  
Advanced, low-power CMOS process  
Block Diagram  
VDD  
S0  
S1  
S2  
PLL Clock  
Synthesis  
Low EMI Enable  
and Spread  
Spectrum  
Circuitry  
Clock Out  
Input  
Buffer  
ICLK  
GND  
MDS 1709 D  
1
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
Pin Assignment  
Spread Percentage and Direction  
Select Table  
ICLK  
VDD  
GND  
CLK  
8
7
6
5
1
2
3
4
S2  
S2  
Pin 8  
(1709S) (1709S) (1709S)  
Pin 6 Pin 5 Pin 4  
(1709AG) (1709AG) (1709AG)  
S1  
Pin 7  
S0  
Pin 6  
Frequency  
Range  
Spread  
Percentage  
(%)  
S1  
S0  
LEE  
0
0
0
0
0
40-50  
40-50  
±0.9  
±0.7  
8-pin SOIC (MK1709S)  
M
0
0
1
40-50  
(MK1709S)  
25-50  
±0.8  
GND  
CLK  
LEE  
S0  
8
7
6
5
1
2
3
4
VDD  
ICLK  
(MK1709AG)  
0
M
0
40-50  
(MK1709S)  
25-50  
±0.6  
S2  
S1  
(MK1709AG)  
0
0
0
0
0
M
M
1
M
1
40-50  
50 -100  
±1.1  
±0.6  
±0.7  
±0.8  
8-pin TSSOP (MK1709AG)  
0
50 -100  
1
M
1
50 -100  
1
Power Down  
1
1
0
0
0
50 -100  
50 -100  
±0.9  
±1.1  
M
1
1
1
1
1
1
1
0
M
M
M
1
1
0
100-165  
100-165  
±0.7  
±0.6  
±1.1  
±1.35  
±0.8  
±0.9  
M
1
100-165  
100-165  
0
100-165  
1
M
1
100-165  
1
Power Down  
0 = connect to GND  
M = unconnected (floating) has internal Pull up resistor  
to VDD and is considered as a 1 state  
1 = connect directly to VDD  
MDS 1709 D  
2
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
Pin Descriptions (MK1709S)  
Pin  
Pin  
Pin Type  
Pin Description  
Number Name  
1
2
3
4
5
6
ICLK  
VDD  
GND  
CLK  
LEE  
S0  
Input  
Connect to graphics input clock.  
Power Connect to +3.3 V.  
Power Connect to ground.  
Output Spread spectrum clock output per table above.  
Input  
Input  
Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor.  
Function select 0 input. Selects spread amount and direction per table above.  
Internal mid-level.  
7
8
S1  
S2  
Input  
Input  
Function select 1 input. Selects spread amount and direction per table above.  
Internal mid-level.  
Function select 2 input. Selects spread amount and direction per table above.  
Pin Descriptions (MK1709AG)  
Pin  
Pin  
Pin Type  
Pin Description  
Number Name  
1
2
3
4
GND  
CLK  
LEE  
S0  
Power Connect to ground.  
Output Spread spectrum clock output per table above.  
Input  
Input  
Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor.  
Function select 0 input. Selects spread amount and direction per table above.  
Internal mid-level.  
5
S1  
Input  
Function select 1 input. Selects spread amount and direction per table above.  
Internal mid-level.  
6
7
8
S2  
Input  
Input  
Function select 2 input. Selects spread amount and direction per table above.  
Connect to graphics input clock.  
ICLK  
VDD  
Power Connect to +3.3 V.  
MDS 1709 D  
3
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
External Components  
The MK1709 requires a minimum number of external  
components for proper operation.  
PCB layout Recommendations  
For optimum device performance and lowest output  
phase noise, the following guidelines should be  
observed.  
Decoupling Capacitor  
A decoupling capacitor of 0.01µF must be connected  
between VDD and GND on pins 2 and 3 for the  
MK1709S, or pins 1 and 8 for the MK1709AG. Place  
the capacitor as close to these pins as possible. For  
optimum device performance, the decoupling capacitor  
should be mounted on the component side of the PCB.  
Avoid the use of vias in the decoupling circuit.  
1) The 0.01µF decoupling capacitor should be mounted  
on the component side of the board as close to the  
VDD pin as possible. No vias should be used between  
the decoupling capacitor and VDD pin. The PCB trace  
to VDD pin should be kept as short as possible, as  
should the PCB trace to the ground via.  
2) Place a 33series termination resistor (if needed)  
close to the clock output to minimize EMI.  
Series Termination Resistor  
When the PCB trace between the clock output and the  
load is over 1 inch, series termination should be used.  
To series terminate a 50trace (a commonly used  
trace impedance), place a 33resistor in series with  
the clock line, as close to the clock output pin as  
possible. The nominal impedance of the clock output is  
20.  
3) An optimum layout is one with all components on the  
same side of the board, minimizing vias through other  
signal layers. Other signal traces should be routed  
away from the MK1709. This includes signal traces just  
underneath the device, or on layers adjacent to the  
ground plane layer used by the device.  
Select Pin Operation  
The S1, S0 select pins are 2-level, meaning they have  
three separate states to make the selections shown in  
the table on page 2.  
MDS 1709 D  
4
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the MK1709. These ratings,  
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of  
the device at these or any other conditions above those indicated in the operational sections of the  
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can  
affect product reliability. Electrical parameters are guaranteed only over the recommended operating  
temperature range. Typical values are at 25°C.  
Item  
Rating  
Supply Voltage, VDD (referenced to GND)  
All Inputs and Outputs (referenced to GND)  
Ambient Operating Temperature  
5 V  
-0.5 V to VDD+0.5 V  
0 to +85°C  
Storage Temperature  
-65 to +150°C  
260°C  
Soldering Temperature (maximum of 10 seconds)  
Recommended Operation Conditions  
Parameter  
Min.  
Typ.  
Max.  
+85  
Units  
°C  
Ambient Operating Temperature  
Power Supply Voltage (measured in respect to GND)  
0
+3.135  
+3.6  
V
DC Electrical Characteristics  
Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85°C  
Parameter  
Symbol  
VDD  
IDD  
Conditions  
Min.  
Typ.  
Max.  
Units  
Operating Voltage  
3.135  
3.465  
V
Supply Current (MK1709S)  
Supply Current (MK1709AG)  
No load, at 3.3 V  
No load, 50M  
20  
13  
23  
mA  
µA  
IDD  
IDD  
No load, 150M  
Input High Voltage (ICLK)  
Input High Voltage (S1, S0)  
Input High Voltage (other inputs)  
Input Low Voltage (ICLK)  
Input Low Voltage  
V
V
V
(VDD/2)+1 VDD/2  
V
V
IH  
IH  
IH  
VDD-0.5  
2
V
V
V
VDD/2 (VDD/2)-1  
0.5  
V
IL  
IL  
V
Output High Voltage (CMOS)  
Output High Voltage  
V
V
I
I
I
= -4mA  
VDD-0.4  
2.4  
V
OH  
OH  
OH  
OH  
OL  
= -12 mA  
= 12 mA  
V
Output Low Voltage  
V
0.4  
V
OL  
Input Capacitance  
C
S0, S1, S2, LEE pins  
7
pF  
IN  
MDS 1709 D  
5
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
AC Electrical Characteristics (MK1709S)  
Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85° C  
Parameter  
Symbol  
Conditions  
Min.  
80  
Typ. Max. Units  
Input/Output Clock Frequency  
Input Clock Duty Cycle  
167  
80  
MHz  
%
Time above VDD/2  
Time above 1.5 V  
0.8 to 2.0V  
20  
Output Clock Duty Cycle  
Output Clock Rise Time  
Output Clock Fall Time  
40  
50  
1.5  
60  
%
t
ns  
OR  
t
2.0 to 0.8V  
1.5  
ns  
OF  
EMI Peak Frequency Reduction  
3rd - 19th odd  
harmonics  
7 to 14  
dB  
AC Electrical Characteristics (MK1709AG)  
Unless stated otherwise, VDD = 3.3 V, Ambient Temperature 0 to +85° C  
Parameter  
Symbol  
Conditions  
Min.  
25  
Typ. Max. Units  
Input/Output Clock Frequency  
Input Clock Duty Cycle  
Output Clock Duty Cycle  
165  
80  
MHz  
%
Time above VDD/2  
20  
Time above 1.5 V,  
40 MHz - 100 MHz  
40  
50  
45  
35  
55  
%
Time above 1.5 V,  
100 MHz - 150 MHz  
%
%
Time above 1.5 V,  
>150 MHz  
Output Clock Rise Time  
Output Clock Fall Time  
t
0.8 to 2.0V  
2.0 to 0.8V  
1.5  
1.5  
ns  
ns  
dB  
OR  
t
OF  
EMI Peak Frequency Reduction  
3rd - 19th odd  
harmonics  
7 to 14  
Marking Diagrams  
(Marking for lead (Pb) free device shown below)  
8
5
8
5
1
MK1709S  
YYWW  
######  
MK1709AG  
YYWWLF  
######  
4
1
4
MDS 1709 D  
6
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body)  
Package dimensions are kept current with JEDEC Publication No. 95  
8
Millimeters  
Inches  
Symbol  
A
Min  
Max  
1.75  
0.25  
0.51  
0.25  
5.00  
4.00  
Min  
Max  
1.35  
0.10  
0.33  
0.19  
4.80  
3.80  
.0532  
.0040  
.013  
.0075  
.1890  
.1497  
.0688  
.0098  
.020  
.0098  
.1968  
.1574  
A1  
E
H
INDEX  
AREA  
B
C
D
E
e
1
2
1.27 BASIC  
0.050 BASIC  
H
h
L
5.80  
0.25  
0.40  
0°  
6.20  
.2284  
.010  
.016  
0°  
.2440  
.020  
.050  
8°  
D
0.50  
1.27  
8°  
α
A
h x 45  
A1  
C
- C -  
e
SEATING  
PLANE  
B
L
.10 (.004)  
C
MDS 1709 D  
7
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
Package Outline and Package Dimensions (8-pin TSSOP, 173 Mil. Body)  
Package dimensions are kept current with JEDEC Publication No. 95  
Millimeters  
Min Max  
Inches  
Max  
8
Symbol  
A
Min  
--  
--  
1.20  
0.15  
1.05  
0.30  
0.20  
3.10  
0.047  
0.006  
0.041  
0.012  
A1  
A2  
b
0.05  
0.80  
0.19  
0.09  
3.90  
0.002  
0.032  
0.007  
E1  
E
INDEX  
AREA  
C
D
E
0.0035 0.008  
0.114 0.122  
0.252 BASIC  
0.169 0.177  
0.0256 Basic  
6.40 BASIC  
4.30 4.50  
0.65 Basic  
1
2
E1  
e
L
D
0.45  
0°  
0.75  
8°  
0.018  
0.030  
8°  
α
0°  
aaa  
-
0.10  
-
0.004  
A
2
A
A
1
c
- C -  
e
SEATING  
PLANE  
b
L
aaa  
C
MDS 1709 D  
8
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  
MK1709  
Low EMI Clock Generator  
Ordering Information  
Part / Order Number Marking  
Shipping  
packaging  
Tubes  
Tape and Reel  
Tubes  
Tape and Reel  
Tubes  
Tape and Reel  
Package  
Temperature  
MK1709S  
MK1709STR  
MK1709AG  
(see page 6)  
MK1709AGTR  
MK1709AGLF  
8-pin SOIC  
8-pin SOIC  
8-pin TSSOP  
8-pin TSSOP  
8-pin TSSOP  
8-pin TSSOP  
0 to +85° C  
0 to +85° C  
0 to +85° C  
0 to +85° C  
0 to +85° C  
0 to +85° C  
MK1709AGLFTR  
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)  
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would  
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial  
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary  
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any  
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or  
critical medical instruments.  
MDS 1709 D  
9
Revision 031204  
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com  

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