IS62LV2568LL-100TI [ICSI]
256K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM; 256K ×8低功耗和低Vcc的CMOS静态RAM
| 型号： | IS62LV2568LL-100TI |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 256K x 8 LOW POWER and LOW Vcc CMOS STATIC RAM |
| 文件： | 总10页 (文件大小：455K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IS62LV2568L
IS62LV2568LL
256K x 8 LOW POWER and LOW VCC
CMOS STATIC RAM
FEATURES
DESCRIPTION
The ICSI IS62LV2568L and IS62LV2568LL are low power
and low VCC, 262,144-bit words by 8 bits CMOS static RAMs.
They are fabricated using ICSI's high-performance CMOS
technology. This highly reliable process coupled with innova-
tive circuit design techniques, yields higher performance and
low power consumption devices.
Access times of 55, 70, 100 ns
Low active power: 126 mW (max, L, LL)
Low standby power: 36 µW (max, L) and 7.2
µW (max, LL) CMOS standby
Low data retention voltage: 1.5V (min.)
Available in Low Power (-L) and Ultra-Low
Power (-LL)
When CE1 is HIGH or CE2 is LOW (deselected), the device
assumes a standby mode at which the power dissipation can
be reduced by using CMOS input levels.
Output Enable (OE) and two Chip Enable
TTL compatible inputs and outputs
Single 2.7V-3.6V power supply
Easy memory expansion is provided by using two Chip Enable
inputs, CE1 and CE2. The active LOW Write Enable (WE)
controls both writing and reading of the memory.
Available in the 32-pin 8x20mm TSOP-1, 32-pin
8x13.4mm TSOP-1 and 48-pin 6*8mm TF-BGA
The IS62LV2568L and IS62LV2568LL are available in 32-pin
8*20mm TSOP-1, 8*13.4mm TSOP-1 and 48-pin 6*8mm TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
2048 x 128 x 8
MEMORY ARRAY
A0-A17
DECODER
VCC
GND
I/O
DATA
COLUMN I/O
I/O0-I/O7
CIRCUIT
CE1
CE2
OE
CONTROL
CIRCUIT
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
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IS62LV2568L
IS62LV2568LL
PIN CONFIGURATIONS
32-Pin 8*20mm TSOP-1, 8*13.4mm STSOP-1
48-Pin 6*8mm TF-BGA
A11
A9
A8
1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
2
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
1
2
3
4
5
6
3
A13
WE
CE2
A15
Vcc
A17
A16
A14
A12
A7
4
CE2
WE
NC
A3
A4
A5
A6
A7
5
A0
I/O
A1
A2
A8
I/O
A
B
C
D
E
F
6
7
4
0
8
I/O
I/O
1
9
5
10
11
12
13
14
15
16
GND
Vcc
Vcc
GND
A6
A5
A4
A1
A2
A3
I/O
6
NC
CE1
A11
A17
A16
A12
I/O
2
I/O
7
OE
A15
A13
I/O
3
G
H
A9
A10
A14
PIN DESCRIPTIONS
A0-A17
CE1
Address Inputs
Chip Enable 1 Input
Chip Enable 2 Input
Output Enable Input
Write Enable Input
Data Input/Output
No Connection
Power
CE2
OE
WE
I/O0-I/O7
NC
Vcc
GND
Ground
OPERATING RANGE
Range
Ambient Temperature
VCC
Commercial
0°C to +70°C
2.7V - 3.6V
2.7V - 3.6V
Industrial
40°C to +85°C
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Integrated Circuit Solution Inc.
SR025_0C
IS62LV2568L
IS62LV2568LL
TRUTH TABLE
Mode
WE
CE1
CE2
OE
I/O Operation
Vcc Current
Not Selected
(Power-down)
X
X
H
X
X
L
X
X
High-Z
High-Z
ISB1, ISB2
ISB1, ISB2
Output Disabled
Read
H
H
L
L
L
L
H
H
H
H
L
High-Z
DOUT
DIN
ICC
ICC
ICC
Write
X
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
0.5 to Vcc + 0.5
0.3 to +4.0
40 to +85
65 to +150
0.7
Unit
VTERM
VCC
Terminal Voltage with Respect to GND
Vcc related to GND
V
V
TBIAS
TSTG
PT
Temperature Under Bias
Storage Temperature
°C
°C
W
Power Dissipation
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions above
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE(1)
Symbol
CIN
Parameter
Conditions
VIN = 0V
Max.
Unit
pF
Input Capacitance
Output Capacitance
6
8
COUT
VOUT = 0V
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Min.
Max.
Unit
VOH
VOL
VIH
Output HIGH Voltage
VCC = Min., IOH = 1.0 mA
VCC = Min., IOL = 2.1 mA
2.2
V
V
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
0.4
2.2
VCC + 0.3
V
(1)
VIL
ILI
0.3
1
0.4
1
V
GND ≤ VIN ≤ VCC
GND ≤ VOUT ≤ VCC
µA
µA
ILO
Output Leakage
1
1
Notes:
1. VIL = 2.0V for pulse width less than 10 ns.
Integrated Circuit Solution Inc.
SR025_0C
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IS62LV2568L
IS62LV2568LL
IS62LV2568L POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
ICC
Vcc Dynamic Operating
VCC = Max.,
Com.
Ind.
40
45
30
35
20
25
mA
Supply Current
IOUT = 0 mA, f = fMAX
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
Com.
Ind.
0.4
1.0
0.4
1.0
0.4
1.0
mA
µA
VIN = VIH or VIL,
CE1
≥
VIH or CE2
≤
VIL, f = 0
ISB2
CMOS Standby
VCC = Max., f = 0
Com.
Ind.
35
50
35
50
35
50
Current (CMOS Inputs)
CE1
≥
≤
VCC 0.2V,
0.2V,
VCC 0.2V, VIN
CE2
or VIN
≥
≤
0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
IS62LV2568LL POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max.
Unit
ICC
Vcc Dynamic Operating
VCC = Max.,
Com.
Ind.
40
45
30
35
20
25
mA
Supply Current
IOUT = 0 mA, f = fMAX
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
Com.
Ind.
0.4
1.0
0.4
1.0
0.4
1.0
mA
µA
VIN = VIH or VIL,
CE1
VCC = Max., f = 0
CE VCC 0.2V,
0.2V,
VCC 0.2V, VIN
≥
VIH or CE2
≤
VIL, f = 0
ISB2
CMOS Standby
Com.
Ind.
10
15
10
15
10
15
Current (CMOS Inputs)
≥
CE2
≤
or VIN
≥
≤
0.2V
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
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Integrated Circuit Solution Inc.
SR025_0C
IS62LV2568L
IS62LV2568LL
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-55
-70
-100
Symbol Parameter
Min.
55
10
5
Max.
Min.
70
10
5
Max.
Min.
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tRC
Read Cycle Time
100
15
5
tAA
Address Access Time
Output Hold Time
CE1 Access Time
CE2 Access Time
OE Access Time
55
70
100
tOHA
tACE1
tACE2
tDOE
55
55
30
70
70
35
100
100
50
(2)
tLZOE
OE to Low-Z Output
OE to High-Z Output
(2)
tHZOE
10
10
0
20
0
25
0
30
tLZCE1(2) CE1 to Low-Z Output
10
10
0
10
10
0
tLZCE2(2) CE2 to Low-Z Output
(2)
tHZCE
CE1 or CE2 to Low-Z Output
20
25
30
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels
of 0.4V to 2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
0.4V to 2.2V
5 ns
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
1.5V
Output Load
See Figures 1 and 2
AC TEST LOADS
1 TTL
1 TTL
OUTPUT
OUTPUT
100 pF
5 pF
Including
jig and
Including
jig and
scope
scope
Figure 1
Figure 2
Integrated Circuit Solution Inc.
SR025_0C
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IS62LV2568L
IS62LV2568LL
AC TEST LOADS
READ CYCLE NO.1(1,2)
t
RC
ADDRESS
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
AC WAVEFORMS
READ CYCLE NO. 2(1,3)
t
RC
ADDRESS
OE
t
AA
t
OHA
t
HZOE
t
DOE
t
LZOE
CE1
t
ACE1/tACE2
CE2
tLZCE1/
tLZCE2
t
HZCE
HIGH-Z
DOUT
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE1 = VIL, CE2 = VIL.
3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions.
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Integrated Circuit Solution Inc.
SR025_0C
IS62LV2568L
IS62LV2568LL
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range, Standard and Low Power)
-55
-70
-100
Min.
Symbol Parameter
Min.
55
45
45
45
0
Max.
Min.
70
65
65
65
0
Max.
Max
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tWC
Write Cycle Time
100
80
80
80
0
tSCE1
tSCE2
tAW
CE1 to Write End
CE2 to Write End
Address Setup Time to Write End
Address Hold from Write End
Address Setup Time
tHA
tSA
0
0
0
(4)
tPWE
tSD
WE Pulse Width
50
25
0
55
30
0
70
40
0
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
tHD
(3)
tHZWE
5
25
5
25
5
(3)
tLZWE
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0.4V to
2.2V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states
to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced
to the rising or falling edge of the signal that terminates the Write.
4. Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)(1,2)
t
WC
ADDRESS
CE1
t
HA
t
SCE1
t
SCE2
CE2
t
AW
(4)
t
PWE
WE
DOUT
DIN
t
SA
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
t
SD
t
HD
DATA-IN VALID
Integrated Circuit Solution Inc.
SR025_0C
7
IS62LV2568L
IS62LV2568LL
WRITE CYCLE NO. 2 (CE1, CE2 Controlled)(1,2)
t
WC
ADDRESS
t
SA
tHA
t
SCE1
CE1
CE2
t
SCE2
t
AW
(4)
t
PWE
WE
DOUT
DIN
t
HZWE
tLZWE
HIGH-Z
DATA UNDEFINED
t
HD
t
SD
DATA-IN VALID
Notes:
1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states
to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced
to the rising or falling edge of the signal that terminates the Write.
2. I/O will assume the HIGH-z state if OE =VIH.
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Integrated Circuit Solution Inc.
SR025_0C
IS62LV2568L
IS62LV2568LL
DATA RETENTION SWITCHING CHARACTERISTICS
Symbol
VDR
Parameter
Test Condition
Min.
Max.
Unit
Vcc for Data Retention
Data Retention Current
See Data Retention Waveform
1.5
3.6
V
IDR
Vcc = 2.0V, CE1
≥
Vcc 0.2V
Com. (-L)
Com. (-LL)
Ind. (-L)
20
5
µA
µA
µA
µA
25
7
Ind. (-LL)
tSDR
tRDR
Data Retention Setup Time
Recovery Time
See Data Retention Waveform
See Data Retention Waveform
0
ns
ns
tRC
DATA RETENTION WAVEFORM (CE1 Controlled)
t
SDR
Data Retention Mode
tRDR
V
V
CC
DR
2.7V
2.2V
CE1 ≥ VCC - 0.2V
CE
GND
DATA RETENTION WAVEFORM (CE2 Controlled)
Data Retention Mode
V
CC
2.7V
t
SDR
t
RDR
CE2
2.2V
V
DR
CE2 ≤ 0.2V
0.4V
GND
Integrated Circuit Solution Inc.
SR025_0C
9
IS62LV2568L
IS62LV2568LL
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Industrial Range: -40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
55
70
IS62LV2568L-55TI
IS62LV2568L-55HI
IS62LV2568L-55BI
8*20mm TSOP-1
8*13.4mm TSOP-1
6*8mm TF-BGA
55
70
IS62LV2568L-55T
IS62LV2568L-55H
IS62LV2568L-55B
8*20mm TSOP-1
8*13.4mm TSOP-1
6*8mm TF-BGA
IS62LV2568L-70TI
IS62LV2568L-70HI
IS62LV2568L-70BI
8*20mm TSOP-1
8*13.4mm TSOP-1
6*8mm TF-BGA
IS62LV2568L-70T
IS62LV2568L-70H
IS62LV2568L-70B
8*20mm TSOP-1
8*13.4mm TSOP-1
6*8mm TF-BGA
100
IS62LV2568L-100TI
8*20mm TSOP-1
100
IS62LV2568L-100T
IS62LV2568L-100H
IS62LV2568L-100B
8*20mm TSOP-1
8*13.4mm TSOP-1
6*8mm TF-BGA
IS62LV2568L-100HI 8*13.4mm TSOP-1
IS62LV2568L-100BI 6*8mm TF-BGA
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
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Integrated Circuit Solution Inc.
SR025_0C
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