IS61LV6416-15KI
更新时间:2024-09-18 02:11:02
品牌:ICSI
描述:64K X 16 HIGH SPEED CMOS STATIC RAM WITH 3.3 V SUPPLY
IS61LV6416-15KI 概述
64K X 16 HIGH SPEED CMOS STATIC RAM WITH 3.3 V SUPPLY 64K ×16高速CMOS静态与3.3 V电源RAM SRAM
IS61LV6416-15KI 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Transferred |
包装说明: | SOJ, SOJ44,.44 | Reach Compliance Code: | unknown |
风险等级: | 5.86 | Is Samacsys: | N |
最长访问时间: | 15 ns | I/O 类型: | COMMON |
JESD-30 代码: | R-PDSO-J44 | JESD-609代码: | e0 |
内存密度: | 1048576 bit | 内存集成电路类型: | STANDARD SRAM |
内存宽度: | 16 | 端子数量: | 44 |
字数: | 65536 words | 字数代码: | 64000 |
工作模式: | ASYNCHRONOUS | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 组织: | 64KX16 |
输出特性: | 3-STATE | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOJ | 封装等效代码: | SOJ44,.44 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
并行/串行: | PARALLEL | 电源: | 3.3 V |
认证状态: | Not Qualified | 最大待机电流: | 0.015 A |
最小待机电流: | 3 V | 子类别: | SRAMs |
最大压摆率: | 0.19 mA | 标称供电电压 (Vsup): | 3.3 V |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | J BEND | 端子节距: | 1.27 mm |
端子位置: | DUAL | Base Number Matches: | 1 |
IS61LV6416-15KI 数据手册
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PDF下载IS61LV6416
64K x 16 HIGH-SPEED CMOS STATIC RAM
WITH 3.3V SUPPLY
FEATURES
DESCRIPTION
The ICSI IS61LV6416 is a high-speed, 1,048,576-bit static
RAM organized as 65,536 words by 16 bits. It is fabricated
using ICSI's high-performance CMOS technology. This highly
reliable process coupled with innovative circuit design
techniques, yields access times as fast as 8 ns with low power
consumption.
High-speed access time: 8, 10, 12, and 15 ns
CMOS low power operation
250 mW (typical) operating
250 µW (typical) standby
TTL compatible interface levels
Single 3.3V power supply
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation can be reduced down with
CMOS input levels.
Fully static operation: no clock or refresh
required
Three state outputs
Easy memory expansion is provided by using Chip Enable and
Output Enable inputs, CE and OE. The active LOW Write
Enable (WE) controls both writing and reading of the memory.
A data byte allows Upper Byte (UB) and Lower Byte (LB)
access.
Data control for upper and lower bytes
Industrial temperature available
The IS61LV6416 is packaged in the JEDEC standard 44-pin
400mil SOJ, 44-pin 400mil TSOP-2, and 48-pin 6*8mm TF-
BGA.
FUNCTIONAL BLOCK DIAGRAM
64K x 16
MEMORY ARRAY
A0-A15
DECODER
VCC
GND
I/O0-I/O7
Lower Byte
I/O
DATA
COLUMN I/O
CIRCUIT
I/O8-I/O15
Upper Byte
CE
OE
WE
CONTROL
CIRCUIT
UB
LB
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
Integrated Circuit Solution Inc.
SR013-0C
1
IS61LV6416
PIN CONFIGURATIONS
44-Pin SOJ
44-Pin TSOP-2
A15
A14
A13
A12
A11
CE
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A15
A14
A13
A12
A11
CE
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A1
A2
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
2
A1
2
3
A2
3
4
OE
4
5
UB
5
6
LB
6
I/O0
I/O1
I/O2
I/O3
Vcc
GND
I/O4
I/O5
I/O6
I/O7
WE
A10
A9
7
I/O15
I/O14
I/O13
I/O12
GND
Vcc
I/O11
I/O10
I/O9
I/O8
NC
7
8
8
9
9
10
11
12
13
14
15
16
17
18
19
20
21
22
10
11
12
13
14
15
16
17
18
19
20
21
22
A3
A3
A4
A5
A6
A4
A8
A5
A8
A7
NC
A7
A6
NC
NC
NC
48-Pin 6x8mm TF-BGA
PIN DESCRIPTIONS
1
2
3
4
5
6
A0-A15
I/O0-I/O15
CE
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
A3
A2
A7
A1
A6
LB
I/O
OE
UB
N/C
I/O
A
B
C
D
E
F
CE
0
15
OE
I/O
I/O
A0
A4
I/O
I/O
14
1
2
13
WE
GND
Vcc
NC
NC
A9
A5
I/O
I/O
I/O
12
I/O
11
I/O
10
Vcc
3
GND
LB
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
NC
A8
4
I/O
5
I/O
I/O
9
UB
6
A11
I/O
7
NC
A12
WE
A15
A10
A14
I/O
8
NC
G
H
NC
A13
NC
Vcc
Power
GND
Ground
TRUTH TABLE
I/O PIN
Mode
WE
CE
OE
LB
UB
I/O0-I/O7 I/O8-I/O15 Vcc Current
Not Selected
X
H
X
X
X
High-Z
High-Z
ISB1, ISB2
ICC
Output Disabled
H
X
L
L
H
X
X
H
X
H
High-Z
High-Z
High-Z
High-Z
Read
Write
H
H
H
L
L
L
L
L
L
L
H
L
H
L
L
DOUT
High-Z
DOUT
High-Z
DOUT
ICC
ICC
DOUT
L
L
L
L
L
L
X
X
X
L
H
L
H
L
L
DIN
High-Z
DIN
High-Z
DIN
DIN
2
Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
ABSOLUTE MAXIMUM RATINGS(1)
Note:
1. Stress greater than those listed under
ABSOLUTEMAXIMUMRATINGSmay
cause permanent damage to the
device. This is a stress rating only and
functional operation of the device at
these or any other conditions above
those indicated in the operational sec-
tions of this specification is not implied.
Exposure to absolute maximum rating
conditions for extended periods may
affect reliability.
Symbol Parameter
Value
Unit
V
VTERM
TSTG
PT
Terminal Voltage with Respect to GND 0.5 to Vcc+0.5
1
Storage Temperature
Power
65 to +150
Dissipation1.5
20
°C
W
IOUT
DC Output Current (LOW)
mA
2
OPERATING RANGE
3
Range
Ambient Temperature
Vcc
Commercial
Industrial
0°C to +70°C
3.3V ± 10%
3.3V ± 10%
40°C to +85°C
4
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
Min.
2.4
Max.
Unit
V
5
VOH
VOL
VIH
VIL
ILI
Output HIGH Voltage
VCC = Min., IOH = 4.0 mA
VCC = Min., IOL = 8.0 mA
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage(1)
Input Leakage
0.4
V
2
VCC + 0.3
0.8
V
6
0.3
V
GND ≤ VIN ≤ VCC
Com.
Ind.
2
-5
2
5
µA
7
ILO
Output Leakage
GND ≤ VOUT ≤ VCC, Outputs Disabled
Com.
Ind.
2
-5
2
5
µA
Notes:
8
1. VIL (min.) = 2.0V for pulse width less than 10 ns.
2. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
9
-8 ns
-10 ns
Min. Max.
-12 ns
-15 ns
Symbol Parameter
Test Conditions
Min. Max.
Min. Max.
Min. Max. Unit
10
11
12
ICC
Vcc Dynamic Operating
VCC = Max.,
Com.
Ind.
220
230
200
180
190
180
190
mA
Supply Current
IOUT = 0 mA, f = fMAX
210
ISB1
TTL Standby Current
(TTL Inputs)
VCC = Max.,
Com.
Ind.
30
40
30
40
30
40
30
40
mA
VIN = VIH or VIL
CE
≥
VIH , f = 0
ISB2
CMOS Standby
VCC = Max.,
Com.
Ind.
10
15
10
15
10
15
10
15
mA
Current (CMOS Inputs)
CE
VIN
VIN
≥
≥
≤
VCC 0.2V,
VCC 0.2V, or
0.2V, f = 0
Note:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Circuit Solution Inc.
SR013-0C
3
IS61LV6416
CAPACITANCE(1)
Symbol
CIN
Parameter
Conditions
VIN = 0V
Max.
Unit
pF
Input Capacitance
6
8
COUT
Input/Output Capacitance
VOUT = 0V
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-8
-10
Min.
-12
Min.
-15
Min.
Symbol Parameter
Min.
8
Max.
8
Max.
10
10
5
Max.
12
12
6
Max.
15
15
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tRC
Read Cycle Time
10
3
12
3
15
3
tAA
Address Access Time
Output Hold Time
3
tOHA
tACE
tDOE
tHZOE
8
CE Access Time
0
0
0
0
OE Access Time
4
(2)
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
LB, UB Access Time
LB, UB to High-Z Output
LB, UB to Low-Z Output
4
5
6
6
(2)
tLZOE
0
4
5
6
0
6
(2
tHZCE
0
0
0
0
(2)
tLZCE
tBA
3
4
3
5
3
6
3
7
0
0
0
0
tHZB
tLZB
4
5
6
6
0
0
0
0
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of
0 to 3.0V and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Unit
0V to 3.0V
3 ns
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
1.5V
Output Load
See Figures 1a and 1b
Notes:
1. The Vcc operating range for 8 ns is 3.3V +10%, -5%.
AC TEST LOADS
319 Ω
319 Ω
3.3V
3.3V
OUTPUT
OUTPUT
353 Ω
353 Ω
5 pF
30 pF
Including
jig and
scope
Including
jig and
scope
Figure 1a.
Figure 1b.
4
Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CS = OE = VIL, UB or LB = VIL)
1
t
RC
ADDRESS
2
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
3
4
READ CYCLE NO. 2(1,3)
t
RC
5
ADDRESS
OE
t
AA
t
OHA
6
t
HZOE
t
DOE
LZOE
ACE
t
CE
7
t
t
HZCE
t
LZCE
LB, UB
8
t
BA
t
HZB
t
LZB
HIGH-Z
DOUT
DATA VALID
9
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = VIL.
3. Address is valid prior to or coincident with CE LOW transition.
10
11
12
Integrated Circuit Solution Inc.
SR013-0C
5
IS61LV6416
WRITE CYCLE SWITCHING CHARACTERISTICS(1,3) (Over Operating Range)
-8
-10
Min.
-12
Min.
-15
Min.
Symbol Parameter
Min.
Max.
Max.
Max.
Max.
Unit
ns
tWC
tSCE
tAW
Write Cycle Time
8
7
7
10
8
12
9
15
10
10
CE to Write End
ns
Address Setup Time
to Write End
8
9
ns
tHA
Address Hold from Write End
Address Setup Time
0
0
4
0
0
5
0
0
6
0
0
7
ns
ns
ns
ns
ns
ns
ns
ns
tSA
tPWB
tPWE
tSD
LB, UB Valid to End of Write
WE Pulse Width
7
8
9
10
10
7
7
8
9
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
4.5
0
5
6
tHD
0
0
0
(2)
tHZWE
3
3
3
3
(2)
tLZWE
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states to
initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the
rising or falling edge of the signal that terminates the write.
6
Integrated Circuit Solution Inc.
SR013-0C
IS61LV6416
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)(1,2)
1
t
WC
2
ADDRESS
CE
t
HA
t
SCE
3
t
PWB
LB, UB
4
t
AW
t
PWE
5
WE
t
SA
(1)
WRITE
D
6
t
SD
t
HD
IN
7
t
HZWE
t
LZWE
HIGH-Z
HIGH-Z
DOUT
UNDEFINED
UNDEFINED
8
Notes:
9
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
10
11
12
Integrated Circuit Solution Inc.
SR013-0C
7
IS61LV6416
ORDERING INFORMATION
ORDERING INFORMATION
Commercial Range: 0°C to +70°C
Industrial Range: 40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
8
8
8
IS61LV6416-8B
IS61LV6416-8T
IS61LV6416-8K
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
8
8
8
IS61LV6416-8BI
IS61LV6416-8TI
IS61LV6416-8KI
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
10
10
10
IS61LV6416-10B
IS61LV6416-10T
IS61LV6416-10K
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
10
10
10
IS61LV6416-10BI
IS61LV6416-10TI
IS61LV6416-10KI
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
12
12
12
IS61LV6416-12B
IS61LV6416-12T
IS61LV6416-12K
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
12
12
12
IS61LV6416-12BI
IS61LV6416-12TI
IS61LV6416-12KI
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
15
15
15
IS61LV6416-15B
IS61LV6416-15T
IS61LV6416-15K
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
15
15
15
IS61LV6416-15BI
IS61LV6416-15TI
IS61LV6416-15KI
6*8mm TF-BGA
400mil TSOP-2
400mil SOJ
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
8
Integrated Circuit Solution Inc.
SR013-0C
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