IC61C256AH-10J [ICSI]
32K x 8 HIGH-SPEED CMOS STATIC RAM; 32K ×8高速CMOS静态RAM
| 型号： | IC61C256AH-10J |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | 32K x 8 HIGH-SPEED CMOS STATIC RAM |
| 文件： | 总9页 (文件大小：99K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IC61C256AH
Document Title
32K x 8 High Speed SRAM
Revision History
Revision No
History
Draft Date
Remark
0A
0B
0C
0D
Initial Draft
March 23,2001
October 18,2001
February 18,2002
April 19,2002
Revise typo of tHA on page 7
Add SOP package type
Revise typo of sop size at page 2,9
The attached datasheets are provided by ICSI. Integrated Circuit Solution Inc reserve the right to change the specifications and
products. ICSI will answer to your questions about device. If you have any questions, please contact the ICSI offices.
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
1
IC61C256AH
32K x 8 HIGH-SPEED CMOS STATIC RAM
FEATURES
DESCRIPTION
The ICSI IC61C256AH is very high-speed, low power, 32,768
word by 8-bit static RAMs. They are fabricated using ICSI's
high-performance CMOS technology. This highly reliable pro-
cess coupled with innovative circuit design techniques, yields
access times as fast as 8 ns maximum.
• High-speed access times: 10, 12, 15, 20, 25 ns
• Low active power: 400 mW (typical)
• Low standby power
-- 250 µW (typical) CMOS standby
-- 55 mW (typical) TTL standby
When CE is HIGH (deselected), the device assumes a standby
mode at which the power dissipation is reduced to
50 µW (typical) with CMOS input levels.
• Fully static operation: no clock or refresh
required
• TTL compatible interface and outputs
• Single 5V power supply
Easy memory expansion is provided by using an active LOW
Chip Enable (CE). The active LOW Write Enable (WE) controls
both writing and reading of the memory.
The IC61C256AH is pin compatible with other 32k x 8 SRAMs
and are available in 28-pin 300mil PDIP, 300mil SOJ, and
8*13.4mm TSOP-1 package, 330 mil SOP.
FUNCTIONAL BLOCK DIAGRAM
32K X 8
MEMORY ARRAY
A0-A14
DECODER
VCC
GND
I/O
DATA
COLUMN I/O
I/O0-I/O7
CIRCUIT
CE
CONTROL
CIRCUIT
OE
WE
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
PIN CONFIGURATION
PIN CONFIGURATION
8x13.4mm TSOP-1
28-Pin DIP and SOJ and SOP
A14
A12
A7
1
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
A13
A8
OE
A11
A9
22
23
24
25
26
27
28
1
21
20
19
18
17
16
15
14
13
12
11
10
9
A10
CE
2
3
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A6
4
A8
A5
5
A9
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A4
6
A11
OE
A3
7
A2
8
A10
CE
2
A1
9
3
A0
10
11
12
13
14
I/O7
I/O6
I/O5
I/O4
I/O3
4
I/O0
I/O1
I/O2
GND
5
6
A1
A2
7
8
TRUTH TABLE
PIN DESCRIPTIONS
Mode
WE CE
OE
I/O Operation Vcc Current
A0-A14
Address Inputs
Not Selected
(Power-down)
X
H
X
High-Z
ISB1, ISB2
CE
Chip Enable Input
Output Enable Input
Write Enable Input
Input/Output
OE
Output Disabled
Read
H
H
L
L
L
L
H
L
High-Z
DOUT
DIN
ICC1,ICC2
ICC1, ICC2
ICC1, ICC2
WE
I/O0-I/O7
Vcc
Write
X
Power
GND
Ground
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Parameter
Value
Unit
V
VTERM
TBIAS
TSTG
PD
Terminal Voltage with Respect to GND
Temperature Under Bias
Storage Temperature
–0.5 to +7.0
–55 to +125
–65 to +150
1.5
°C
°C
W
Power Dissipation
IOUT
DC Output Current (LOW)
20
mA
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent
damage to the device. This is a stress rating only and functional operation of the device at these or any
other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
3
IC61C256AH
OPERATING RANGE
Range
Commercial
AmbientTemperature
Speed
-10, -12
-15, -20
VCC
5V, ± 5%
5V ± 10%
0°C to +70°C
Industrial
–40°C to +85°C
-12
5V ± 5%
5V± 10%
-15, -20, -25
Notes:
1. 8 ns is preliminary.
DC ELECTRICAL CHARACTERISTICS (Over Operating Range)
Symbol Parameter
Test Conditions
VCC = Min., IOH = –4.0 mA
Min.
2.4
Max.
—
Unit
V
VOH
VOL
VIH
VIL
ILI
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage(1)
Input LOW Voltage(2)
Input Leakage
VCC = Min., IOL = 8.0 mA
—
0.4
V
2.2
VCC + 0.5
0.8
V
–0.5
V
GND ≤ VIN ≤ VCC
Com.
Ind.
–5
–10
5
10
µA
ILO
Output Leakage
GND ≤ VOUT ≤ VCC,
Outputs Disabled
Com.
Ind.
–5
–10
5
10
µA
Notes:
1. VIH=VCC +3.0V for pulse width less than 10ns.
2. VIL = –3.0V for pulse width less than 10 ns.
POWER SUPPLY CHARACTERISTICS(1) (Over Operating Range)
-10
-12
-15
-20
-25
Sym. Parameter
TestConditions
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
I
CC
Vcc Dynamic Operating
Supply Current
V
CC = Max., CE = VIL
Com.
Ind.
—
—
145
180
—
—
135
170
—
—
125
160
—
—
120
150
—
—
120
140
mA
IOUT = 0 mA, f = fMAX
I
SB
1
TTL Standby Current
(TTL Inputs)
V
V
CE
CC = Max.,
IN = VIH or VIL
≥VIH, f = 0
Com.
Ind.
—
—
25
30
—
—
25
30
—
—
25
30
—
—
25
30
—
—
25
30
mA
mA
I
SB2
CMOS Standby
Current (CMOS Inputs)
V
CC = Max.,
Com.
Ind.
—
—
2
10
—
—
2
10
—
—
2
10
—
—
2
10
—
—
2
10
CE
≥
≥
≤
V
V
CC – 0.2V,
CC – 0.2V, or
V
V
IN
IN
0.2V, f = 0
Notes:
1. At f = fMAX, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
CAPACITANCE(1,2)
Symbol
CIN
Parameter
Input Capacitance
Conditions
VIN = 0V
Max.
8
Unit
pF
COUT
Output Capacitance
VOUT = 0V
10
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, Vcc = 5V.
4
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)
-10
-12
-15
-20
-25
Symbol Parameter
Read Cycle Time
tAA Address Access Time
Min.
10
—
2
Max. Min.
Max.
—
12
—
12
5
Min. Max.
Min.
20
—
2
Max.
—
20
—
20
8
Min.
25
—
2
Max.
—
25
—
25
9
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tRC
—
10
—
10
5
12
—
2
15
—
2
—
15
—
15
7
tOHA
tACE
tDOE
Output Hold Time
CE Access Time
OE Access Time
—
—
0
—
—
0
—
—
0
—
—
0
—
—
0
(2)
tLZOE OE to Low-Z Output
—
5
—
6
—
7
—
9
—
10
—
10
—
20
(2)
tHZOE OE to High-Z Output
—
2
—
3
—
3
—
3
—
3
(2)
tLZCE CE to Low-Z Output
—
5
—
7
—
8
—
9
(2)
tHZCE CE to High-Z Output
—
0
—
0
—
0
—
0
—
0
(3)
tPU
tPD
CE to Power-Up
—
10
—
12
—
15
—
18
(3)
CE to Power-Down
—
—
—
—
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Unit
0V to 3.0V
3 ns
Input and Output Timing
and Reference Levels
1.5V
Output Load
See Figures 1 and 2
AC TEST LOADS
480 Ω
480 Ω
5V
5V
OUTPUT
OUTPUT
255 Ω
255 Ω
30 pF
Including
jig and
5 pF
Including
jig and
scope
scope
Figure 1.
Figure 2.
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
5
IC61C256AH
AC WAVEFORMS
READ CYCLE NO. 1(1,2)
t
RC
ADDRESS
t
AA
t
OHA
t
OHA
DATA VALID
DOUT
PREVIOUS DATA VALID
READ CYCLE NO. 2(1,3)
t
RC
ADDRESS
OE
t
AA
t
OHA
t
HZOE
t
DOE
t
t
LZOE
ACE
CE
t
HZCE
t
LZCE
HIGH-Z
DOUT
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE = VIL.
3. Address is valid prior to or coincident with CE LOW transitions.
6
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2) (Over Operating Range)
-10
-12
-15
-20
-25
Symbol Parameter
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Min. Max.
Unit
ns
tWC
tSCE
tAW
Write Cycle Time
10
9
—
—
—
12
10
10
—
—
—
15
10
12
—
—
—
20
13
15
—
—
—
25
15
20
—
—
—
CE to Write End
ns
Address Setup Time
to Write End
9
ns
tHA
Address Hold
from Write End
0
—
0
—
0
—
0
—
0
—
ns
tSA
Address Setup Time
0
8
—
—
—
—
6
0
8
—
—
—
—
6
0
10
9
—
—
—
—
7
0
13
10
0
—
—
—
—
8
0
15
12
0
—
—
—
—
10
—
ns
ns
ns
ns
ns
ns
tPWE(4)
WE Pulse Width
tSD
Data Setup to Write End
Data Hold from Write End
WE LOW to High-Z Output
WE HIGH to Low-Z Output
7
7
tHD
0
0
0
(2)
tHZWE
tLZWE
—
0
—
0
—
0
—
0
—
0
—
—
—
—
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V
and output loading specified in Figure 1a.
2. Tested with the load in Figure 1b. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
4. Tested with OE HIGH.
AC WAVEFORMS
WRITE CYCLE NO. 1(WE Controlled) (1,2 )
t
WC
VALID ADDRESS
SCE
ADDRESS
CE
t
SA
t
t
HA
t
AW
t
t
PWE1
PWE2
WE
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
7
IC61C256AH
WRITE CYCLE NO. 2(CE Controlled) (1,2)
t
WC
ADDRESS
OE
VALID ADDRESS
t
HA
LOW
CE
t
AW
t
PWE1
WE
t
SA
t
HZWE
t
LZWE
HIGH-Z
DATA UNDEFINED
DOUT
t
SD
t
HD
DATAIN VALID
DIN
Notes:
1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write,
but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling
edge of the signal that terminates the Write.
2. I/O will assume the High-Z state if OE ≥ VIH.
8
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
IC61C256AH
ORDERING INFORMATION:
IC61C256AH
Commercial Range: 0°C to +70°C
ORDERING INFORMATION:
IC61C256AH
Industrial Range: –40°C to +85°C
Speed (ns) Order Part No.
Package
Speed (ns) Order Part No.
Package
10
10
10
10
IC61C256AH-10N 300mil DIP
IC61C256AH-10J 300mil SOJ
12
12
12
12
IC61C256AH-12NI 300mil DIP
IC61C256AH-12JI 300mil SOJ
IC61C256AH-12TI 8*13.4mm TSOP-1
IC61C256AH-12UI 330mil SOP
IC61C256AH-10T
8*13.4mm TSOP-1
IC61C256AH-10U 330mil SOP
12
12
12
12
IC61C256AH-12N 300mil DIP
IC61C256AH-12J 300mil SOJ
15
15
15
15
IC61C256AH-15NI 300mil DIP
IC61C256AH-15JI 300mil SOJ
IC61C256AH-15TI 8*13.4mm TSOP-1
IC61C256AH-15UI 330mil SOP
IC61C256AH-12T
8*13.4mm TSOP-1
IC61C256AH-12U 330mil SOP
15
15
15
15
IC61C256AH-15N 300mil DIP
IC61C256AH-15J 300mil SOJ
20
20
20
20
IC61C256AH-20NI 300mil DIP
IC61C256AH-20JI 300mil SOJ
IC61C256AH-20TI 8*13.4mm TSOP-1
IC61C256AH-20UI 330mil SOP
IC61C256AH-15T
8*13.4mm TSOP-1
IC61C256AH-15U 330mil SOP
20
20
20
20
IC61C256AH-20N 300mil DIP
IC61C256AH-20J 300mil SOJ
25
25
25
25
IC61C256AH-25NI 300mil DIP
IC61C256AH-25JI 300mil SOJ
IC61C256AH-25TI 8*13.4mm TSOP-1
IC61C256AH-25UI 330mil SOP
IC61C256AH-20T
8*13.4mm TSOP-1
IC61C256AH-20U 330mil SOP
Integrated Circuit Solution Inc.
HEADQUARTER:
NO.2, TECHNOLOGY RD. V, SCIENCE-BASED INDUSTRIAL PARK,
HSIN-CHU, TAIWAN, R.O.C.
TEL: 886-3-5780333
Fax: 886-3-5783000
BRANCH OFFICE:
7F, NO. 106, SEC. 1, HSIN-TAI 5TH ROAD,
HSICHIH TAIPEI COUNTY, TAIWAN, R.O.C.
TEL: 886-2-26962140
FAX: 886-2-26962252
http://www.icsi.com.tw
Integrated Circuit Solution Inc.
AHSR010-0D 4/19/2002
9
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