AV9154A-39CS16 [ICSI]
Low Cost 16-Pin Frequency Generator; 低成本的16引脚频率发生器
| 型号： | AV9154A-39CS16 |
| 厂家： | 
INTEGRATED CIRCUIT SOLUTION INC |
| 描述： | Low Cost 16-Pin Frequency Generator |
| 文件： | 总5页 (文件大小：268K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AV9154A-39
Integrated
Circuit
Systems, Inc.
Preliminary Product Preview
Low Cost 16-Pin Frequency Generator
General Description
Features
TheICS9154A-39is a 0.8mm technology low-cost frequency
generator designed for general purpose PC and disk drive
applications. However, because theICS9154A-39uses 0.8mm
technology and the latest phase-locked loop architecture, it
offers significant performance advantages that enable the
device to be used in high performance systems when clock
jitter is a key design issue.
All loop filter components internal
5V operation
16-pin 150-mil SOIC
Power-down control of CPU clock and Fixed Clock
when PD# goes low
Output enable control of all output pins
The ICS9154A-39 guarantees a 45/55 duty cycle over all
frequencies. In addition, a worst case jitter of ±250ps is
achieved.
The CPU clock offers the unique feature of smooth, glitch-
free transitions from one frequency to the next, making this
the ideal device to use whenever slowing the cpu speed. The
ICS9154A-39 makes a gradual transition between
frequencies.
Pin Configuration
16-Pin SOIC
Block Diagram
9154-39 Rev B 09/18/97
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
AV9154A-39
Preliminary Product Preview
Pin Descriptions
PIN
PIN NAME
8.33 MHz
TYPE
DESCRIPTION
NUMBER
1
2
OUT 8.33 MHz output clock.*
OUT Crystal Out.
X2
3
X1
IN
Crystal In, nominally 10.0 MHz.
4
VDD
GND
100 MHz
10 MHz
AGND
OE
PWR Digital power (+5V).
PWR Digital ground.
5
6
OUT 100 MHz clock output.*
OUT 10 MHz keyboard clock output.*
PWR Analog ground.
7
8
9
IN
IN
-
Tristates outputs when low.
10
11
12
13
14
15
FS0
Frequency select 0 for CPU clock.
No connect (Do not connect to this pin.).
NC
GND
VDD
CPUCLK
FS1
PWR Digital ground.
PWR Digital power (+5V).
OUT CPU clock output.
IN
Frequency select 1 for CPU clock.
Power-down, shuts off internal clocks and forces outputs to
low logic level when input pulled logic low.
16
PD#
IN
Note: The following input pins are pulled-up to VDD internal: 9, 10, 15 and 16.
Functionality
FS1
0
FS0
0
CLK(MHz)
40.0
0
1
30.0
1
0
37.0
1
1
25.0
These frequencies assume an input frequency of 10.0 Mhz.
2
AV9154A-39
Preliminary Product Preview
Absolute Maximum Ratings
VDD referenced to GND . . . . . . . . . . . . . . . . . . . . . . 7V
Voltage on I/O pins referenced to GND. . . . . . . . . . . GND -0.5V to VDD +0.5V
Operating temperature under bias. . . . . . . . . . . . . . . . 0°C to +70°C
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 Watts
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +150°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product
reliability.
Electrical Characteristics at 5V
VDD = +5V±10%, TA=0°C to 70°C
DC Characteristics
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX
0.8
UNITS
V
Input Low Voltage
Input High Voltage
Input Low Current
Input High Current
Output Low Voltage
Output High Voltage1
Output Low Current1
Output High Current1
Supply Current
VIL
VIH
2.0
-35
-5
V
IIL
IIH
VIN=0V
-16.0
µA
µA
V
VIN=VDD
5
VOL
VOH
IOL
IOH
IDD
IOL=10mA
IOH=-30mA
VOL=0.8
0.15
3.7
32
0.4
2.4
15
V
mA
mA
mA
VOH=2.0V
Unloaded, 40 MHz
-48
25
-30
50
Output Frequency Change over
With respect to typical
frequency
FD
0.002
0.01
10
%
pF
pF
Supply and Temperature1
Input Capacitance1
Load Capacitance1
CI
Except X1, X2
CL
Pins X1, X2
20
Notes:
1. Parameter is guaranteed by design and characterization, not subject to production testing.
3
AV9154A-39
Preliminary Product Preview
Electrical Characteristics at 5V
VDD = +5V±10%, TA=0°C to 70°C
AC Characteristics
PARAMETER
Input Clock Rise Time1
Input Clock Fall Time1
Output Rise time1
Rise time1
Output Fall time1
Fall time1
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
20
20
UNITS
tICr
tICf
tr
ns
ns
ns
15pF load, 0.8 to 2.0V
15pF load,
20% to 80% VDD
15pF load, 2.0 to 0.8V
15pF load,
80% to 20% VDD
15pF load @ 1.4V
15pF load @ 1.4V
-
-
-
-
0.8
1.4
0.7
0.8
2
tr
tf
tf
3
2
2
ns
ns
ns
Duty cycle1
dt
dt
45
40
55
60
%
%
Duty cycle, reference clocks1
Jitter, one sigma, 32 MHz-100
MHz clocks1
tjls
80
120
150
500
250
700
2
ps
ps
ps
ps
ps
ns
Jitter, one sigma, 16 MHz-30
tjls
100
400
MHz clocks 1
Jitter, one sigma, clocks below
16 MHz1
tjls
Jitter, absolute, 32 MHz-100
tjab
tjab
tjab
-250
-700
-2
MHz clocks1
Jitter, absolute, 16-30 MHz
clock1
Jitter, absolute, clocks below 16
MHz1
Input Frequency1
fin
tPO
tft
10.0
10
MHz
ms
ms
Power-up Time1
to 100 MHz
from 25.0 to 40.0 MHz
20
8
Frequency Transition Time1
Notes: 1. Parameter is guaranteed by design and characterization, not subject to production testing.
ICS9154A-39
Figure 1: Typical Crystal Circuitry
Note: Crystal load capacitors are internal to the ICS9154A-39 device and no external components are required.
4
AV9154A-39
Preliminary Product Preview
16-Pin SOIC Package
Ordering Information
AV9154A-39CS16
Example:
XXX XXXX-PPP M X#W
Lead Count & Package Width
Lead Count=1, 2 or 3 digits
W=.3 SOIC or .6 DIP; None=StandardWidth
Package Type
S=SOIC
Pattern Number (2 or 3 digit number for parts with ROM code patterns)
Device Type (consists of 3 or 4 digit numbers)
Prefix
ICS,AV=Standard Device; GSP=Genlock Device
PRODUCT PREVIEW documents contain information on new
products in the sampling or preproduction phase of development.
Characteristic data and other specifications are subject to change
without notice.
5
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