5962-8876802KYC [HP]
Hermetically Sealed, Low IF, Wide VCC, Logic Gate Optocouplers; 密封式，低中频，宽VCC逻辑门光电耦合器
| 型号： | 5962-8876802KYC |
| 厂家： | 
HEWLETT-PACKARD |
| 描述： | Hermetically Sealed, Low IF, Wide VCC, Logic Gate Optocouplers |
| 文件： | 总12页 (文件大小：296K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Hermetically Sealed,
Low I , Wide V ,
F
CC
HCPL-520x*
5962-88768
HCPL-523x
HCPL-623x
HCPL-625x
5962-88769
Logic Gate Optocouplers
Technical Data
*See matrix for available extensions.
Features
• Isolated Bus Driver (Single
Channel)
• Pulse Transformer
Replacement
• Ground Loop Elimination
• Harsh Industrial
Environments
• Computer-Peripheral
Interfaces
eliminates the potential for
output signal chatter. The
detector in the single channel
units has a tri-state output stage
• Dual Marked with Device
Part Number and DSCC
Standard Microcircuit
Drawing
• Manufactured and Tested on
a MIL-PRF-38534 Certified
Line
• QML-38534, Class H and K
• Four Hermetically Sealed
Package Configurations
• Performance Guaranteed
over -55°C to +125°C
• Wide VCC Range (4.5 to 20 V)
• 350 ns Maximum Propaga-
tion Delay
• CMR: > 10,000 V/µs Typical
• 1500 Vdc Withstand Test
Voltage
• Three State Output Available
• High Radiation Immunity
• HCPL-2200/31 Function
Compatibility
• Reliability Data Available
• Compatible with LSTTL,
TTL, and CMOS Logic
Truth Tables
(Positive Logic)
Multichannel Devices
Input
On (H)
Off (L)
Output
H
L
Description
These units are single, dual and
quad channel, hermetically sealed
optocouplers. The products are
capable of operation and storage
over the full military temperature
range and can be purchased as
either standard product or with
full MIL-PRF-38534 Class Level
H or K testing or from the
appropriate DSCC Drawing. All
devices are manufactured and
tested on a MIL-PRF-38534
certified line and are included in
the DSCC Qualified Manufac-
turers List QML-38534 for Hybrid
Microcircuits.
Single Channel DIP
Input
On (H)
Off (L)
On (H)
Off (L)
Enable Output
H
H
L
Z
Z
H
L
L
Functional Diagram
Multiple Channel Devices
Available
V
CC
Each channel contains an AlGaAs
light emitting diode which is
V
O
Applications
• Military and Space
• High Reliability Systems
• Transportation and Life
Critical Systems
optically coupled to an integrated
high gain photon detector. The
detector has a threshold with
hysteresis which provides differ-
ential mode noise immunity and
V
E
GND
• High Speed Line Receiver
A 0.1 µF bypass capacitor must be connected between VCC and GND pins.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
2
which allows for direct connection
to data buses. The output is non-
inverting. The detector IC has an
internal shield that provides a
guaranteed common mode
transient immunity of up to
10,000 V/µs. Improved power
supply rejection eliminates the
need for special power supply
bypass precautions.
ceramic chip carrier (case outline
2). Devices may be purchased
with a variety of lead bend and
plating options, see Selection
Guide Table for details. Standard
Microcircuit Drawing (SMD)
parts are available for each
package and lead style.
specifications, and performance
characteristics shown in the
figures are identical for all parts.
Occasional exceptions exist due
to package variations and limita-
tions and are as noted. Addition-
ally, the same package assembly
processes and materials are used
in all devices. These similarities
give justification for the use of
data obtained from one part to
represent other part’s per-
Because the same electrical die
(emitters and detectors) are used
for each channel of each device
listed in this data sheet, absolute
maximum ratings, recommended
operating conditions, electrical
Package styles for these parts are
8 pin DIP through hole (case
outline P), 16 pin DIP flat pack
(case outline F), and leadless
formance for die related
reliability and certain limited
radiation test results.
Selection Guide–Package Styles and Lead Configuration Options
Package
Lead Style
Channels
8 Pin DIP
Through Hole
1
8 Pin DIP
Through Hole
2
16 Pin Flat Pack
Unformed Leads
4
20 Pad LCCC
Surface Mount
2
Common Channel
Wiring
None
V , GND
CC
V , GND
CC
None
Agilent Part # & Options
Commercial
MIL-PRF-38534, Class H
MIL-PRF-38534, Class K
Standard Lead Finish
Solder Dipped
Butt Cut/Gold Plate
Gull Wing/Soldered
Class H SMD Part #
Prescript for all below
Either Gold or Solder
Gold Plate
HCPL-5200
HCPL-5201
HCPL-520K
Gold Plate
Option #200
Option #100
Option #300
HCPL-5230
HCPL-5231
HCPL-523K
Gold Plate
Option #200
Option #100
Option #300
HCPL-6250
HCPL-6251
HCPL-625K
Gold Plate
HCPL-6230
HCPL-6231
HCPL-623K
Soldered Pads
5962-
5962-
5962-
8876903FX
8876903FC
5962-
88769022X
8876801PX
8876801PC
8876801PA
8876801YC
8876801YA
8876801XA
8876901PX
8876901PC
8876901PA
8876901YC
8876901YA
8876901XA
Solder Dipped
88769022A
Butt Cut/Gold Plate
Butt Cut/Soldered
Gull Wing/Soldered
Class K SMD Part #
Prescript for all below
Either Gold or Solder
Gold Plate
5962-
5962-
5962-
8876906KFX
8876906KFC
5962-
8876905K2X
8876802KPX
8876802KPC
8876802KPA
8876802KYC
8876802KYA
8876802KXA
8876904KPX
8876904KPC
8876904KPA
8876904KYC
8876904KYA
8876904KXA
Solder Dipped
8876905K2A
Butt Cut/Gold Plate
Butt Cut/Soldered
Gull Wing/Soldered
3
Functional Diagrams
8 Pin DIP
Through Hole
1 Channel
8 Pin DIP
Through Hole
2 Channels
16 Pin Flat Pack
Unformed Leads
4 Channels
20 Pad LCCC
Surface Mount
2 Channels
15
16
15
14
13
1
2
3
4
V
CC2
V
8
7
6
5
V
8
7
6
5
1
2
3
4
1
2
3
4
CC
CC
V
CC
19
20
13
12
V
V
O2
GND
V
O1
V
V
V
V
V
O
O1
O2
O3
O4
2
V
O2
V
CC1
12
11
5
6
7
8
2
3
10
V
E
O1
GND
GND
GND
1
GND 10
9
7
8
Note: Multichannel DIP and flat pack devices have common VCC and ground. Single channel DIP has an enable pin 6. LCCC (leadless
ceramic chip carrier) package has isolated channels with separate VCC and ground connections.
7.24 (0.285)
Outline Drawings
6.99 (0.275)
16 Pin Flat Pack, 4 Channels
2.29 (0.090)
MAX.
1.27 (0.050)
REF.
11.13 (0.438)
10.72 (0.422)
0.46 (0.018)
0.36 (0.014)
8.13 (0.320)
MAX.
2.85 (0.112)
MAX.
0.88 (0.0345)
MIN.
0.31 (0.012)
0.23 (0.009)
0.89 (0.035)
0.69 (0.027)
5.23
(0.206)
MAX.
9.02 (0.355)
8.76 (0.345)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
20 Terminal LCCC Surface Mount, 2 Channels
8 Pin DIP Through Hole, 1 and 2 Channel
8.70 (0.342)
9.10 (0.358)
9.40 (0.370)
9.91 (0.390)
0.76 (0.030)
1.27 (0.050)
8.13 (0.320)
MAX.
4.95 (0.195)
5.21 (0.205)
1.78 (0.070)
2.03 (0.080)
7.16 (0.282)
7.57 (0.298)
1.02 (0.040) (3 PLCS)
1.14 (0.045)
1.40 (0.055)
4.32 (0.170)
MAX.
8.70 (0.342)
9.10 (0.358)
4.95 (0.195)
5.21 (0.205)
TERMINAL 1 IDENTIFIER
2.16 (0.085)
0.51 (0.020)
MIN.
3.81 (0.150)
METALIZED
CASTILLATIONS (20 PLCS)
1.78 (0.070)
2.03 (0.080)
0.20 (0.008)
0.33 (0.013)
MIN.
0.64
(0.025)
(20 PLCS)
0.51 (0.020)
1.52 (0.060)
2.03 (0.080)
7.36 (0.290)
7.87 (0.310)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
SOLDER THICKNESS 0.127 (0.005) MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
4
Leaded Device Marking
Leadless Device Marking
Agilent LOGO
A QYYWWZ
XXXXXX
XXXXXXX
XXX XXX
50434
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
Agilent LOGO
Agilent P/N
PIN ONE/
ESD IDENT
A QYYWWZ
XXXXXX
XXXX
XXXXXX
XXX 50434
COMPLIANCE INDICATOR,*
DATE CODE, SUFFIX (IF NEEDED)
DSCC SMD*
DSCC SMD*
Agilent FSCN*
Agilent P/N
DSCC SMD*
DSCC SMD*
PIN ONE/
COUNTRY OF MFR.
Agilent FSCN*
COUNTRY OF MFR.
ESD IDENT
*QUALIFIED PARTS ONLY
*QUALIFIED PARTS ONLY
Hermetic Optocoupler Options
Option
Description
100
Surface mountable hermetic optocoupler with leads trimmed for butt joint assembly. This
option is available on commercial and hi-rel product in 8 pin DIP (see drawings below for
details).
4.32 (0.170)
MAX.
0.51 (0.020)
1.14 (0.045)
MIN.
0.20 (0.008)
0.33 (0.013)
1.40 (0.055)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
7.36 (0.290)
7.87 (0.310)
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
200
300
Lead finish is solder dipped rather than gold plated. This option is available on commercial
and hi-rel product in 8 pin DIP. DSCC Drawing part numbers contain provisions for lead
finish. All leadless chip carrier devices are delivered with solder dipped terminals as a
standard feature.
Surface mountable hermetic optocoupler with leads cut and bent for gull wing assembly. This
option is available on commercial and hi-rel product in 8 pin DIP (see drawings below for
details). This option has solder dipped leads.
4.57 (0.180)
MAX.
4.57 (0.180)
MAX.
0.20 (0.008)
0.33 (0.013)
0.51 (0.020)
MIN.
5° MAX.
1.40 (0.055)
1.65 (0.065)
9.65 (0.380)
9.91 (0.390)
2.29 (0.090)
2.79 (0.110)
0.51 (0.020)
MAX.
NOTE: DIMENSIONS IN MILLIMETERS (INCHES).
5
Absolute Maximum Ratings
Storage Temperature Range, TS .................................. -65°C to +150°C
Operating Temperature, TA ......................................... -55°C to +125°C
Case Temperature, TC ................................................................+170°C
Junction Temperature, TJ ..........................................................+175°C
Lead Solder Temperature .............................................. 260°C for 10 s
Average Forward Curre, IF AVG (each channel) ............................. 8 mA
Peak Input Current, IF PK (each channel) ............................... 20 mA[1]
Reverse Input Voltage, VR (each channel) ....................................... 3 V
Supply Voltage ,VCC .............................................. 0.0 V min., 20 V max.
Average Output Current, IO (each channel) ................................. 15 mA
Output Voltage, VO (each channel) .................... –0.3 V min., 20 V max.
Package Power Dissipation, Pd (each channel) ......................... 200 mW
Single Channel Product Only
Tri-State Enable Voltage, VE ............................... –0.3 V min., 20 V max.
8 Pin Ceramic DIP Single Channel Schematic
ANODE
CATHODE
Note enable pin 6. An external 0.01 µF to 0.1 µF bypass capacitor is recommended
between VCC and ground for each package type.
ESD Classification
(MIL-STD-883, Method 3015)
HCPL-5200/01/0K, HCPL-6230/31/3K ................................(∆), Class 1
HCPL-5230/31/3K, HCPL-6250/51/5K ............................ (Dot), Class 3
Recommended Operating Conditions
Parameter
Symbol Min.
Max.
20
8
Units
V
mA
Power Supply Voltage
Input Current, High Level,
Each Channel
VCC
IFH
4.5
2
Input Voltage, Low Level,
Each Channel
Fan Out (TTL Load)
Each Channel
VFL
N
0
0.8
4
V
Single Channel Product Only
High Level Enable Voltage
Low Level Enable Voltage
VEH
VEL
2.0
0
20
0.8
V
V
6
Electrical Characteristics
T = -55°C to +125°C, 4.5 V ≤ VCC ≤ 20 V, 2 mA ≤ IF(ON) ≤ 8 mA, 0 V ≤ VF(OFF) ≤ 0.8 V, unless otherwise
A
specified.
Group A[11]
Subgroups Min. Typ.* Max. Units Fig. Notes
Limit
Parameter
Sym.
Test Conditions
Logic Low Output Voltage
V
IOL = 6.4 mA (4 TTL Loads)
1, 2, 3
1, 2, 3
0.5
V
V
1,3
2
OL
IOH = -2.6 mA
2.4
**
Logic High Output Voltage
V
(**VOH =VCC - 2.1 V)
2,3
2
OH
IOH = -0.32 mA
NA
3.1
Output Leakage Current
(VOUT > VCC)
IOHH VO = 5.5 V IF = 8 mA
VO = 20 V VCC = 4.5 V
VCC = 5.5 V VF = 0 V
VE = Don't Care
1, 2, 3
100
500
6
µA
2
Single
4.5
5.3
Channel
Logic Low
VCC = 20 V
1, 2, 3
7.5
Supply
ICCL
Current
Dual
VCC = 5.5 V
9.0
12
mA
Channel
VF1 = VF2 = 0 V
V
CC = 20 V
VCC = 5.5 V VF1 = VF2
F3 = VF4 = 0 V
10.6
14
15
24
Quad
Channel
=
V
V
CC = 20 V
VCC = 5.5 V IF = 8 mA
VE = Don't Care
17
30
Single
Channel
2.9
4.5
1, 2, 3
Logic High
Supply
Current
VCC = 20 V
3.3
5.8
6
9
ICCH
Dual
VCC = 5.5 V
mA
Channel
IF1
IF2 = 8 mA
VCC = 5.5 V IF1 = IF2
=
V
CC = 20 V
6.6
9
12
18
24
Quad
Channel
=
F3
V
CC = 20 V I=
11
IF4 = 8 mA
Logic Low Short Circuit
Output Current
VO = VCC = 5.5 V
20
35
mA
mA
IOSL
VF = 0 V
1, 2, 3
1, 2, 3
2, 3
2, 3
VO = VCC = 20 V
VCC = 5.5 V
Logic High Short Circuit
Output Current
IF = 8 mA
VO = GND
-10
-25
1.8
IOSH
VCC = 20 V
Input Forward Voltage
VF IF = 8 mA
1, 2, 3
1, 2, 3
1.0
3
1.3
V
V
4
2
2
Input Reverse
BVR IR = 10 µA
Breakdown Voltage
Input-Output Insulation
Leakage Current
II-O VI-O = 1500 Vdc, t = 5s
1
1.0
µA
V/µs
V/µs
ns
4, 5
RH = 45%, TA = 25°C
Logic High Common Mode |CMH| IF = 2 mA, VCM = 50 VP-P
Transient Immunity
9, 10, 11
9, 10, 11
9, 10, 11
9, 10, 11
1000 10,000
1000 10,000
9
9
2, 6,
12
Logic Low Common Mode |CML| IF = 0 mA, VCM = 50 VP-P
Transient Immunity
2, 6,
12
Propagation Delay Time
to Logic Low
tPHL
173 350
118 350
5,
6
2, 7
Propagation Delay Time
to Logic High
tPLH
ns
5,
6
2, 7
7
Electrical Characteristics Single Channel Product Only
TA = -55°C to +125°C, 4.5 V ≤ VCC ≤ 20 V, 2 mA ≤ IF (ON) ≤ 8 mA, 0 V ≤ VF(OFF) ≤ 0.8 V, 2.0 V
≤ VEH ≤ 20 V, 0 V ≤ VEL ≤ 0.8 V, unless otherwise specified.
Group A[11]
Subgroups Min. Typ.* Max. Units Fig. Notes
Limits
Parameter
Sym.
Test Conditions
High Impedance State IOZL VO = 0.4 V VEN = 2 V,
1, 2, 3
-20
µA
Output Current
VF = 0 V
VEN = 2 V,
IF = 8 mA
VO = 2.4 V
IOZH VO = 5.5 V
VO = 20 V
20
µA
1, 2, 3
100
500
Logic High Enable
Voltage
VEH
1, 2, 3
1, 2, 3
2.0
V
V
Logic Low Enable
Voltage
VEL
0.8
Logic High Enable
Current
VEN = 2.7 V
20
µA
IEH
VEN = 5.5 V
1, 2, 3
1, 2, 3
100
VEN = 20 V
0.004
250
Logic Low Enable
Current
IEL
VEN = 0.4 V
-0.32 mA
*All typical values are at VCC = 5 V, TA = 25°C, IF(ON) = 5 mA unless otherwise specified.
Typical Characteristics
All typical values are at TA = 25°C, VCC = 5 V, IF(ON) = 5 mA unless otherwise specified.
Parameter
Symbol Typ.
Units
Test Conditions
Fig. Notes
Input Current Hysteresis
IHYS
0.07
mA
VCC = 5 V
3
2
∆VF
Input Diode Temperature Coefficient
––––
-1.25 mV/°C IF = 8 mA
2
∆TA
RI-O
CI-O
CIN
tr
Resistance (Input-Output)
Capacitance (Input-Output)
Input Capacitance
1013
2.0
20
Ω
pF
pF
ns
ns
V
I-O = 500 Vdc
2, 8
2, 8
2, 10
2
f = 1 MHz
VF = 0 V, f = 1 MHz
Output Rise Time (10-90%)
Output Fall Time (90-10%)
45
5, 7
5, 7
tf
10
2
8
Typical Characteristics (cont’d.)
All typical values are at T = 25°C, VCC = 5 V, IF(ON) = 5 mA, unless otherwise specified.
A
Single Channel Product Only
Parameter
Symbol Typ.
Units
Test Conditions
Fig. Notes
Output Enable Time to Logic High
tPZH
tPZL
tPHZ
tPLZ
30
30
45
55
ns
8
Output Enable Time to Logic Low
Output Disable Time from Logic High
Output Disable Time from Logic Low
ns
ns
ns
8
8
8
Dual and Quad Channel Products Only
RH = 45%, TA = 25°C,
Input-Input Insulation Leakage Current
II-I
0.5
nA
V
I-I = 500 V, t = 5 s
9
9
9
Resistance (Input-Input)
RI-I
1013
Ω
VI-I = 500 V
f = 1 MH
Capacitance (Input-Input)
CI-I
1.5
pF
Notes:
1. Peak Forward Input Current pulse width < 50 µs at 1 KHz maximum repetition rate.
2. Each channel of a multichannel device.
3. Duration of output short circuit time not to exceed 10 ms.
4. All devices are considered two-terminal devices: measured between all input leads or terminals shorted together and all output leads
or terminals shorted together.
5. This is a momentary withstand test, not an operating condition.
6. CML is the maximum rate of rise of the common mode voltage that can be sustained with the output voltage in the logic low state (VO
< 0.8 V). CM is the maximum rate of fall of the common mode voltage that can be sustained with the output voltage in the logic
high state (V H> 2.0 V).
7. tPHL propagatOion delay is measured from the 50% point on the leading edge of the input pulse to the 1.3 V point on the leading edge
of the output pulse. The t propagation delay is measured from the 50% point on the trailing edge of the input pulse to the 1.3 V
point on the trailing edgePoLHf the output pulse.
8. Measured between each input pair shorted together and all output connections for that channel shorted together.
9. Measured between adjacent input pairs shorted together for each multichannel device.
10. Zero-bias capacitance measured between the LED anode and cathode.
11. Standard parts receive 100% testing at 25°C (Subgroups 1 and 9). SMD, Class H and Class K parts receive 100% testing at 25, 125,
and –55°C (Subgroups 1 and 9, 2 and 10, 3 and 11, respectively).
12. Parameters are tested as part of device initial characterization and after design and process changes. Parameters guaranteed to limits
specified for all lots not specifically tested.
Figure 1. Typical Logic Low Output
Voltage vs. Temperature.
Figure 2. Typical Logic High Output
Current vs. Temperature.
9
Figure 3. Output Voltage vs. Forward
Input Current.
Figure 4. Typical Diode Input Forward
Characteristic.
V
CC
PULSE GEN.
= t 5 ns
t = 100 kHz
10 % DUTY
CYCLE
OUTPUT V
MONITORING
NODE
O
t
=
r
f
5 V
D.U.T.
V
CC
619 Ω
D
1
I
F
V
O
INPUT
MONITORING
NODE
D
D
D
2
3
4
C =
L
15 pF
V
E
GND
5 K
R
f
THE PROBE AND JIG CAPACITANCES
ARE INCLUDED IN C
.
L
Figure 5. Test Circuit for tPLH, tPHL, tr, and tf.
Figure 6. Typical Propagation Delay
vs. Temperature.
Figure 7. Typical Rise, Fall Time vs.
Temperature.
10
C
= 15 pF INCLUDING PROBE
L
AND JIG CAPACITANCE.
PULSE
GENERATOR
+5 V
V
CC
Z
= 50 Ω
O
t
= t = 5 ns
r
f
V
O
S1
619 Ω
D.U.T.
D1-4 ARE 1N916 OR 1N3064
V
CC
D
1
V
O
I
F
D
D
D
2
3
4
C
L
V
E
GND
5 KΩ
INPUT V
MONITORING
NODE
O
S2
Figure 8. Test Circuit for tPHZ, tPZH, tPLZ, and tPZL
.
A
V
CC
D.U.T.
B
OUTPUT V
MONITORING
NODE
O
V
CC
R
IN
V
O
0.1 µF
BYPASS
V
E
V
FF
GND
*SEE NOTE 6.
V
CM
+
–
PULSE GEN.
Figure 9. Test Circuit for Common Mode Transient Immunity and Typical Waveforms.
V
CC1
(+5 V)
V
CC2
(4.5 TO 20 V)
665 Ω
D.U.T.
V
CC
R
DATA
OUTPUT
V
L
CC1
(+5 V)
V
O
DATA
INPUT
CMOS
750 Ω
TTL OR
LSTTL
D.U.T.
V
E
V
CC
GND
DATA
INPUT
TTL OR
LSTTL
TOTEM
POLE
V
R
L
CC2
OUTPUT
GATE
5 V
1.1 K
1
2
TOTEM
POLE
OUTPUT
GATE
10 V
15 V
20 V
2.37 K
3.83 K
5.11 K
GND
Figure 10. LSTTL to CMOS Interface Circuit.
Figure 11. Recommended LED Drive Circuit.
11
V
CC1
(+5 V)
619 Ω
D.U.T.
V
CC
4.02 KΩ
DATA
INPUT
TTL OR
LSTTL
GND
OPEN
COLLECTOR
GATE
Figure 12. Series LED Drive with Open Collector Gate
(4.02 kΩ Resistor Shunts IOH from the LED).
V
CC2
(+5 V)
DATA
OUTPUT
V
CC1
(+5 V)
UP TO 16 LSTTL
LOADS
665 Ω
665 Ω
D.U.T.
OR 4 TTL LOADS
V
CC
0.1
µF
DATA
INPUT
TTL OR
LSTTL
DATA
OUTPUT
DATA
INPUT
TTL OR
LSTTL
TOTEM
POLE
GND
OUTPUT
GATE
1
TOTEM
POLE
OUTPUT
GATE
UP TO 16 LSTTL
LOADS
OR 4 TTL LOADS
1
2
Figure 13. Recommended LSTTL to LSTTL Circuit.
V
+ 20 V
CC
D.U.T.*
V
CC
I
F
I
O
0.01 µF
+
–
1200 Ω
V
E
V
IN
1.90 V
100 Ω
GND
CONDITIONS: I = 8 mA
F
I
= -14 mA
O
T
= +125 °C
A
*ALL CHANNELS TESTED SIMULTANEOUSLY.
Figure 14. Single Channel Operating Circuit for Burn-in and Steady State Life Tests.
MIL-PRF-38534 Class H,
Class K, and DSCC SMD
Test Program
Agilent’s Hi-Rel Optocouplers are
in compliance with MIL-PRF-
38534 Classes H and K. Class H
and Class K devices are also in
compliance with DSCC drawings
5962-88768 and
5962-88769.
Testing consists of 100% screen-
ing and quality conformance
inspection to MIL-PRF-38534.
www.semiconductor.agilent.com
Data subject to change.
Copyright © 1999 Agilent Technologies, Inc.
Obsoletes 5967-6330E
5980-0280E (10/00)
相关型号：
5962-8876901XX
Logic IC Output Optocoupler, 2-Element, 1500V Isolation, 5MBps, HERMETIC SEALED, CERAMIC, DIP-8
AGILENT
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