HI-3184PSTF-N [HOLTIC]
ARINC 429 Differential Line Driver; ARINC- 429差分线路驱动器
| 型号： | HI-3184PSTF-N |
| 厂家： | 
HOLT INTEGRATED CIRCUITS |
| 描述： | ARINC 429 Differential Line Driver |
| 文件： | 总7页 (文件大小：76K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HI-3182PSx-N, HI-3184PSx-N
HI-3185PSx-N
ARINC 429 Differential Line Driver
May 2008
GENERAL DESCRIPTION
PIN CONFIGURATION (Top View)
The HI-3182, HI-3184 and HI-3185 bus interface products are
silicon gate CMOS devices designed as a line driver in accor-
dance with the ARINC 429 bus specifications. In addition to
being functional upgrades of Holt's HI-8382 product, they are
also alternate sources for a variety of similar line driver products
from other manufacturers.
VREF
N/C (See Note)
SYNC
1
2
3
4
5
6
7
14 V1
13 CLOCK
12 DATA (B)
11 CB
DATA (A)
CA
Inputs are provided for clocking and synchronization. These
signals are AND'd with the DATA inputs to enhance system
performance and allow the HI-318X series of products to be
used in a variety of applications. Both logic and synchronization
inputs feature built-in 2,000V minimum ESD input protection as
well asTTLand CMOS compatibility.
10 BOUT
AOUT
9
8
+V
-V
GND
HI-3184PSx-N & HI-3185PSx-N
14-PIN PLASTIC NARROW SMALL OUTLINE (SOIC)
Note: Pin 2 not internally connected
The differential outputs of the HI-318X series of products are
programmable to either the high speed or low speedARINC 429
output rise and fall time specifications through the use of two
external capacitors. The output voltage swing is also adjustable
by the application of an external voltage to the VREF input. A
37.5 ohm resistor is in series with each ARINC output. In
addition the HI-3182 and HI-3184 products also have a fuse in
series with each output.
(See Page 5 for HI-3182PSx-N package pin configurations)
The HI-318X series of line drivers are intended for use where
logic signals must be converted to ARINC 429 levels such as
when using an ASIC, the HI-8584/HI-3282/HI-8282A
ARINC 429 Serial Transmitter/Dual Receivers, the HI-6010
ARINC 429 Transmitter/Receiver or the HI-8783 ARINC
Interface Device. Holt products are readily available for both
industrial and military applications. Please contact the Holt
Sales Department for additional information.
FUNCTION
+
_
ARINC 429 DIFFERENTIAL LINE DRIVER
FEATURES
!
!
!
!
!
!
!
Low power CMOS
TTL and CMOS compatible inputs
Programmable output voltage swing
Adjustable ARINC rise and fall times
Operates at data rates up to 100 Kbits
Overvoltage protection
TRUTH TABLE
SYNC CLOCK DATA(A) DATA(B) AOUT BOUT COMMENTS
X
L
L
X
H
H
H
H
X
X
L
X
X
L
0V
0V
0V
0V
0V
0V
NULL
NULL
NULL
LOW
HIGH
NULL
Industrial and Military temperature ranges
H
H
H
H
L
H
L
-VREF +VREF
+VREF -VREF
H
H
H
0V
0V
HOLT INTEGRATED CIRCUITS
www.holtic.com
(DS3182N Rev. C)
05/08
HI-3182PSx-N, HI-3184PSx-N, HI-3185PSx-N
FUNCTIONAL DESCRIPTION
The Vref pin has an internal pull-up resistor to V+, allowing the
use of a simple external zener diode to set the reference
voltage.
The SYNC and CLOCK inputs establish data synchronization
utilizing two AND gates, one for each data input (figure 2).
Each logic input isTTL/CMOS compatible.
POWER SUPPLY SEQUENCING
Figure 1 illustrates a typical ARINC 429 bus application.
Three power supplies are necessary to operate the HI-318X;
typically +15V, -15V and +5V. The chip also works with 12V
supplies. The +5V supply can also provide a reference
voltage that determines the output voltage swing. The
differential output voltage swing will equal 2VREF. If a value of
VREF other than +5V is needed, a separate +5V power supply
is required for pin V1.
The power supplies should be controlled to prevent large
currents during supply turn-on and turn-off. The
recommended sequence is +V followed by V1, always
ensuring that +V is the most positive supply. The -V supply is
not critical and can be asserted at any time.
With the DATA(A) input at a logic high and DATA(B) input at a
logic low, AOUT will switch to the +VREF rail and BOUT will
switch to the -VREF rail (ARINC HIGH state). With both data
input signals at a logic low state, the outputs will both switch to
0V (ARINC NULLstate).
+5V
+15V
The driver output impedance, ROUT, is nominally 75 ohms.
The rise and fall times of the outputs can be calibrated through
the selection of two external capacitor values that are
connected to the CA and CB input pins. Typical values for
high-speed operation (100KBPS) are CA = CB = 75pF and for
low-speed operation (12.5 to 14KBPS) CA = CB = 500pF.
V
REF
A
OUT
V
1
SYNC
CLOCK
DATA (A)
INPUTS
DATA (B)
+V
-V
TO ARINC BUS
GND
C
B
C
A
B
OUT
The CA and CB pins swing between +5V and ground allowing
the switching of capacitor values with an external single-
supply analog switch.
The ARINC outputs of the HI-3182 and HI-3184 are protected
by internal fuses capable of sinking between 800 - 900 mA for
short periods of time (125ms).
-15V
Figure 1. ARINC 429 BUS APPLICATION
A
+V
V
REF
C
A
OUT
DATA (A)
CLOCK
SYNC
LEVEL SHIFTER
AND SLOPE
CONTROL (A)
13W
24.5W
FA
OUTPUT
DRIVER (A)
CL
RL
LEVEL SHIFTER
AND SLOPE
CONTROL (B)
24.5W
13W
FB
DATA (B)
OUTPUT
DRIVER (B)
CURRENT
REGULATOR
Shorted on
HI-3185PSx-N
V1
B
-V
GND
C
B
OUT
Figure 2. FUNCTIONAL BLOCK DIAGRAM
HOLT INTEGRATED CIRCUITS
2
HI-3182PSx-N, HI-3184PSx-N, HI-3185PSx-N
PIN DESCRIPTIONS
SYMBOL
FUNCTION
ANALOG
INPUT
DESCRIPTION
VREF
SYNC
DATA (A)
CA
Ref. voltage used to determine output voltage swing. Pin sources current to allow use of a zener reference.
Synchronizes data inputs
Data input terminal A
Connection for DATA (A) slew-rate capacitor
ARINC output terminal A
-12V to -15V
INPUT
INPUT
AOUT
-V
OUTPUT
POWER
POWER
POWER
OUTPUT
INPUT
GND
+V
0.0V
+12V to +15V
BOUT
CB
ARINC output terminal B
Connection for DATA (B) slew-rate capacitor
Data input terminal B
Synchronizes data inputs
+5V 5ꢀ
DATA (B)
CLOCK
V1
INPUT
INPUT
POWER
ABSOLUTE MAXIMUM RATINGS
All Voltages referenced to GND, TA = Operating Temperature Range (unless otherwise specified)
PARAMETER
Differential Voltage
Supply Voltage
SYMBOL
CONDITIONS
OPERATING RANGE
MAXIMUM
UNIT
VDIF
Voltage between +V and -V terminals
40
V
+V
-V
V1
+10.8 to +16.5
-10.8 to -16.5
+5 5ꢀ
V
V
V
+7
Voltage Reference
VREF
For ARINC 429
For Applications other than ARINC
+5 5ꢀ
1.5 to 6
6
6
V
V
Input Voltage Range
VIN
> GND -0.3
< V1 +0.3
V
V
Output Short-Circuit Duration
Output Overvoltage Protection
Operating Temperature Range
See Note: 1
See Note: 2
TA
High-temp & Military
Industrial
-55 to +125
-40 to +85
°C
°C
Storage Temperature Range
TSTG
Ceramic & Plastic
-65 to +150
°C
Lead Temperature
Soldering, 10 seconds
+275
+175
°C
°C
Junction Temperature
TJ
Note 1. Heatsinking may be required for continuous Output Short Circuit operation at +125°C and for 100KBPS (high speed) data rate
operation at +125°C. Under either of these conditions the HI-318xPSx product with the Enhanced SOIC (ESOIC) package should
be selected (see Data Sheet for HI-3182PSx, HI-3184PSx and HI-3185PSx).
Note 2. The fuses used for Output Overvoltage Protection may be blown by the presence of a voltage at either output that is greater
than 12.0V with respect to GND. (HI-3182PSx-N and HI-3184PSx-N only)
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings
only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
HOLT INTEGRATED CIRCUITS
3
HI-3182PSx-N, HI-3184PSx-N, HI-3185PSx-N
DC ELECTRICAL CHARACTERISTICS
+V = +15V, -V = -15V, V1 = VREF = +5.0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
Supply Current +V (Operating)
SYMBOL
CONDITION
(0 - 100KBPS)
MIN TYP MAX UNITS
ICCOP (+V)
ICCOP (-V)
ICCOP (V1)
No Load
No Load
No Load
+16
mA
mA
µA
mA
mA
mA
mA
mA
µA
µA
V
Supply Current -V (Operating)
(0 - 100KBPS)
(0 - 100KBPS)
-16
-1.0
-150
+80
Supply Current V1 (Operating)
Reference Pin Current VREF (Operating)
Supply Current +V (During Short Circuit Test)
Supply Current -V (During Short Circuit Test)
Output Short Circuit Current (Output High)
Output Short Circuit Current (Output Low)
Input Current (Input High)
500
-0.15
150
ICCOP (VREF) No Load, VREF = 5V (0 - 100KBPS)
-0.4
ISC (+V)
ISC (-V)
IOHSC
IOLSC
IIH
Short to Ground (See Note: 1)
Short to Ground (See Note: 1)
Short to Ground VMIN=0 (See Note: 2)
Short to Ground VMIN=0 (See Note: 2)
-80
1.0
Input Current (Input Low)
IIL
-1.0
2.0
Input Voltage High
VIH
Input Voltage Low
VIL
0.5
V
Output Voltage High (Output to Ground)
VOH
No Load
No Load
(0 -100KBPS)
(0 -100KBPS)
(0-100KBPS)
+VREF
-.25
+VREF
+.25
V
Output Voltage Low (Output to Ground)
VOL
-VREF
-.25
-VREF
+.25
V
Output Voltage Null
Input Capacitance
VNULL
CIN
No Load
-250
+250
mV
pF
See Note 1
15
Note 1. Not tested, but characterized at initial device design and after major process and/or design change which affects this parameter.
Note 2. Interchangeability of force and sense is acceptable.
AC ELECTRICAL CHARACTERISTICS
+V = +15V, -V = -15V, V1 = VREF = +5.0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
Rise Time (AOUT, BOUT)
SYMBOL
tR
CONDITION
MIN TYP MAX UNITS
CA = CB = 75pF
See Figure 3.
See Figure 3.
See Figure 3.
See Figure 3.
1.0
1.0
2.0
2.0
3.0
3.0
µs
µs
µs
µs
Fall Time (AOUT, BOUT)
tF
CA = CB = 75pF
CA = CB = 75pF
CA = CB = 75pF
Propagtion Delay Input to Output
Propagtion Delay Input to Output
tPLH
tPHL
2.0V
50ꢀ
0.5V
2.0V
0.5V
DATA (A) 0V
50ꢀ
DATA (B) 0V
ADJUST
BY CA
VREF
+4.75V to +5.25V
AOUT 0V
ADJUST
BY CA
-VREF
+VREF
-4.75V to -5.25V
+4.75V to +5.25V
ADJUST
BY CB
tPHL
50ꢀ
tPLH
BOUT 0V
ADJUST
BY CB
50ꢀ
-4.75V to -5.25V
+9.5V to +10.5V
-VREF
HIGH
2VREF
tR
NULL
LOW
DIFFERENTIAL
OUTPUT 0V
(AOUT - BOUT)
-9.5V to -10.5V
-2VREF
tF
NOTE: OUTPUTS UNLOADED
Figure 3. SWITCHING WAVEFORMS
HOLT INTEGRATED CIRCUITS
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HI-3182PSx-N, HI-3184PSx-N, HI-3185PSx-N
ADDITIONAL PIN CONFIGURATIONS (See page 1 for 14-Pin Narrow Small Outline SOIC)
HI-3182PSx-N
VREF - 1
GND (See Note) - 2
SYNC - 3
16 - V1
15 - N/C
14 - CLOCK
13 - DATA(B)
12 - CB
DATA(A) - 4
CA - 5
AOUT - 6
11 - BOUT
10 - N/C
9 - +V
-V - 7
GND - 8
Note: Pin 2 may be left floating
16 - PIN PLASTIC WIDE SMALL OUTLINE (SOIC)
ORDERING INFORMATION
HI - 318xPS x x - N
PART PACKAGE
NUMBER DESCRIPTION
Blank
F
Tin / Lead (Sn / Pb) Solder
100ꢀ Matte Tin (Pb-free RoHS compliant)
PART TEMPERATURE
NUMBER RANGE
BURN
IN
FLOW
I
-40°C TO +85°C
I
No
No
T
-55°C TO +125°C
T
OUTPUT SERIES
PART PACKAGE
NUMBER DESCRIPTION
RESISTANCE FUSE
3182PS
3184PS
3185PS
16 PIN PLASTIC WIDE SMALL OUTLINE SOIC (16HW)
14 PIN PLASTIC NARROW SMALL OUTLINE SOIC (14HN)
14 PIN PLASTIC NARROW SMALL OUTLINE SOIC (14HN)
37.5 Ohms
37.5 Ohms
37.5 Ohms
Yes
Yes
No
HOLT INTEGRATED CIRCUITS
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HI-3182PSx-N, HI-3184PSx-N, HI-3185PSx-N
REVISION HISTORY
Revision
Date
Page Description of Change
DS3182N, Rev. C 05/01/08
1
Date was “March 2007”, is “May 2008”. Footer was “Rev. B”, is “Rev. C” and was
“03/07”, is “05/08”
1
1
Added “HI-3184PSx-N” to the document title and in the Pin Configuration.
“HI-3182” in first sentence of the first paragraph of the GENERAL DESCRIPTION
changed to “HI-3182, HI-3184”.
1
“HI-3182 product also has” in the last sentence of the third paragraph of the
GENERAL DESCRIPTION changed to “and HI-3184 products also have”.
2 - 5 “HI-3182PSx-N” added to header.
2
“HI-3182,” in the sixth paragraph of the FUNCTIONAL DESCRIPTION changed
to “HI-3182 and HI-3184”.
3
Clarified Note 1 to read ”Heatsinking may be required for continuous Output
Short Circuit operation at +125°C and for 100KBPS (high speed) data rate
operation at +125°C. Under either of these conditions the HI-318xPSx product
with the Enhanced SOIC (ESOIC) package should be selected (see Data
Sheet for HI-3182PSx, HI-3184PSx and HI-3185PSx).”
3
5
6
7
“HI-3182” in Note 2. changed to “HI-3182PSx-N and HI-3184PSx-N”.
Added “HI-3184PS” to ORDERING INFORMATION table.
Added “REVISION HISTORY” table.
Renumbered old page”6” as “7”.
HOLT INTEGRATED CIRCUITS
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HI-318xPSx-N PACKAGE DIMENSIONS
14-PIN PLASTIC SMALL OUTLINE (SOIC) - NB
(Narrow Body)
inches (millimeters)
Package Type: 14HN
.0087 .001
(.221 .029)
.341 .004
(8.65 .10)
.236 .008
(5.99 .20)
.153 .003
(3.87 .06)
Top View
See Detail A
.0165 .003
(.419 .089)
.055 .005
(1.397 .13)
.050
(1.27)
BSC
0° to 8°
.007 .003
(.175 .07)
.033 .017
(.838 .43)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
Detail A
16-PIN PLASTIC SMALL OUTLINE (SOIC) - WB
(Wide Body)
inches (millimeters)
Package Type: 16HW
.0105 .0015
(.2667 .0381)
.405 .008
(10.287 .203)
.4065 .0125
(10.325 .318)
.295 .004
(7.493 .102)
Top View
Detail A
.090 .010
(2.286 .254)
.050
(1.27)
.0165 .0035
(.4191 .0889)
BSC
0° to 8°
.0025 .0015
(.0635 .04)
.033 .017
(.838 .43)
BSC = “Basic Spacing between Centers”
is theoretical true position dimension and
has no tolerance. (JEDEC Standard 95)
Detail A
HOLT INTEGRATED CIRCUITS
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