HD74ACT112T [HITACHI]
J-K Flip-Flop, ACT Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, TTP-16DA;型号: | HD74ACT112T |
厂家: | HITACHI SEMICONDUCTOR |
描述: | J-K Flip-Flop, ACT Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, CMOS, PDSO16, TTP-16DA 光电二极管 逻辑集成电路 触发器 |
文件: | 总8页 (文件大小:56K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
HD74AC112/HD74ACT112
Dual JK Negative Edge-Triggered Flip-Flop
ADE-205-364 (Z)
1st. Edition
Sep. 2000
Description
The HD74AC112/HD74ACT112 features individual J, K, Clock and asynchronous Set and Clear inputs to
each flip-flop. When the clock goes High, the inputs are enabled and data will be accepted. The logic level
of the J and K inputs may change when the clock is High and the bistable will perform according to the
Truth Table as long as minimum setup and hold times are observed. Input data is transferred to the outputs
on the falling edge of the clock pulse.
Features
•
•
Outputs Source/Sink 24 mA
HD74ACT112 has TTL-Compatible Inputs
Pin Arrangement
CP1
K1
1
2
3
4
5
6
7
8
16 VCC
15 CD1
14 CD2
13 CP2
12 K2
J1
SD1
Q1
Q1
11 J2
Q2
10 SD2
9 Q2
GND
(Top view)
HD74AC112/HD74ACT112
Logic Symbol
4
10
SD1
SD2
11
3
1
2
J1
Q1
Q1
J2
Q2
Q2
5
6
9
7
CP1
CP2
13
12
K1
K2
CD1
15
CD2
14
VCC = Pin16
GND = Pin8
Pin Names
J1, J2, K1, K2
CP1, CP2
CD1, CD2
Data Inputs
Clock Pulse Inputs (Active Falling Edge)
Direct Clear Inputs (Active Low)
Direct Set Inputs (Active Low)
SD1, SD2
Q1, Q2, Q1, Q2 Outputs
Asynchronous Inputs:
Low input to SD sets Q to High level
Low input to CD sets Q to Low level
Clear and Set are independent of clock
Simultaneous Low on CD and SD makes both Q and Q High
2
HD74AC112/HD74ACT112
Truth Table
Inputs
Outputs
@tn
J
@tn + 1
Q
K
L
L
Qn
L
L
H
L
H
H
H
H
Qn
tn
:
:
:
:
Bit time before clock pulse.
tn + 1
H
Bit time after clock pulse.
High Voltage Level
Low Voltage Level
L
Logic Diagram
SD
Q
CD
J
#CP
CP
Q
K
CP
#
CP
CP
CP
#
#
CP
CP
CP
CP
#
CP
DC Characteristics (unless otherwise specified)
Item
Symbol Max
Unit
Condition
Maximum quiescent supply current
ICC
ICC
ICCT
40
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = Worst case
Maximum quiescent supply current
4.0
1.5
µA
VIN = VCC or ground, VCC = 5.5 V,
Ta = 25°C
Maximum additional ICC/input
(HD74ACT112)
mA
VIN = VCC – 2.1 V, VCC = 5.5 V
Ta = Worst case
3
HD74AC112/HD74ACT112
AC Characteristics: HD74AC112
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
125
150
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ
Max
—
Min
100
125
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Max
—
Unit
Maximum clock
frequency
fmax
tPLH
tPHL
tPLH
tPHL
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
—
MHz
—
—
—
Propagation delay
CP to Q or Q
11.0
8.5
11.0
8.5
9.5
7.0
11.5
9.0
14.0
11.0
14.0
11.0
12.5
9.5
15.0
12.0
15.0
12.0
13.5
10.5
15.5
12.5
ns
Propagation delay
CP to Q or Q
Propagation delay
CD, SD to Q or Q
Propagation delay
CD, SD to Q or Q
14.5
11.0
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements: HD74AC112
Ta = –40°C
to +85°C
Ta = +25°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1 Typ
Guaranteed Minimum
Unit
ns
Setup time
J or K to CP
Hold time
tsu
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.0
2.0
–1.5
–0.5
2.0
2.0
1.5
1.0
5.5
4.5
0.0
0.0
5.5
4.5
3.5
3.0
6.0
4.5
0.0
0.0
7.0
5.0
3.5
3.0
th
CP to J or K
Pulse width
CP or CD or SD
Recovery time
CD or SD to CP
tw
trec
Note: 1. Voltage Range 3.3 is 3.3 V ± 0.3 V
Voltage Range 5.0 is 5.0 V ± 0.5 V
4
HD74AC112/HD74ACT112
AC Characteristics: HD74ACT112
Ta = +25°C
Ta = –40°C to +85°C
CL = 50 pF
CL = 50 pF
Item
Symbol VCC (V)*1
Min
Typ
Max
Min
Max
Unit
Maximum clock
frequency
fmax
tPLH
tPHL
tPLH
tPHL
5.0
5.0
5.0
5.0
5.0
100
—
—
80
—
MHz
Propagation delay
CP to Q or Q
1.0
1.0
1.0
1.0
10.5
10.5
8.0
13.0
13.0
10.0
12.5
1.0
1.0
1.0
1.0
14.0
14.0
11.0
13.5
ns
Propagation delay
CP to Q or Q
Propagation delay
CD, SD to Q or Q
Propagation delay
10.5
CD, SD to Q or Q
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
AC Operating Requirements: HD74ACT112
Ta = –40°C
to +85°C
CL = 50 pF
Ta = +25°C
CL = 50 pF
Item
Symbol VCC (V)*1 Typ
Guaranteed Minimum
Unit
ns
Setup time
J or K to CP
tsu
5.0
5.0
5.0
5.0
2.5
0.0
4.5
–2.5
7.0
1.5
7.0
3.0
8.0
1.5
8.0
3.0
Hold time
CP to J or K
th
Pulse width
CP or CD or SD
tw
Recovery time
trec
CD , SD to CP
Note: 1. Voltage Range 5.0 is 5.0 V ± 0.5 V
Capacitance
Item
Symbol
CIN
Typ
4.5
Unit
pF
Condition
VCC = 5.5 V
VCC = 5.0 V
Input capacitance
Power dissipation capacitance
CPD
35.0
pF
5
HD74AC112/HD74ACT112
Package Dimensions
Unit: mm
19.20
20.00 Max
16
9
8
1
1.3
1.11 Max
7.62
+ 0.13
– 0.05
0.25
2.54 ± 0.25
0.48 ± 0.10
0° – 15°
Hitachi Code
DP-16
JEDEC
EIAJ
Mass (reference value)
Conforms
Conforms
1.07 g
Unit: mm
10.06
10.5 Max
9
8
16
1
+ 0.20
7.80
– 0.30
0.80 Max
1.15
0° – 8°
1.27
0.70 ± 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
M
0.12
Hitachi Code
JEDEC
FP-16DA
—
EIAJ
Conforms
0.24 g
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
6
HD74AC112/HD74ACT112
Unit: mm
9.9
10.3 Max
9
16
1
8
1.27
+ 0.10
6.10
– 0.30
1.08
0.635 Max
0° – 8°
+ 0.67
0.60
– 0.20
*0.42 ± 0.08
0.40 ± 0.06
0.15
0.25
M
Hitachi Code
JEDEC
EIAJ
FP-16DN
Conforms
Conforms
0.15 g
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
Unit: mm
5.00
5.30 Max
16
9
1
8
0.65
0.13 M
0.65 Max
1.0
+ 0.08
– 0.07
*0.22
0.20 ± 0.06
6.40 ± 0.20
0° – 8°
0.50 ± 0.10
0.10
Hitachi Code
JEDEC
TTP-16DA
—
EIAJ
—
0.05 g
*Dimension including the plating thickness
Base material dimension
Mass (reference value)
7
HD74AC112/HD74ACT112
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as fail-
safes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica
Europe
Asia
: http://semiconductor.hitachi.com/
: http://www.hitachi-eu.com/hel/ecg
: http://sicapac.hitachi-asia.com
Japan
: http://www.hitachi.co.jp/Sicd/indx.htm
For further information write to:
Hitachi Semiconductor
(America) Inc.
179 East Tasman Drive, Dornacher Straβe 3
Hitachi Europe GmbH
Electronic Components Group
Hitachi Asia Ltd.
Hitachi Tower
16 Collyer Quay #20-00,
Singapore 049318
Hitachi Asia (Hong Kong) Ltd.
Group III (Electronic Components)
7/F., North Tower,
San Jose,CA 95134
D-85622 Feldkirchen, Munich
World Finance Centre,
Tel: <1> (408) 433-1990 Germany
Fax: <1>(408) 433-0223 Tel: <49> (89) 9 9180-0
Fax: <49> (89) 9 29 30 00
Tel : <65>-538-6533/538-8577
Fax : <65>-538-6933/538-3877
URL : http://www.hitachi.com.sg
Harbour City, Canton Road
Tsim Sha Tsui, Kowloon,
Hong Kong
Tel : <852>-(2)-735-9218
Fax : <852>-(2)-730-0281
URL : http://www.hitachi.com.hk
Hitachi Europe Ltd.
Electronic Components Group.
Whitebrook Park
Lower Cookham Road
Maidenhead
Hitachi Asia Ltd.
(Taipei Branch Office)
4/F, No. 167, Tun Hwa North Road,
Hung-Kuo Building,
Taipei (105), Taiwan
Berkshire SL6 8YA, United Kingdom
Tel: <44> (1628) 585000
Fax: <44> (1628) 585160
Tel : <886>-(2)-2718-3666
Fax : <886>-(2)-2718-8180
Telex : 23222 HAS-TP
URL : http://www.hitachi.com.tw
Copyright Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
Colophon 2.0
8
相关型号:
HD74ACT112T-EL
ACT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16, TTP-16DA
RENESAS
©2020 ICPDF网 联系我们和版权申明