S10201-04M-01 [HAMAMATSU]
CCD Sensor,;
| 型号： | S10201-04M-01 |
| 厂家： | 
HAMAMATSU CORPORATION |
| 描述： | CCD Sensor, CD 传感器 换能器 |
| 文件： | 总14页 (文件大小：858K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TDI-CCD image sensors
S10200-02-01 S10201-04-01 S10202-08-01 S10202-16-01
Operating the back-thinned CCD in TDI mode
delivers high sensitivity.
TDI-CCD image sensers capture clear and bright images even under low-light-level conditions. During TDI (time delay integra-
tion) mode, the CCD captures an image of a moving object while transferring integrated signal charges synchronously with
the object movement. This operation mode dramatically boosts sensitivity to high levels even when capturing fast moving
objects. Our new TDI-CCD uses the back-thinned structure to achieve even higher quantum efficiency over a wide spectral
range from UV to near IR region (200 to 1100 nm).
Features
Applications
TDI mode gives high sensitivity
Sequential imaging of high-speed moving samples
Inspection tasks on electronic parts production line
Semiconductor inspection
High-speed, continuous image acquisition
Back-thinned structure ensures high sensitivity from UV to near IR
Multiple ports for high-speed line rate
Low noise
Flow cytometery
TDI mode
In FFT-CCD, signal charges in each line are vertically transferred during charge readout. TDI mode synchronizes this vertical
transfer timing with the movement of the object, so that signal charges are integrated a number of times equal to the number
of vertical stages of the CCD pixels. In the TDI mode, the signal charges must be transferred in the same direction at the same
speed as those of the object to be imaged. These speeds are expressed by the following equation:
v = f × d
v: object moving speed, charge transfer speed, f: vertical transfer frequency, d: pixel size
In the right figure, when the first stage charges are transferred
Schematic diagram showing integrated
to the second stage, an additional charges are produced in the
second stage by photoelectric conversion and accumulated.
When this operation is continuously repeated until reaching
the last stage M (the number of vertical stages), signal charg-
es which are M times greater than the initial charges are accu-
mulated. Since the signal charges on each line are output from
the CCD horizontal shift register, a two-dimensional image can
be continuously acquired. In this way the TDI mode achieves
sensitivity which is M times higher than linear image sensors
exposure by TDI mode
Time1
Time2
Time3
First stage
·
·
·
·
·
Last stage M
KMPDC0139EA
(S/N is improved M times). The TDI mode also improves
sensitivity variations compared to frame mode operation.
Selection guide
Number of
total pixels
(H × V)
1040 × 128
2080 × 128
4160 × 128
4224 × 128
Number of
effective pixels
(H × V)
1024 × 128
2048 × 128
4096 × 128
4096 × 128
1
Number of
ports
Pixel rate
(MHz/port)
Line rate
(kHz)
Vertical
transfer
Applicable
camera
*
Type no.
2 3
S10200-02-01
S10201-04-01
S10202-08-01
S10202-16-01
2
4
8
-
* *
2 3
50
C10000-801
* *
30
Bi-directional
-
-
16
100
1: The C10000 series cameras are products manufactured by Hamamatsu Photonics, System Division (refer to page 14).
2: Temporary window type (S10200-02N-01, S10201-04N-01) is also available upon request.
3: Light-shield mask type (S10200-02M-01, S10201-04M-01) for horizontal register shielding is also available upon request [see device
structure (P.7)]. The light-shield mask’s aperture size in the vertical direction is 96 pixels. The effect of the light-shield mask may
vary depending on the wavelength of the light source in use and the incident angle of light.
*
*
*
1
www.hamamatsu.com
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Structure
Parameter
Specification
Pixel size (H × V)
TDI stage
12 × 12 μm
128
FW × 100 (min.)
3 phases
Anti-blooming
Vertical clock
Horizontal clock
Output circuit
Package
2 phases
Three-stage MOSFET source follower
Ceramic DIP (refer to dimensional outlines)
4
Window
Quartz glass
*
4: Resin sealing
*
Absolute maximum ratings (Ta=25 °C)
Parameter
Symbol
Topr
Tstg
VOD
VRD
VOFD
VOFG
VSG
VOG
Min.
-50
-50
-0.5
-0.5
-0.5
-10
-10
-10
-10
-10
-8
Typ.
Max.
60
70
25
18
18
15
15
15
15
15
+8
15
Unit
°C
°C
V
V
V
V
V
V
V
5
6 7
Operating temperature
* * *
-
-
-
-
-
-
-
-
-
-
-
-
7
Storage temperature
*
Output transistor drain voltage
Reset drain voltage
Overflow drain voltage
Overflow gate voltage
Summing gate voltage
Output gate voltage
Reset gate voltage
VRG
VTG
Transfer gate voltage
Vertical clock voltage
Horizontal clock voltage
V
V
V
VP1V, VP2V, VP3V
VP1H, VP2H
-10
5: Package temperature
*
*
*
6: The chip temperature may increase due to heating in high-speed operation. We recommend taking measures to dissipate heat as needed.
7: No condensation
Note: Exceeding the absolute maximum ratings even momentarily may cause a drop in product quality. Always be sure to use the
product within the absolute maximum ratings.
Operating conditions (TDI mode, Ta=25 °C)
Parameter
Output transistor drain voltage
Reset drain voltage
Output gate voltage
Substrate voltage
Symbol
VOD
VRD
Min.
12
12
4
-
7
Typ.
15
14
6
0
9
Max.
18
16
8
-
11
7
Unit
V
V
V
V
VOG
VDGND, VAGND
VOFD
Overflow drain voltage
Overflow gate voltage
V
V
3
5
VOFG
High
Low
High
Low
High
Low
High
Low
High
Low
4
-6
4
-6
4
-6
7
-6
4
-6
2.0
6
-5
6
-5
6
-5
8
0
6
-5
2.2
8
-4
8
-4
8
-4
9
-
8
-4
2.4
VP1VH, VP2VH, VP3VH
VP1VL, VP2VL, VP3VL
VP1HH, VP2HH
VP1HL, VP2HL
VSGH
Vertical shift register clock voltage
Horizontal shift register clock voltage
Summing gate voltage
V
V
V
V
VSHL
VRGH
VRGL
VTGH
VTGL
RL
Reset gate voltage
Transfer gate voltage
V
External load resistance
kΩ
2
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Electrical characteristics [Ta=25 °C, fc=30 MHz, Typ. value in operating conditions table (P.2), unless otherwise noted]
Parameter
Signal output frequency
Symbol
fc
Min.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ.
30
250
400
650
50
50
50
100
50
90
90
40
60
100
20
40
40
20
40
Max.
40
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
12
-
Unit
MHz
S10200-02-01
S10201-04-01
S10202-08-01/-16-01
S10200-02-01
S10201-04-01
S10202-08-01
S10202-16-01
S10200-02-01
S10201-04-01
S10202-08-01/-16-01
S10200-02-01
S10201-04-01
S10202-08-01/-16-01
S10200-02-01
S10201-04-01
S10202-08-01/-16-01
S10200-02-01
S10201-04-01
S10202-08-01/-16-01
Vertical shift register
capacitance
pF
CP1V, CP2V, CP3V
Line rate
LR
kHz
Horizontal shift register
capacitance
pF
pF
pF
pF
CP1H, CP2H
CTG
Transfer gate capacitance
Summing gate capacitance
Reset gate capacitance
-
-
-
-
CSG
CRG
-
40
Charge transfer efficiency*8
DC output level*9
Output impedance*10
CTE
Vout
Zo
Ido
P
0.99995
0.99999
11
150
8
-
V
Ω
-
-
-
-
mA
mW/port
Output MOSFET supply current/node
Power consumption*9 *10
120
8: Charge transfer efficiency per pixel, measured at half of the full well capacity
9: The values depend on the load resistance. (VOD=15 V, Load resistance=2.2 kΩ)
10: Power consumption of the on-chip amplifier plus load resistance
*
*
*
Electrical and optical characteristics [Ta=25 °C, fc=30 MHz, Typ. value in operating conditions table (P.2), unless otherwise noted]
Parameter
Saturation output voltage
Symbol
Vsat
FW
Sv
DS
Nr
DR
PRNU
λ
Min.
-
80
8.5
-
-
1777
-
-
Typ.
FW × Sv
100
9.5
30
35
2857
±3
Max.
-
120
10.5
100
45
Unit
V
11
-
Full well capacity
ke
μV/e
*
-
CCD node sensitivity
11 12
-
Dark current
e /pixel
*
Readout noise
Dynamic range
*
-
e rms
-
-
%
nm
13
Photoresponse nonuniformity
±10
-
*
Spectral response range
200 to 1100
11: TDI mode
*
*
*
12: Line rate 50 kHz, accumulated dark signal after 128-stage transfer
13: Measured at half of the full well capacity, using LED light (peak emission wavelength: 660 nm), in TDI mode
Fixed pattern noise (peak to peak)
Photoresponse nonuniformity (PRNU) =
× 100 [%]
Signal
3
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
14
Spectral response (without window)
*
(Typ. Ta=25 °C)
(Typ. Ta=25 °C)
7000
6000
5000
4000
3000
2000
100
Back-thinned CCD
90
80
70
60
50
40
30
20
10
0
S10200-02-01
S10201-04-01
S10202-08-01
S10202-16-01
1000
0
Front-illuminated CCD
200 300 400 500 600 700 800 900 1000 1100
200 300 400 500 600 700 800 900 1000 1100
Wavelength (nm)
Wavelength (nm)
KMPDB0268EB
KMPDB0269EC
14: Spectral response with quartz window is decreased according to the spectral transmittance characteristics of window material.
*
Spectral transmittance characteristics of window material
(Typ. Ta=25 °C)
100
80
60
40
20
0
200 300 400 500 600 700 800 900 1000
Wavelength (nm)
KMPDB0303EA
4
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Sensor structure
S10200-02-01
B port side
TGb
P3V
P2V
P1V
TGa
OFD
OFG
Bidirectional transfer
512 pixels
DGND
A port side
KAPDC0251EA
S10201-04-01
B port side
TGb
P3V
P2V
OFD
OFG
Bidirectional transfer
512 pixels
DGND
P1V
TGa
A port side
KMPDC0260EA
5
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
S10202-08-01
B port side
TGb
P3V
P2V
P1V
TGa
OFD
OFG
Bidirectional transfer
512 pixels
DGND
A port side
KMPDC0261EA
S10202-16-01
B port side
TGb
P3V
P2V
P1V
TGa
OFD
OFG
DGND
Bidirectional
transfer
256 pixels
A port side
KMPDC0262EA
6
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Device structure (typical example: S10202-08-01, conceptual drawing of top view)
Thinning
8 blank pixels
V=128
H=512 × 8 (number of ports)
512 pixels
Note: When viewed from the direction of the incident light, the horizontal shift register is covered with a thick silicon layer (dead layer). However,
long-wavelength light passes through the silicon dead layer and may possibly be detected by the horizontal shift register. To prevent this,
provide light shield on that area as needed.
KMPDC0252EB
7
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Timing chart
A port side readout
OSb
RGb HL
P2Hb, SGb HL
P1Hb HL
Tprv, Tpwv, Tpfv
Tovrv
Tovrv
TGb HL
P1V HL
P2V HL
P3V HL
TGa HL
Tprh, Tpwh, Tpfh
Tovr
Tprs, Tpws, Tpfs
S10200-02-01, S10201-04-01, S10202-08-01: 518
S10202-16-01: 262
519
263
520
264
3
3
4..517
4..261
1
2
P1Ha HL
P2Ha, SGa HL
Tprr, Tpwr, Tpfr
RGa HL
OSa
S510 S511 S512 : S10200-02-01, S10201-04-01, S10202-08-01
S254 S255 S256 : S10202-16-01
D1
D2
D3..D8, S1..S509
D3..D8, S1..S253
KMPDC0254EG
B port side readout
OSb
S510 S511 S512 : S10200-02-01, S10201-04-01, S10202-08-01
S254 S255 S256 : S10202-16-01
D1
D2
D3..D8, S1..S509
D3..D8, S1..S253
Tprr, Tpwr, Tpfr
RGb H
L
Tprs, Tpws, Tpfs
P2Hb, SGb H
L
Tovr
Tprh, Tpwh, Tpfh
S10200-02-01, S10201-04-01, S10202-08-01: 518
S10202-16-01: 262
519
263
520
264
3
3
4 ..517
4 ..261
1
2
P1Hb H
L
Tprv, Tpwv, Tpfv
TGb H
L
P1V H
L
P2V H
L
P3V H
L
Tovrv
Tovrv
TGa H
L
P1Ha H
L
P2Ha, SGa H
L
RGa H
L
OSa
KMPDC0253EH
8
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Parameter
Symbol
Tpwv
Tprv, Tpfv
Tovrv
Tpwh
Tprh, Tpfh
-
Tpws
Tprs, Tpfs
-
Tpwr
Tprr, Tpfr
Tovr
Min.
120
2
30
12.5
3
Typ.
770
10
300
16.5
6
50
16.5
4
Max.
Unit
ns
ns
ns
ns
ns
%
ns
ns
%
ns
ns
ns
Pulse width
Rise and fall times
Overlap time
Pulse width*15
Rise and fall times*15
Duty ratio*15
Pulse width
Rise and fall times
Duty ratio
Pulse width
Rise and fall times
Overlap time
-
-
-
-
-
-
-
-
-
-
-
-
P1V, 2V, 3V, TG
P1H, P2H
SG
-
12.5
2
-
5
1
50
6
2
RG
TG - P1H
30
1000
15: Symmetrical clock pulses should be overlapped at 50% of maximum pulse amplitude.
*
Dimensional outlines (unit: mm)
S10200-02-01
30.48 0.35
27.94 0.33
Window glass 23.84 0.1
Photosensitive area 12.288
3.44 0.35
2.84 0.3
40
21
20
C0.5
1
Index mark
1.48 0.15*
0.457 0.05
1.27 0.1
* Distance from upper surface of window to photosensitive surface
KMPDA0218EC
9
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
S10201-04-01
40.64 0.45
38.1 0.43
Window glass 33 0.1
3.44 0.35
2.84 0.3
Photosensitive area 24.576
40
21
20
C0.5
1
Index mark
1.48 0.15*
0.457 0.05
1.27 0.1
* Distance from upper surface of window to photosensitive surface
KMPDA0219EC
S10202-08-01, S10202-16-01
66.04 0.66
63.5 0.64
3.8 0.38
Window glass 55 0.1
Photosensitive area 49.152
2.4 0.24
0.8 0.05
100
51
50
C0.5
1
2.42 0.2*
Index mark
1.27 0.13
0.42 0.25
* Distance from upper surface of window to photosensitive surface
KMPDA0220EC
10
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Pin connections
S10200-02-01
Function
S10201-04-01
Pin no. Symbol
Remark Pin no. Symbol
Function
Remark
1
2
3
4
P2V CCD vertical register clock-2
P3V CCD vertical register clock-3
P1V CCD vertical register clock-1
TGa Transfer gate-a
1
2
3
4
P2V CCD vertical register clock-2
P3V CCD vertical register clock-3
P1V CCD vertical register clock-1
TGa Transfer gate-a
5
SSD Digital GND
GND
5
SSD Digital GND
GND
6
7
NC
No connection
6
7
OSa1 Output transistor source-a1
SSA Analog GND
RL=2.2 kΩ
GND
SSA Analog GND
GND
8
9
OSa1 Output transistor source-a 1
OD1 Output drain-1
8
9
OSa2 Output transistor source-a2
OD1 Output drain-1
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
OSa2 Output transistor source-a 2
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
OSa3 Output transistor source-a3
OD3 Output drain-3
OSa4 Output transistor source-a4
RL=2.2 kΩ
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+6 V
+14 V
+9 V
NC
NC
OG
RD
No connection
No connection
Output gate
Reset drain
+6 V
+14 V
+9 V
GND
OG
RD
Output gate
Reset drain
OFD Overflow drain
SSD Digital GND
RGa Reset gate-a
SGa Summing gate-a
P1Ha CCD horizontal register-a clock-1
P2Ha CCD horizontal register-a clock-2
P2Hb CCD horizontal register-b clock-2
P1Hb CCD horizontal register-b clock-1
SGb Summing gate-b
OFD Overflow drain
SSD Digital GND
RGa Reset gate-a
SGa Summing gate-a
P1Ha CCD horizontal register-a clock-1
P2Ha CCD horizontal register-a clock-2
P2Hb CCD horizontal register-b clock-2
P1Hb CCD horizontal register-b clock-1
SGb Summing gate-b
GND
RGb Reset gate-b
SSD Digital GND
OFG Overflow gate
RGb Reset gate-b
SSD Digital GND
OFG Overflow gate
GND
GND
+5 V
+14 V
+6 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
GND
RL=2.2 kΩ
GND
+5 V
+14 V
+6 V
RD
OG
NC
NC
Reset drain
RD
OG
Reset drain
Output gate
Output gate
No connection
No connection
OSb4 Output transistor source-b4
OD4 Output drain-4
OSb3 Output transistor source-b3
OD2 Output drain-2
OSb2 Output transistor source-b2
SSA Analog GND
OSb1 Output transistor source-b1
SSD Digital GND
OSb2 Output transistor source-b2
OD2 Output drain-2
OSb1 Output transistor source-b1
SSA Analog GND
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
GND
NC
No connection
SSD Digital GND
TGb Transfer gate-b
P1V CCD vertical register clock-1
P3V CCD vertical register clock-3
P2V CCD vertical register clock-2
GND
TGb Transfer gate-b
P1V CCD vertical register clock-1
P3V CCD vertical register clock-3
P2V CCD vertical register clock-2
11
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
S10202-08-01
Remark Pin no. Symbol
Pin no. Symbol
1
2
3
Function
P1Ha1 CCD horizontal register-a1 clock-1
P2Ha1 CCD horizontal register-a1 clock-2
SGa1 Summing gate-a1
RGa1 Reset gate-a1
Function
Remark
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P1Hb2 CCD horizontal register-b2 clock-1
P2Hb2 CCD horizontal register-b2 clock-2
SGb2 Summing gate-b2
RGb2 Reset gate-b2
SSD Digital GND
SSA Analog GND
OFG Overflow gate
NC
OFD Overflow drain
OSb8 Output transistor source-b8
4
5
SSD Digital GND
GND
GND
+6 V
RL=2.2 kΩ
+9 V
GND
GND
+5 V
6
SSA Analog GND
7
OFG Overflow gate
8
9
OSa1 Output transistor source-a1
OFD Overflow drain
No connection
+9 V
RL=2.2 kΩ
+14 V
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
NC
RD
No connection
Reset drain
+14 V
RL=2.2 kΩ
+6 V
RD
NC
OG
Reset drain
No connection
Output gate
OSa2 Output transistor source-a2
OG
NC
OD1 Output drain-1
OSa3 Output transistor source-a3
Output gate
No connection
+6 V
RL=2.2 kΩ
OSb7 Output transistor source-b7
NC
NC
OD8 Output drain-8
OSb6 Output transistor source-b6
+15 V
RL=2.2 kΩ
No connection
No connection
NC
NC
No connection
No connection
+15 V
RL=2.2 kΩ
OD3 Output drain-3
OSa4 Output transistor source-a4
NC
NC
SSD Digital GND
TGa Transfer gate-a
P2V CCD vertical register clock-2
P3V CCD vertical register clock-3
P1V CCD vertical register clock-1
SSD Digital GND
OSa5 Output transistor source-a5
OD5 Output drain-5
+15 V
RL=2.2 kΩ
NC
NC
No connection
No connection
No connection
No connection
OD6 Output drain-6
OSb5 Output transistor source-b5
SSD Digital GND
P1V CCD vertical register clock-1
P3V CCD vertical register clock-3
P2V CCD vertical register clock-2
TGb Transfer gate-b
SSD Digital GND
NC
NC
OSb4 Output transistor source-b4
OD4 Output drain-4
NC
NC
OSb3 Output transistor source-b3
OD2 Output drain-2
NC
OG
OSb2 Output transistor source-b2
RD
NC
OFD Overflow drain
OSb1 Output transistor source-b1
OFG Overflow gate
SSA Analog GND
SSD Digital GND
+15 V
RL=2.2 kΩ
GND
GND
GND
RL=2.2 kΩ
+15 V
GND
No connection
No connection
NC
NC
No connection
No connection
RL=2.2 kΩ
+15 V
OSa6 Output transistor source-a6
OD7 Output drain-7
NC
NC
No connection
No connection
RL=2.2 kΩ
+15 V
No connection
No connection
RL=2.2 kΩ
+15 V
OSa7 Output transistor source-a7
No connection
Output gate
RL=2.2 kΩ
+6 V
OG
NC
RD
Output gate
No connection
Reset drain
+6 V
RL=2.2 kΩ
+14 V
+14 V
RL=2.2 kΩ
+9 V
Reset drain
No connection
OSa8 Output transistor source-a8
OFD Overflow drain
NC
OFG Overflow gate
SSA Analog GND
SSD Digital GND
RGa2 Reset gate-a2
SGa2 Summing gate-a2
P2Ha2 CCD horizontal register-a2 clock-2
P1Ha2 CCD horizontal register-a2 clock-1
+9 V
RL=2.2 kΩ
+5 V
GND
GND
No connection
+5 V
GND
GND
RGb1 Reset gate-b1
SGb1 Summing gate-b1
P2Hb1 CCD horizontal register-b1 clock-2
P1Hb1 CCD horizontal register-b1 clock-1
12
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
S10202-16-01
Remark Pin no. Symbol
Pin no. Symbol
1
2
3
Function
P1Ha1 CCD horizontal register-a1 clock-1
P2Ha1 CCD horizontal register-a1 clock-2
SGa1 Summing gate-a1
Function
Remark
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
P1Hb2 CCD horizontal register-b2 clock-1
P2Hb2 CCD horizontal register-b2 clock-2
SGb2 Summing gate-b2
RGb2 Reset gate-b2
SSD Digital GND
SSA Analog GND
OFG Overflow gate
OSb16 Output transistor source-b16
OFD Overflow drain
OSb15 Output transistor source-b15
RD
OSb14 Output transistor source-b14
OG Output gate
OSb13 Output transistor source-b13
OD16 Output drain-16
OSb12 Output transistor source-b12
OD15 Output drain-15
OSb11 Output transistor source-b11
OD12 Output drain-12
OSb10 Output transistor source-b10
OD11 Output drain-11
OSb9 Output transistor source-b9
SSD Digital GND
P1V CCD vertical register clock-1
P3V CCD vertical register clock-3
P2V CCD vertical register clock-2
TGb Transfer gate-b
SSD Digital GND
OSb8 Output transistor source-b8
OD8 Output drain-8
OSb7 Output transistor source-b7
OD7 Output drain-7
OSb6 Output transistor source-b6
OD4 Output drain-4
OSb5 Output transistor source-b5
OD3 Output drain-3
OSb4 Output transistor source-b4
OG
OSb3 Output transistor source-b3
RD Reset drain
OSb2 Output transistor source-b2
OFD Overflow drain
OSb1 Output transistor source-b1
OFG Overflow gate
SSA Analog GND
SSD Digital GND
RGb1 Reset gate-b1
SGb1 Summing gate-b1
P2Hb1 CCD horizontal register-b1 clock-2
P1Hb1 CCD horizontal register-b1 clock-1
4
RGa1 Reset gate-a1
5
SSD Digital GND
GND
GND
+5 V
RL=2.2 kΩ
+9 V
RL=2.2 kΩ
+14 V
RL=2.2 kΩ
+6 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
GND
GND
GND
+5 V
RL=2.2 kΩ
+9 V
RL=2.2 kΩ
+14 V
RL=2.2 kΩ
+6 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
GND
6
SSA Analog GND
7
OFG Overflow gate
8
9
OSa1 Output transistor source-a1
OFD Overflow drain
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
OSa2 Output transistor source-a2
RD
OSa3 Output transistor source-a3
OG Output gate
OSa4 Output transistor source-a4
OD1 Output drain-1
OSa5 Output transistor source-a5
OD2 Output drain-2
OSa6 Output transistor source-a6
OD5 Output drain-5
OSa7 Output transistor source-a7
OD6 Output drain-6
OSa8 Output transistor source-a8
SSD Digital GND
Reset drain
Reset drain
TGa Transfer gate-a
P2V CCD vertical register clock-2
P3V CCD vertical register clock-3
P1V CCD vertical register clock-1
SSD Digital GND
OSa9 Output transistor source-a9
OD9 Output drain-9
OSa10 Output transistor source-a10
OD10 Output drain-10
OSa11 Output transistor source-a11
OD13 Output drain-13
OSa12 Output transistor source-a12
OD14 Output drain-14
OSa13 Output transistor source-a13
OG
OSa14 Output transistor source-a14
RD Reset drain
OSa15 Output transistor source-a15
OFD Overflow drain
OSa16 Output transistor source-a16
OFG Overflow gate
SSA Analog GND
SSD Digital GND
RGa2 Reset gate-a2
SGa2 Summing gate-a2
P2Ha2 CCD horizontal register-a2 clock-2
P1Ha2 CCD horizontal register-a2 clock-1
GND
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+6 V
RL=2.2 kΩ
+14 V
RL=2.2 kΩ
+9 V
GND
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+15 V
RL=2.2 kΩ
+6 V
RL=2.2 kΩ
+14 V
RL=2.2 kΩ
+9 V
Output gate
Output gate
RL=2.2 kΩ
+5 V
GND
RL=2.2 kΩ
+5 V
GND
GND
GND
13
TDI-CCD image sensors
S10200-02-01, S10201-04-01, S10202-08-01, S10202-16-01
Precautions (Electrostatic countermeasures)
∙Handle these sensors with bare hands or wearing cotton gloves. In addition, wear anti-static clothing or use a wrist band with an earth
ring, in order to prevent electrostatic damage due to electrical charges from friction.
∙Avoid directly placing these sensors on a work-desk, etc. that may carry an electrostatic charge.
∙Provide ground lines or ground connection with the work-floor, work-desk and work-bench to allow static electricity to discharge.
∙Ground the tools used to handle these sensors, such as tweezers and soldering irons.
It is not always necessary to provide all the electrostatic measures stated above. Implement these measures according to the amount of
damage that occurs.
Related information
www.hamamatsu.com/sp/ssd/doc_en.html
Precautions
∙ Disclamer
∙ Image sensors/Precautions
TDI camera C10000 series
The TDI camera C10000 series is useful in a wide range of imaging applications that require both
high speed and high sensitivity, including in-line monitoring and inspection.
Product information
www.hamamatsu.com/all/en/C10000-801.html
C10000-801 (With S10201-04-01)
Electrical and optical characteristics listed in the datasheet are the values when used under typical operating conditions. We recommend using the
product under typical operating conditions. Product characteristics vary with operating conditions. Operating conditions specified in the datasheet show
the adjustment range. They must be adjusted within the specified range.
Information described in this material is current as of July, 2015.
Product specifications are subject to change without prior notice due to improvements or other reasons. This document has been carefully prepared and the
information contained is believed to be accurate. In rare cases, however, there may be inaccuracies such as text errors. Before using these products, always
contact us for the delivery specification sheet to check the latest specifications.
The product warranty is valid for one year after delivery and is limited to product repair or replacement for defects discovered and reported to us within that
one year period. However, even if within the warranty period we accept absolutely no liability for any loss caused by natural disasters or improper product use.
Copying or reprinting the contents described in this material in whole or in part is prohibited without our prior permission.
www.hamamatsu.com
HAMAMATSU PHOTONICS K.K., Solid State Division
1126-1 Ichino-cho, Higashi-ku, Hamamatsu City, 435-8558 Japan, Telephone: (81) 53-434-3311, Fax: (81) 53-434-5184
U.S.A.: Hamamatsu Corporation: 360 Foothill Road, Bridgewater, N.J. 08807, U.S.A., Telephone: (1) 908-231-0960, Fax: (1) 908-231-1218
Germany: Hamamatsu Photonics Deutschland GmbH: Arzbergerstr. 10, D-82211 Herrsching am Ammersee, Germany, Telephone: (49) 8152-375-0, Fax: (49) 8152-265-8
France: Hamamatsu Photonics France S.A.R.L.: 19, Rue du Saule Trapu, Parc du Moulin de Massy, 91882 Massy Cedex, France, Telephone: 33-(1) 69 53 71 00, Fax: 33-(1) 69 53 71 10
United Kingdom: Hamamatsu Photonics UK Limited: 2 Howard Court, 10 Tewin Road, Welwyn Garden City, Hertfordshire AL7 1BW, United Kingdom, Telephone: (44) 1707-294888, Fax: (44) 1707-325777
North Europe: Hamamatsu Photonics Norden AB: Torshamnsgatan 35 16440 Kista, Sweden, Telephone: (46) 8-509-031-00, Fax: (46) 8-509-031-01
Italy: Hamamatsu Photonics Italia S.r.l.: Strada della Moia, 1 int. 6, 20020 Arese (Milano), Italy, Telephone: (39) 02-93581733, Fax: (39) 02-93581741
China: Hamamatsu Photonics (China) Co., Ltd.: B1201, Jiaming Center, No.27 Dongsanhuan Beilu, Chaoyang District, Beijing 100020, China, Telephone: (86) 10-6586-6006, Fax: (86) 10-6586-2866
14
Cat. No. KMPD1098E09 Jul. 2015 DN
相关型号：
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