GS71108AGU-12I [GSI]
Standard SRAM, 128KX8, 12ns, CMOS, PBGA48, 6 X 8 MM, ROHS COMPLIANT, 0.75 MM PITCH, FBGA-48;
| 型号： | GS71108AGU-12I |
| 厂家： | 
GSI TECHNOLOGY |
| 描述： | Standard SRAM, 128KX8, 12ns, CMOS, PBGA48, 6 X 8 MM, ROHS COMPLIANT, 0.75 MM PITCH, FBGA-48 静态存储器 内存集成电路 |
| 文件： | 总11页 (文件大小：419K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GS71108AU
7, 8, 10, 12 ns
FP-BGA
Commercial Temp
Industrial Temp
128K x 8
1Mb Asynchronous SRAM
3.3 V V
DD
Center V and V
DD
SS
Features
Fine Pitch BGA 128K x 8-Bump Configuration
• Fast access time: 7, 8, 10, 12 ns
• CMOS low power operation: 140/120/95/80 mA at minimum
cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
1
2
3
4
5
6
A
B
C
D
NC
OE
A2
A1
A0
NC
A6
A5
A4
A3
A7
NC
DQ1 NC
DQ2 NC
CE DQ8
NC DQ7
• Industrial Temperature Option: –40° to 85°C
• Package line up
VSS
VDD
VDD
VSS
NC
NC
NC
NC
U: 6 mm x 8 mm Fine Pitch Ball Grid Array package
GU: RoHS-compliant 6 mm x 8 mm Fine Pitch Ball Grid
Array package
E
F
NC
A14
A15
A16
NC
DQ3 NC
DQ4 NC
A11 DQ5 DQ6
Description
G
H
A12
A13
WE
A9
A8
The GS71108A is a high speed CMOS Static RAM organized
as 131,072 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS 71108 operates
on a single 3.3 V power supply and all inputs and outputs are
TTL-compatible. The GS71108A is available in the 6 mm x 8
mm Fine Pitch BGA package.
NC
A10
NC
Package U
6 mm x 8 mm, 0.75 mm Bump Pitch
Top View
Pin Descriptions
Symbol
A0–A16
DQ1–DQ8
CE
Description
Address input
Data input/output
Chip enable input
Write enable input
Output enable input
+3.3 V power supply
WE
OE
V
DD
V
Ground
SS
NC
No connect
Rev: 1.10a 3/2011
1/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Block Diagram
A0
Row
Decoder
Memory Array
Address
Input
Buffer
Column
Decoder
A16
CE
WE
OE
I/O Buffer
Control
DQ8
DQ1
Truth Table
CE
V
Current
OE
WE
DQ1 to DQ8
DD
H
L
L
L
X
L
X
H
L
Not Selected
Read
ISB1, ISB2
X
H
Write
IDD
H
High Z
Note:
X: “H” or “L”
Rev: 1.10a 3/2011
2/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Absolute Maximum Ratings
Parameter
Symbol
Rating
Unit
Supply Voltage
VDD
–0.5 to +4.6
V
–0.5 to V +0.5
DD
Input Voltage
VIN
V
(≤ 4.6 V max.)
–0.5 to V +0.5
DD
Output Voltage
VOUT
V
(≤ 4.6 V max.)
Allowable power dissipation
Storage temperature
PD
0.7
W
o
TSTG
–55 to 150
C
Note:
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended
Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability.
Recommended Operating Conditions
Parameter
Supply Voltage for -7/-8/-10/-12
Input High Voltage
Symbol
Min
3.0
Typ
3.3
—
Max
Unit
V
3.6
V
V
V
DD
V
+0.3
VIH
VIL
2.0
DD
Input Low Voltage
–0.3
—
0.8
Ambient Temperature,
Commercial Range
o
TAc
TAI
0
—
—
70
85
C
Ambient Temperature,
Industrial Range
o
–40
C
Notes:
1. Input overshoot voltage should be less than V +2 V and not exceed 20 ns.
DD
2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns.
Rev: 1.10a 3/2011
3/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Capacitance
Parameter
Symbol
CIN
Test Condition
VIN = 0 V
Max
Unit
pF
Input Capacitance
Output Capacitance
5
7
COUT
VOUT = 0 V
pF
Notes:
1. Tested at TA = 25°C, f = 1 MHz
2. These parameters are sampled and are not 100% tested.
DC I/O Pin Characteristics
Parameter
Symbol
Test Conditions
Min
Max
Input Leakage
Current
VIN = 0 to V
DD
IIL
–1 uA
–1 uA
1 uA
Output High Z
Output Leakage
Current
ILO
1 uA
VOUT = 0 to V
DD
Output High Voltage
Output Low Voltage
VOH
VOL
IOH = –4 mA
2.4
—
ILO = +4 mA
—
0.4 V
Power Supply Currents
0 to 70°C
–40 to 85°C
8 ns 10 ns 12 ns
Parameter
Symbol
Test Conditions
7 ns
8 ns
10 ns 12 ns
7 ns
CE ≤ VIL
Operating
Supply
Current
All other inputs
≥ VIH or ≤ VIL
Min. cycle time
IOUT = 0 mA
IDD
140 mA 120 mA 95 mA 80 mA 145 mA 125 mA 100 mA 85 mA
CE ≥ VIH
Standby
Current
All other inputs
≥ VIH or ≤VIL
Min. cycle time
ISB1
25 mA 20 mA 20 mA 15 mA 30 mA
25 mA 25 mA 20 mA
CE ≥ VDD – 0.2 V
All other inputs
≥ VDD – 0.2 V or ≤ 0.2 V
Standby
Current
ISB2
2 mA
5 mA
Rev: 1.10a 3/2011
4/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
AC Test Conditions
Output Load 1
Parameter
Input high level
Input low level
Conditions
VIH = 2.4 V
VIL = 0.4 V
tr = 1 V/ns
tf = 1 V/ns
1.4 V
DQ
1
30pF
50Ω
Input rise time
VT = 1.4 V
Input fall time
Input reference level
Output reference level
Output load
Output Load 2
1.4 V
3.3 V
Fig. 1& 2
589Ω
434Ω
DQ
Notes:
1
1. Include scope and jig capacitance.
5pF
2. Test conditions as specified with output loading as shown in Fig. 1
unless otherwise noted.
3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ
AC Characteristics
Read Cycle
-7
-10
-12
-8
Parameter
Symbol
Unit
Min
7
Max
—
7
Min
8
Max
Min
10
—
—
—
3
Max
Min
12
—
—
—
3
Max
—
12
12
5
Read cycle time
tRC
tAA
—
8
—
10
10
4
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address access time
—
—
—
3
—
—
—
3
Chip enable access time (CE)
Output enable to output valid (OE)
Output hold from address change
Chip enable to output in low Z (CE)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE)
Output disable to output in High Z (OE)
tAC
7
8
tOE
3
3.5
—
—
—
4
tOH
—
—
—
3.5
3
—
—
—
5
—
—
—
6
tLZ*
tOLZ*
tHZ*
tOHZ*
3
3
3
3
0
0
0
0
—
—
—
—
—
—
—
—
3.5
4
5
* These parameters are sampled and are not 100% tested
Rev: 1.10a 3/2011
5/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Read Cycle 1: CE = OE = V , WE = V
IL
IH
tRC
Address
Data Out
tAA
tOH
Previous Data
Data valid
Read Cycle 2: WE = V
IH
tRC
Address
CE
tAA
tAC
tHZ
tLZ
OE
tOE
tOHZ
tOLZ
DATA VALID
Data Out
High impedance
Rev: 1.10a 3/2011
6/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Write Cycle
-7
-8
-10
-12
Parameter
Symbol
Unit
Max
Min
7
Max
—
—
—
—
—
—
—
—
—
—
Min
8
Max
—
—
—
—
—
—
—
—
—
—
Min
10
7
Max
—
—
—
—
—
—
—
—
—
—
Min
12
8
Write cycle time
Address valid to end of write
Chip enable to end of write
Data set up time
tWC
tAW
tCW
tDW
tDH
—
—
—
—
—
—
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
5
5.5
5.5
4
5
7
8
3
5
6
Data hold time
0
0
0
0
Write pulse width
tWP
tAS
5
5.5
0
7
8
Address set up time
0
0
0
Write recovery time (WE)
Write recovery time (CE)
Output Low Z from end of write
tWR
tWR1
0
0
0
0
0
0
0
0
*
3
3
3
3
tWLZ
*
Write to output in High Z
—
3
—
3.5
—
4
—
5
ns
tWHZ
* These parameters are sampled and are not 100% tested
Write Cycle 1: WE control
tWC
Address
OE
tAW
tWR
tCW
CE
tAS
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
tWHZ
tWLZ
HIGH IMPEDANCE
Rev: 1.10a 3/2011
7/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Write Cycle 2: CE control
tWC
Address
OE
tAW
tWR1
tAS
tCW
CE
tWP
WE
tDW
tDH
DATA VALID
Data In
Data Out
HIGH IMPEDANCE
Rev: 1.10a 3/2011
8/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
6 mm x 8 mm Fine Pitch BGA
8 . 0 0 ± 0 . 1 0
0.10
5 . 2 5
Rev: 1.10a 3/2011
9/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
Ordering Information
*
Package
Access Time
Temp. Range
Part Number
GS71108AU-7
GS71108AU-8
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
7 ns
8 ns
Commercial
Commercial
Commercial
Commercial
Industrial
GS71108AU-10
GS71108AU-12
GS71108AU-7I
GS71108AU-8I
GS71108AU-10I
GS71108AU-12I
GS71108AGU-7
GS71108AGU-8
GS71108AGU-10
GS71108AGU-12
GS71108AGU-7I
GS71108AGU-8I
GS71108AGU-10I
6 mm x 8 mm Fine Pitch BGA
10 ns
12 ns
7 ns
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
6 mm x 8 mm Fine Pitch BGA
8 ns
Industrial
6 mm x 8 mm Fine Pitch BGA
10 ns
12 ns
7 ns
Industrial
6 mm x 8 mm Fine Pitch BGA
Industrial
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
RoHS-compliant 6 mm x 8 mm Fine Pitch BGA
Commercial
Commercial
Commercial
Commercial
Industrial
8 ns
10 ns
12 ns
7 ns
8 ns
Industrial
10 ns
12 ns
Industrial
GS71108AGU-12I
Industrial
Note:
Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS71108AU-8T.
Rev: 1.10a 3/2011
10/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
GS71108AU
1Mb Asynchronous Datasheet Revision History
Rev. Code: Old;
New
Types of Changes
Format or Content
Page #/Revisions/Reason
• Creation of new datasheet
71108A_r1
• Added 6 ns speed bin to entire document
71108A_r1; 71108A_r1_01
Content
Content
• Updated all power numbers
• Changed 6 mm x 10 mm package designator from U to X
71108A_r1_01; 71108A _r1_02
• Updated Recommended Operating Conditions table on page 3
• Updated Power Supply Currents table
71108A_r1_02; 71108A _r1_03
Content
• Changed FPBGA package from 6 x 10 to 6 x 8 (package U)
• Removed 6 ns speed bin from entire document
• Added 7 ns speed bin to entire document
71108A_r1_03; 71108A _r1_04
71108A_r1_04; 71108A _r1_05
71108A_r1_05; 71108A _r1_06
Content
Content
Content
• Added missing 300 mil SOJ mechanical drawing
• Updated format
• Added RoHS-compliant information for TSOP-II package
• Added RoHS-compliant information for FP-BGA package
• Added RoHS-compliant 400 mil, 32-pin SOJ
• Updated to MP in ordering information table
71108A_r1_06; 71108A _r1_07
71108A_r1_07; 71108A _r1_08
71108A_r1_08; 71108A _r1_09
Content
Content
Content
• Removed Status column from Ordering Information Table
• Removed SOJ package reference from entire document
• (Rev1.10a: Removed TSOP-II references due to EOL (EOL_091016111-
CY)
71108A_r1_09; 71108A _r1_10
Content
Rev: 1.10a 3/2011
11/11
© 2001, GSI Technology
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
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