G1427 [GMT]
2W Stereo Audio Amplifier; 2W立体声音频放大器型号: | G1427 |
厂家: | GLOBAL MIXED-MODE TECHNOLOGY INC |
描述: | 2W Stereo Audio Amplifier |
文件: | 总16页 (文件大小:338K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
G1427
Global Mixed-mode Technology Inc.
2W Stereo Audio Amplifier
6dB\10dB\15.6dB\21.6dB Selectable Gain Settings
Features
General Description
Internal Gain Control, Which Eliminates Exter-
G1427 is a stereo audio power amplifier in 24pin
TSSOP thermal pad package. It can drive 2.0W con-
tinuous RMS power into 4Ω load per channel in
Bridge-Tied Load (BTL) mode at 5V supply voltage. Its
THD is smaller than 1% under the above operation
condition. To simplify the audio system design in the
notebook application, G1427 supports the Bridge-Tied
Load (BTL) mode for driving the speakers, Single-End
(SE) mode for driving the headphone. For the low
current consumption applications, the SHDN mode is
supported to disable G1427 when it is idle. The current
consumption can be reduced to 160µA (typically).
nal Gain-Setting Resistors
Depop Circuitry Integrated
Output Power at 1% THD+N, VDD=5V
--2.0W/CH (typical) into a 4Ω Load
--1.2W/CH (typical) into a 8Ω Load
Bridge-Tied Load (BTL), Single-Ended (SE)
Stereo Input MUX
PC-Beep Input
Fully differential Input
Shutdown Control Available
Surface-Mount Power Package
24-Pin TSSOP-P
Amplifier gain is internally configured and controlled by
two terminals (GAIN0, GAIN1). BTL gain settings of
6dB, 10dB, 15.6dB, 21.6dB are provided, while SE
gain is always configured as 4.1dB (inverting) for
headphone driving. G1427 also supports two input
paths, that means two different amplitude AC signals
Applications
Stereo Power Amplifiers for Notebooks or
Desktop Computers
Multimedia Monitors
Stereo Power Amplifiers for Portable Audio
Systems
can be applied and chosen by setting HP/LINE pin. It
enhances the hardware designing flexibility.
Ordering Information
ORDER
NUMBER
G1427F31U
ORDER NUMBER
(Pb free)
TEMP.
PACKAGE
RANGE
G1427F31Uf
-40°C to +85°C
TSSOP-24 (FD)
Note: U:Tape & Reel
(FD): Thermal Pad
Pin Configuration
G1427
GND/HS
24
1
2
3
4
GND/HS
GAIN0
GAIN1
LOUT+
LLINEIN
LPHIN
PVDD
RIN
23 RLINEIN
SHUTDOWN
22
21 ROUT+
20 RHPIN
5
6
7
8
9
VDD
Thermal
Pad
19
18
17
16
15
PVDD
HP/LINE
ROUT-
SE/BTL
LOUT-
LIN 10
BYPASS
14 PC-BEEP
GND/HS
13
11
GND/HS 12
Top View
Bottom View
TSSOP-24
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
1
G1427
Global Mixed-mode Technology Inc.
Absolute Maximum Ratings
Supply Voltage, VCC…………………..…..…….….…...6V
Operating Ambient Temperature Range
Power Dissipation (1)
TA ≤ 25°C ………...….…………………………..2.7W
TA ≤ 70°C ………...….…………………………..1.7W
Electrostatic Discharge, VESD
TA…….…………………………….……….-40°C to +85°C
Maximum Junction Temperature, TJ…..……….….150°C
Storage Temperature Range, TSTG….…-65°C to+150°C
Reflow Temperature (soldering, 10sec)……..……260°C
Human body mode..…………………….…………3000(2)
Note:
(1) : Recommended PCB Layout
(2) : Human body model : C = 100pF, R = 1500Ω, 3 positive pulses plus 3 negative pulses
Electrical Characteristics
DC Electrical Characteristics, TA=+25°C
PARAMETER
Supply voltage VDD
SYMBOL
VDD
CONDITION
MIN
4.5
2
TYP
5
MAX UNIT
5.5
---
V
V
High-Level Input voltage, VIH
VIH
---
SE/BTL , HP/LINE ,
GAIN1
SHUTDOWN , GAIN0,
Low-Level Input voltage, VIL
VIL
---
---
0.8
V
SE/BTL , HP/LINE , SHUTDOWN , GAIN0,
GAIN1
DC Differential Output Voltage
Supply Current in Mute Mode
IDD in Shutdown
VO(DIFF)
IDD
VDD = 5V,Gain = 2
---
---
---
5
7.5
4
50
13
7
mV
mA
µA
Stereo BTL
VDD = 5V
Stereo SE
ISD
VDD = 5V
160
300
(AC Operation Characteristics, VDD = 5.0V, TA=+25°C, RL = 4Ω, unless otherwise noted)
PARAMETER
SYMBOL
CONDITION
THD = 1%, BTL, RL = 4Ω G=-2V/V
THD = 1%, BTL, RL = 8Ω G=-2V/V
THD = 10%, BTL, RL = 4Ω G=-2V/V
THD = 10%, BTL, RL = 8Ω G=-2V/V
THD = 0.1%, SE, RL = 32Ω
PO = 1.6W, BTL, RL = 4Ω G=-2V/V
PO = 1W, BTL, RL = 8Ω G=-2V/V
PO = 75mW, SE, RL = 32Ω
VI = 1V, RL = 10KΩ, SE
THD = 5%
MIN TYP MAX UNIT
---
---
---
---
---
---
---
---
---
---
---
2
1.25
2.5
1.6
85
---
---
---
---
---
---
---
---
---
---
---
W
Output power (each channel) see Note
P(OUT)
mW
m%
100
60
Total harmonic distortion plus noise
THD+N
80
30
Maximum output power bandwidth
Power supply ripple rejection
BOM
>15
68
kHz
dB
PSRR
F=1kHz, BTL mode G=-2V/V
CBYP=1µF
Channel-to-channel output separation
Line/HP input separation
BTL attenuation in SE mode
Input impedance
f = 1kHz
---
---
---
80
---
---
---
dB
dB
80
85
dB
ZI
See Table 2
MΩ
Signal-to-noise ratio
PO = 500mW, BTL, G=-2V/V
---
---
90
45
---
---
dB
Output noise voltage
Vn
BTL, G=-2V/V, A Weighted filter
µV (rms)
Note :Output power is measured at the output terminals of the IC at 1kHz.
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
2
G1427
Global Mixed-mode Technology Inc.
Typical Characteristics
Table of Graphs
FIGURE
vs Frequency
1,2,7,8,13,14,19,21
THD +N Total Harmonic Distortion Plus
Noise
vs Output Power
vs Output Voltage
vs Frequency
3,4,5,6,9,10,11,12,15,16,17,18,20
22
Output Noise Voltage
27
Vn
Supply Ripple Rejection Ratio
Crosstalk
vs Frequency
23,24
25,26
28,29
30,31
vs Frequency
PO Output Power
vs Load Resistance
vs Output Power
PD Power Dissipation
Total Harmonic Distortion Plus
Noise vs Output Frequency
Total Harmonic Distortion Plus
Noise vs Output Frequency
10
5
10
5
VDD=5V
VDD=5V
RL=3
BTL
Po=1.75W
RL=3
Ω
BTL,Av=6dB
Ω
Av=21.6dB
2
1
2
1
Av=15.6dB
0.5
0.5
Po=0.5W
%
%
0.2
0.2
0.1
Po=1W
0.1
0.05
0.05
Av=10dB
Av=6dB
0.02
0.01
0.02
0.01
Po=1.5W
20
50
100
200
50 0
Hz
1k
2k
5k
10k
20k
20
50
100
200
500
Hz
1k
2k
5k
10k
20 k
Figure 1
Figure 2
Total Harmonic Distortion Plus
Noise vs Output Power
Total Harmonic Distortion Plus
Noise vs Output Power
10
5
10
5
VDD=5V
15kHz
VDD=5V
15kHz
RL=3
Ω
RL=3
Ω
BTL,Av=6dB
BTL,Av=10dB
2
1
2
1
0.5
0.5
1kHz
%
%
1kHz
0.2
0.2
0.1
0.1
0.05
0.0 5
20Hz
20Hz
0.02
0.01
0.0 2
0.0 1
3m
5m
10m
20m
50m
100m
W
200m
500m
1
2
3
3m
5m
10m
20m
50 m
100m
200m
500m
1
2
3
W
Figure 3
Figure 4
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
3
G1427
Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus
Noise vs Output Power
Total Harmonic Distortion Plus
Noise vs Output Power
10
5
10
15kHz
5
15kHz
2
1
2
1
1kHz
0.5
0.5
1kHz
%
%
0.2
0.2
0.1
20Hz
0.1
VDD=5V
RL=3
VDD=5V
RL=3
20Hz
0.05
0.05
Ω
Ω
BTL,Av=21.6dB
BTL,Av=15.6dB
0.02
0.01
0.02
0.01
3m
5m
10m
20m
50m
100m
W
200m
50 0m
1
2
3
3m
5m
10m
20m
50m
100m
W
200m
500m
1
2
3
Figure 5
Figure 6
Total Harmonic Distortion Plus
Noise vs Frequency
Total Harmonic Distortion Plus
Noise vs Frequency
10
5
10
5
VDD=5V
VDD=5V
RL=4
BTL,Av=6dB
RL=4
BTL
Ω
Av=21.6dB
Ω
2
1
2
1
Po=
1.75W
0.5
0.5
Po=0.25W
%
Av=15.6dB
%
0.2
0.2
0.1
Av=6dB
Po=1.5W
Po=1W
0.1
0.0 5
0.05
0.0 2
0.0 1
0.02
0.01
Av=10dB
20
50
100
200
50 0
Hz
1k
2k
5k
10k
20k
20
50
100
20 0
500
Hz
1k
2k
5k
10k
20k
Figure 7
Figure 8
Total Harmonic Distortion Plus
Noise vs Output Power
Total Harmonic Distortion Plus
Noise vs Output Power
10
5
10
5
VDD=5V
15kHz
VDD=5V
RL=4
Ω
BTL,Av=10dB
RL=4
15kHz
1kHz
20Hz
Ω
BTL,Av=6dB
2
1
2
1
0.5
0.5
1kHz
20Hz
%
%
0.2
0.2
0.1
0.1
0.05
0.0 5
0.02
0.01
0.0 2
0.0 1
3m
5m
10m
20m
50m
100m
W
200m
50 0m
1
2
3
3m
5m
10m
20m
50 m
100m
W
200m
500m
1
2
3
Figure 9
Figure 10
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
4
G1427
Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus
Noise vs Output Power
Total Harmonic Distortion Plus
Noise vs Output Power
10
10
5
5
15kHz
15kHz
2
1
2
1
1kHz
1kHz
0.5
0.5
%
%
0.2
0.2
0.1
0.1
20Hz
VDD=5V
RL=4
BTL,Av=21.6dB
VDD=5V
RL=4
BTL,Av=15.6dB
0.05
0.05
20Hz
Ω
Ω
0.02
0.01
0.02
0.01
3m
5m
10m
20m
50m
100m
W
200m
500m
1
2
3
3m
5m
10m
20m
50m
100m
200m
50 0m
1
2
3
W
Figure 11
Figure 12
Total Harmonic Distortion Plus
Noise vs Frequency
Total Harmonic Distortion Plus
Noise vs Frequency
10
5
10
5
VDD=5V
RL=8
BTL,Av=6dB
VDD=5V
Ω
RL=8
BTL
Ω
2
1
2
1
Po=1W
Av=15.6dB
0.5
0.5
%
%
Po=0.25W
0.2
0.2
0.1
Av=21.6dB
0.1
Po=1W
Av=6dB
0.05
0.0 5
0.02
0.01
0.0 2
0.0 1
Po=0.5W
Av=10dB
20
50
100
20 0
5 00
Hz
1 k
2k
5k
10k
20 k
20
5 0
100
200
500
Hz
1k
2k
5k
10k
20k
Figure 13
Figure 14
Total Harmonic Distortion Plus
Noise vs Output Power
Total Harmonic Distortion Plus
Noise vs Output Power
10
5
10
5
VDD=5V
VDD=5V
RL=8
Ω
RL=8
Ω
15kHz
15kHz
BTL,Av=10dB
2
1
2
1
BTL,Av=6dB
0.5
0.5
%
%
0.2
0.2
0.1
1kHz
1kHz
0.1
0.05
0.0 5
20Hz
0.02
0.01
0.0 2
0.0 1
20Hz
3m
5m
10m
20m
50m
100m
W
200m
50 0m
1
2
3
3m
5m
10m
20m
50 m
100m
W
200m
500m
1
2
3
Figure 15
Figure 16
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
5
G1427
Global Mixed-mode Technology Inc.
Total Harmonic Distortion Plus
Total Harmonic Distortion Plus
Noise vs Output Power
Noise vs Output Power
10
5
10
VDD=5V
RL=8
Ω
5
15kHz
15kHz
BTL,Av=15.6dB
2
1
2
1
1kHz
0.5
0.5
1kHz
%
%
%
%
0.2
0.2
0.1
0.1
VDD=5V
RL=8
BTL,Av=21.6dB
0.05
0.05
20Hz
Ω
20Hz
0.02
0.01
0.02
0.01
3m
5m
10m
20m
50m
100m
W
200m
500m
1
2
3
3m
5m
10m
20m
50 m
100m
W
200 m
50 0m
1
2
3
Figure 17
Figure 18
Total Harmonic Distortion Plus
Noise vs Output Power
Total Harmonic Distortion Plus
Noise vs Frequency
10
5
10
5
VDD=5V
VDD=5V
RL=32
SE,Av=4.1dB
RL=32
Ω
Ω
2
2
SE,Av=4.1dB
1
1
0.5
0.5
15kHz
%
Po=50mW
0.2
0.1
0.2
0.1
Po=75mW
20Hz
0.05
0.05
0.02
0.01
0.02
0.01
1kHz
Po=25mW
20
50
100
200
500
Hz
1k
2k
5k
1 0k
20k
1m
2m
5m
10 m
2 0m
50m
100m
200m
W
Figure 19
Figure 20
Total Harmonic Distortion Plus
Noise vs Output Voltage
Total Harmonic Distortion Plus
Noise vs Frequency
10
5
10
5
VDD=5V
RL=10k
VDD=5V
RL=10k
SE,Av=4.1dB
Cout=1000µF
Ω
Ω
2
2
SE,Av=4.1dB
Cout=1000µF
1
1
0.5
0.5
%
0.2
0.1
0.2
0.1
20Hz
15kHz
Vo=1Vrms
0.05
0.05
0.02
0.01
0.02
0.01
1kHz
20
50
100
200
500
Hz
1k
2k
5k
1 0k
20k
100m
200m
300m 400 m 50 0m
7 00m
1
2
3
Vo-Outpu t Voltage-Vrms
Figure 21
Figure 22
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
6
G1427
Global Mixed-mode Technology Inc.
Supply Ripple Rejection Ratio
vs Frequency
Supply Ripple Rejection Ratio
vs Frequency
+0
+0
T
T
T
T
T
T T
-10
-10
VDD=5V
RL=8
Cb=1µF
SE
VDD=5V
Ω
-20
-20
-30
-40
-50
RL=8
Ω
Cb=1µF
BTL
-30
-40
-50
Av=21.6dB
d
B
d
B
-60
-70
-80
-90
-60
-70
-80
Av=6dB
-90
-100
-100
20
50
100
200
50 0
Hz
1k
2k
5k
1 0k
20k
20
50
100
200
5 00
Hz
1k
2k
5 k
10k
20 k
Figure 23
Figure 24
Channel Separation
Channel Separation
-20
-25
-20
-25
-30
T
-30
-35
VDD=5V
Po=1W
-35
-40
VDD=5V
Po=1W
RL=8
-40
-45
RL=8
Ω
-45
-50
Ω
BTL,Av=6dB
-50
SE,Av=4.1dB
-55
-60
-55
-60
d
B
d
B
-65
-70
-65
L TO R
-70
-75
L TO R
-75
-80
-80
-85
-90
-85
-90
R TO L
R TO L
-95
-95
-100
-100
20
50
100
200
5 00
Hz
1k
2k
5 k
10k
20 k
20
50
100
200
50 0
Hz
1k
2k
5k
1 0k
20k
Figure 25
Figure 26
Output Noise vs Frequency
Output Power vs Load Resistance
5 00u
4 00u
2.5
3 00u
VDD=5V
RL=4
BTL,Av=6dB
VDD=5V
THD+N=1%
BTL
Ω
2
1.5
1
2 00u
A-Weighted filter
Each Channel
1 00u
V
70u
60u
50u
40u
30u
20u
0.5
0
10u
20
50
100
200
5 00
Hz
1k
2k
5 k
10k
20 k
0
10
20
30
40
Load Resistance(Ω)
Figure 27
Figure 28
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
7
G1427
Global Mixed-mode Technology Inc.
Power Dissipation vs Output Power
Output Power vs Load Resistance
1.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.6
RL=3
Ω
VDD=5V
THD+N=1%
SE
1.4
1.2
1
RL=4
Ω
Each Channel
VDD=5V
BTL
Each Channel
0.8
0.6
0.4
0.2
0
RL=8
Ω
4
8
12
16
20
24
28
32
0
0.5
1
1.5
2
2.5
Load Resistance(Ω)
Po-Output Pow er(W)
Figure 29
Figure 30
Recommend PCB Footprint
Power Dissipation vs Output Power
0.35
0.3
RL=4
Ω
0.25
0.2
0.15
0.1
VDD=5V
SE
Each Channel
RL=8
Ω
0.05
0
RL=32
0.2
Ω
0
0.4
0.6
0.8
Po-Output Pow er(W)
Figure 31
TEL: 886-3-5788833
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Ver: 1.3
Sep 23, 2005
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G1427
Global Mixed-mode Technology Inc.
Pin Description
PIN
NAME
GND/HS
GAIN0
I/O
FUNCTION
Ground connection for circuitry, directly connected to thermal pad.
Bit 0 of gain control
1,12,13,24
2
3
4
5
I
I
GAIN1
Bit 1 of gain control
LOUT+
LLINEIN
O
I
Left channel + output in BTL mode, + output in SE mode.
Left channel line input, selected when HP/LINE pin is held low.
6
7,18
8
LPHIN
PVDD
RIN
I
I
Left channel headphone input, selected when HP/LINE pin is held high.
Power supply for output stages.
I
Common right input for fully differential inputs. AC ground for single-ended inputs.
Left channel - output in BTL mode, and high impedance in SE mode.
Common left input for fully differential inputs. AC ground for single-ended inputs.
Tap to voltage divider for internal mid-supply bias generator.
The input for PC-BEEP mode. PC-BEEP is enabled when at least eight continuous >
1-VPP (peak to peak) square waves is input to PC-BEEP pin.
Hold low for BTL mode, hold high for SE mode.
9
LOUT-
LIN
O
I
10
11
14
BYPASS
PC-BEEP
I
15
16
17
I
O
I
SE/BTL
ROUT-
Right channel - output in BTL mode, high impedance state in SE mode.
MUX control input, hold high to select headphone inputs (6,20), hold low to select line
inputs (5,23).
HP/LINE
19
VDD
Analog VDD input supply. This terminal needs to be isolated from PVDD to achieve
highest performance.
20
21
22
RHPIN
ROUT+
I
O
I
Right channel headphone input, selected when HP/LINE pin is held high.
Right channel + output in BTL mode, positive output in SE mode.
Places entire IC in shutdown mode when held low, expect PC-BEEP remains active.
SHUTDOWN
RLINEIN
23
I
Right channel line input, selected when HP/ LINE pin is held low.
TEL: 886-3-5788833
Ver: 1.3
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Sep 23, 2005
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G1427
Global Mixed-mode Technology Inc.
Block Diagram
RLINEIN
RHPIN
Right
MUX
_
ROUT+
+
RIN
PC-Beep
PC-Beep
_
ROUT-
+
BYPASS
Depop
Circuitry
GAIN0
GAIN1
SE/BTL
HP/LINE
Gain/MUX
Control
PVDD
VDD
Power
Management
SHUTDOWN
LLINEIN
LHPIN
GND
Left
MUX
_
LOUT+
+
LIN
_
LOUT-
+
TEL: 886-3-5788833
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Sep 23, 2005
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G1427
Global Mixed-mode Technology Inc.
Application Circuit
Right Linein Negative
Differential Input
1µF
23
20 RHPIN
RLINEIN
Right
MUX
1µF
_
Right Hpin Negative
Differential Input
ROUT+ 21
+
Right Hpin/Linein Positive
1µF
Differential Input
8
RIN
14 PC-Beep
11 BYPASS
PC-Beep
_
1µF
220µF
ROUT- 16
PC-BEEP Input Signal
2.2µF
+
VDD
1K
Depop
Circuitry
2
3
GAIN0
GAIN1
VDD
PVDD 7,18
VDD 19
Gain/MUX
Control
SE/BTL
15
Power
Management
Left Linein Negative
Differential Input
17 HP/LINE
10µF
1µF
SHUTDOWN
22
1µF
1,12,13,24
GND
LLINEIN
LHPIN
Note
5
6
Left
MUX
100K
1K
_
1µF
Left Hpin Negative
Differential Input
4
LOUT+
+
220µF
Left Hpin/Linein Positive
Differential Input
LIN
10
1µF
_
3
LOUT-
+
0.1µF
Application Circuit Using Differential Inputs
Note: 1µF ceramic capacitor should be placed as close as possible to the IC to filter the higher-frequency noise.
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G1427
Global Mixed-mode Technology Inc.
Application Circuit (continued)
1µF
1µF
Right Linein Input
Right Hpin Input
23
20 RHPIN
RLINEIN
Right
MUX
_
ROUT+ 21
+
1µF
8
RIN
14 PC-Beep
11 BYPASS
PC-Beep
_
1µF
220µF
ROUT- 16
PC-BEEP Input Signal
+
VDD
1K
Depop
Circuitry
2.2µF
2
3
GAIN0
GAIN1
VDD
PVDD 7,18
VDD 19
Gain/MUX
Control
SE/BTL
15
Power
Management
17 HP/LINE
1µF
SHUTDOWN
22
10µF
Note
100K
1µF
1µF
Left Linein Input
Left Hpin Input
1,12,13,24
GND
LLINEIN
LHPIN
5
6
Left
MUX
1K
_
4
LOUT+
+
220µF
LIN
10
1µF
_
3
LOUT-
+
0.1µF
Application Circuit Using Single-Ended Inputs
Note: 1µF ceramic capacitor should be placed as close as possible to the IC to filter the higher-frequency noise.
TEL: 886-3-5788833
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Table 2
Application Information
Gain setting via GAIN0 and GAIN1 inputs
The internal gain setting is determined by two input
terminals, GAIN0 and GAIN1. The gains listed in Table
1 are realized by changing the taps on the input resis-
tors inside the amplifier. This will cause the internal
input impedance, ZI, to be dependent on the gain set-
ting. Although the real input impedance will shift by
30% due to process variation from part-to-part, the
actual gain settings are controlled by the ratios of the
resistors and the actual gain distribution from part-to-
part is quite good.
Zi (Kohm)
AV (dB)
21.6
15.6
10
30
45
70
90
6
Input Capacitor
In the typical application, an input capacitor Ci is re-
quired to allow the amplifier to bias the input signal to
the proper dc level for optimum operation. In this
case ,Ci and the input impedance of the amplifier, Zi,
form a high-pass filter with the -3dB determined by the
equation: f-3dB= 1/ (2πRI Ci)
Table 1
GAIN0
GAIN1
SE/BTL
AV (dB)
6
The value of Ci is important to consider as it directly af-
fects the bass performance of the application circuit. For
example, if the input resistor is 15kΩ, the input capacitor
is 1µF, the flat bass response will be down to 10.6Hz.
0
0
1
1
X
0
1
0
1
X
0
0
0
0
1
10
15.6
21.6
4.1
Because the small leakage current of the input capaci-
tors will cause the dc offset voltage at the input to the
amplifier that reduces the operation headroom, espe-
cially at the high gain applications. The low-leakage
tantalum or ceramic capacitors are suggested to be
used as the input coupling capacitors. When using the
polarized capacitors, it is important to let the positive
side connecting to the higher dc level of the application.
Input Resistance
The typical input impedance at each gain setting is given
in the Table 2. Each gain setting is achieved by varying
the input resistance of the amplifier, which can be over 3
times from its minimum value to the maximum value. As
a result, if a single capacitor is used in the input high
pass filter, the -3dB or cut-off frequency will be also
change over 3 times. To reduce the variation of the
cut-off frequency, an additional resistor can be con-
nected from the input pin of the amplifier to the ground,
as shown in Figure 1. With the extra resistor, the cut-off
frequency can be re-calculated using equation : f-3dB= 1/
2πC(R||RI). Using small external R can reduce the varia-
Power Supply Decoupling
The G1427 is a high-performance CMOS audio ampli-
fier that requires adequate power supply decoupling to
make sure the output total harmonic distortion (THD)
as low as possible. The optimum decoupling is using
two capacitors with different types that target different
types of noise on the power supply leads. For high
frequency transients, spikes, a good low ESR ceramic
capacitor works best, typically 0.1µF/1µF used and
placed as close as possible to the G1427 VDD lead. A
larger aluminum electrolytic capacitor of 10µF or
greater placed near the device power is recommended
for filtering low-frequency noise.
tion of the cut-off frequency. But the side effect is small
external R will also let (R||RI) become small, the cut-off
frequency will be larger and degraded the bass-band
performance. The other side effect is with extra power
dissipation through the external resistor R to the ground.
So using the external resistor R to flatting the variation of
the cut-off frequency, the user must also consider the
bass-band performance and the extra power dissipation
to choose the accepted external resistor R value.
Optimizing DEPOP Operation
Circuitry has been implemented in G1427 to mini-
mize the amount of popping heard at power-up and
when coming out of shutdown mode. Popping oc-
curs whenever a voltage step is applied to the
speaker and making the differential voltage gener-
ated at the two ends of the speaker. To avoid the
popping heard, the bypass capacitor should be
chosen promptly, 1/(CBx170kΩ) ≦ 1/(CI*(RI+RF)).
C
Zi
Zf
Input Signal
IN
R
Figure 1
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Output coupling capacitor
Where 170kΩ is the output impedance of the
mid-rail generator, CB is the mid-rail bypass ca-
pacitor, CI is the input coupling capacitor, RI is the
input impedance, RF is the gain setting impedance
which is on the feedback path. CB is the most im-
portant capacitor. Besides it is used to reduce the
popping, CB can also determine the rate at which
the amplifier starts up during startup or recovery
from shutdown mode.
G1427 can drive clean, low distortion SE output power
with gain –1V/V into headphone loads (generally 16Ω
or 32Ω) as in Figure 3. Please refer to Electrical
Characteristics to see the performances. A coupling
capacitor is needed to block the dc-offset voltage, al-
lowing pure ac signals into headphone loads. Choos-
ing the coupling capacitor will also determine the -3dB
point of the high-pass filter network, as Figure 4.
fC=1/(2πRLCC)
De-popping circuitry of G1427 is shown as below
Figure 2. The PNP transistor limits the voltage drop
across the 120kΩ by slewing the internal node
slowly when power is applied. At start-up, the volt-
age at BYPASS capacitor is 0. The PNP is ON to
pull the mid-point of the bias circuit down. So the
capacitor sees a lower effective voltage, and thus
the charging is slower. This appears as a linear
ramp (while the PNP transistor is conducting), fol-
lowed by the expected exponential ramp of an R-C
circuit.
For example, a 220µF capacitor with 32Ω headphone
load would attenuate low frequency performance be-
low 22.6Hz. So the coupling capacitor should be well
chosen to achieve the excellent bass performance
when in SE mode operation.
VDD
Vo(PP)
For better performance, CB is recommended to be
at least 1.5 times of input coupling capacitor CI. For
example, if using 1µF input coupling capacitor,
2.2µF ceramic or tantalum low-ESR capacitors are
recommended to achieve the better THD perform-
ance.
CC
Vo(PP)
RL
Figure 3
VDD
100 kΩ
120 kΩ
Bypass
-3 dB
100 kΩ
fc
Figure 2
Figure 4
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Bridged-Tied Load Mode Operation
Shutdown mode
G1427 has two linear amplifiers to drive both ends of
the speaker load in Bridged-Tied Load (BTL) mode
operation. Figure 5 shows the BTL configuration. The
differential driving to the speaker load means that
when one side is slewing up, the other side is slewing
down, and vice versa. This configuration in effect will
double the voltage swing on the load as compared to a
ground reference load. In BTL mode, the peak-to-peak
voltage VO(PP) on the load will be two times than a
ground reference configuration. The voltage on the
load is doubled, this will also yield 4 times output
power on the load at the same power supply rail and
loading. Another benefit of using differential driving
configuration is that BTL operation cancels the dc off-
sets, which eliminates the dc coupling capacitor that is
needed to cancelled dc offsets in the ground reference
configuration. Low-frequency performance is then lim-
ited only by the input network and speaker responses.
Cost and PCB space can be minimized by eliminating
the dc coupling capacitors.
When the normal operation, the SHUTDOWN pin
should be held high. Pulling SHUTDOWN low will
mute the outputs and deactivate almost circuits except
PC-BEEP monitoring block. At this moment, the cur-
rent of this device will be reduced to about 160µA to
save the battery energy. The SHUTDOWN pin should
never be left unconnected during the normal applica-
tions.
INPUT *
SHUTDOWN
AMPLIFIER STATE
INPUT OUTPUT
HP/LINE SE/BTL
X
X
Low
High
High
X
Mute
BTL
SE
Low
Low
Low
High
Line
Line
head-
phone
head-
phone
High
High
Low
High
High
BTL
SE
High
* Inputs should never be left unconnected
X= do not care
PC-BEEP Operation
Input MUX And SE/BTL Operation
The PC-BEEP input allows a system beep to be sent
directly from a computer through the amplifier to the
speakers with a few external components. It is acti-
vated automatically by detecting the PC-BEEP input.
The preferred input signal is a square wave or pulse
train with an amplitude of 1-VPP or greater. To be ac-
curately detected, the signal must be with at least
1-VPP amplitude, 8 continuous rising edges, rise and
fall times less than 0.1µs. When the signal is no longer
detected, the amplifier will return its previous operating
mode and volume setting.
VDD
Vo(PP)
RL
2xVo(PP)
-Vo(PP)
VDD
When the PC-BEEP mode is activated, both the
LINEIN and HPIN are deselected and the outputs will
be driven in BTL mode with the signal from PC-BEEP.
The gain setting will be also fixed at 0.3V/V, inde-
pendent of the volume setting. If the device is in the
SHUTDOWN mode, activating PC-BEEP will take the
device out of shutdown mode and output the
PC-BEEP input signal until the PC-BEEP signal no
longer detected. And then the device will return the
shutdown mode when no PC-BEEP signal is detected.
Figure 5
The G1427 allows two different input sources applied
to the audio amplifiers, which can be independent to
the SE/BTL setting. When HP/LINE is held high, the
headphone inputs are active. When the HP/LINE is
held low, the line inputs are selected.
When SE/BTL is held low, all four internal audio am-
plifiers are activated to drive the stereo speakers.
The PC-BEEP input can be dc-coupled to save the
coupling capacitor. This pin is set at mid-rail normally
when no signal is present.
When SE/BTL is held high, two amplifiers are acti-
vated to drive the stereo headphones. The other two
amplifiers are disable and keeping the outputs high
impedance.
If AC-coupling is desired, the value of the coupling
capacitor should be chosen to satisfy the equation:
CPCB≧ 1/( 2πfPCB*150KΩ)
CPCB is the PC-BEEP AC-coupling capacitor. fPCB is the
frequency of applied PC-BEEP input signal.
TEL: 886-3-5788833
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G1427
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Package Information
D
24
L
1.88
1.88
3.85
E
E1
2.8
0.71
1
Note 5
A2
A1
e
b
NOTE:
1. Package body sizes exclude mold flash protrusions or gate burrs
2. Tolerance ±0.1mm unless otherwise specified
3. Coplanarity : 0.1mm
4. Controlling dimension is millimeter. Converted inch dimensions are not necessarily exact.
5. Die pad exposure size is according to lead frame design.
6. Follow JEDEC MO-153
DIMENSION IN MM
DIMENSION IN INCH
SYMBOL
MIN.
-----
NOM.
-----
MAX.
1.15
0.10
1.05
0.30
0.20
7.90
6.60
4.50
-----
MIN.
-----
NOM.
-----
MAX.
0.045
0.004
0.041
0.012
0.008
0.311
2.260
0.177
-----
A
A1
A2
b
0.00
0.80
0.19
0.09
7.70
6.20
4.30
-----
-----
0.000
0.031
0.007
0.004
0.303
0.244
0.169
-----
-----
1.00
-----
0.039
-----
C
-----
-----
D
7.80
6.40
4.40
0.65
0.60
-----
0.307
0.252
0.173
0.026
0.024
-----
E
E1
e
L
0.45
-----
0.75
0.10
8º
0.018
-----
0.030
0.004
8º
y
θ
0º
-----
0º
-----
Taping Specification
PACKAGE
Q’TY/REEL
2,500 ea
TSSOP-24 (FD)
Feed D irec tion
T ypical T S S O P P a ckage O rientation
GMT Inc. does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and GMT Inc. reserves the right at any time without notice to change said circuitry and specifications.
TEL: 886-3-5788833
http://www.gmt.com.tw
Ver: 1.3
Sep 23, 2005
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