GX434CKC [GENNUM]
GX434 Monolithic 4x1 Video Multiplexer; GX434整体4X1视频多路复用器
| 型号： | GX434CKC |
| 厂家： | 
GENNUM CORPORATION |
| 描述： | GX434 Monolithic 4x1 Video Multiplexer |
| 文件： | 总9页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GX434 Monolithic 4x1
Video Multiplexer
DATA SHEET
CIRCUIT DESCRIPTION
FEATURES
The GX434 is a high performance low cost monolithic 4x1
video multiplexer incorporating four bipolar switches with a
common output, a 2 to 4 address decoder and fast chip select
circuitry. The chip select input allows for multi-chip paralleled
operation in routing matrix applications. The chip is selected
by applying a logic 0 on the chip select input.
• low differential gain: 0.03% typ. at 4.43 MHz
• low differential phase: 0.012 deg. typ. at 4.43 MHz
• low insertion loss: 0.05 dB max at 100 kHz
• low disabled power consumption: 5.2 mW typ.
• high off isolation: 110 dB at 10 MHz
Unlike devices using MOS bilateral switching elements, these
bipolarcircuitsrepresentfullybuffered,unilateraltransmission
paths when selected. This results in extremely high output to
input isolation. They also feature fast make-before-break
switching action. These features eliminate such problems as
switching 'glitches' and output-to-input signal feedthrough.
• all hostile crosstalk @ 5 MHz, 97 dB typ.
• bandwidth (-3dB) with 30 pF load, 100 MHz typ.
• fast make-before-break switching: 200 ns typ.
• TTL and 5 volt CMOS compatible logic inputs
• low cost 14 pin DIP and16 pin SOIC packages
• optimised performance for NTSC, PAL and SECAM
applications
The GX434 operates from ±7 to ± 13.2 volt DC supplies. They
are specifically designed for video signal switching which
requires extremely low differential phase and gain. Logic
inputsareTTLand5voltCMOScompatibleprovidingaddress
and chip select functions. When the chip is not selected, the
output goes to a high impedance state.
APPLICATIONS
Glitch free analog switching for...
• High quality video routing
PIN CONNECTIONS
• A/D input multiplexing
TOP VIEW
• Sample and hold circuits
• TV/ CATV/ monitor switching
IN 0
GND
IN 1
+8V
AO
A1
PIN 1
14
TOP VIEW
IN 0
GND
IN 1
PIN 1
16
+8V
NC
AO
GND
IN 2
CS
AVAILABLE PACKAGING
GND
IN 2
A1
O/P
CS
14 pin DIP and 16 pin SOIC (wide)
GND
REXT
GND
IN 3
NC
O/P
N
REXT
IN 3
7
8
-8V
8
9
-8V
PIN CONNECTION
16 PIN SOIC
PIN CONNECTION
14 PIN DIP
FUNCTIONAL BLOCK DIAGRAM
(wide)
GX434
IN 0
X
TRUTH TABLE
IN 1
X
OUTPUT
IN 2
X
CS A1 A0
OUTPUT
0
0
0
0
0
1
IN 0
IN 1
IN 3
X
0
0
1
1
0
1
IN 2
IN 3
A 0
A 1
CHIP
SELECT
2 TO 4 DECODER
LOGIC
CS
1
X
X
HI - Z
X = DON'T CARE
Document No. 510 - 34 - 2
GENNUM CORPORATION P.O. Box 489, Stn A, Burlington, Ontario, Canada L7R 3Y3 tel. (905) 632-2996 fax: (905) 632-5946
Japan Branch: A-302 Miyamae Village, 2–10–42 Miyamae, Suginami–ku, Tokyo 168, Japan tel. (03) 3334-7700 fax (03) 3247-8839
ABSOLUTE MAXIMUM RATINGS
ORDERING INFORMATION
Parameter
Value & Units
±13.5V
Part Number
Package Type
Temperature Range
0° to 70° C
Supply Voltage
GX434 – – CDB 14 Pin DIP
GX434 – – CKC 16 Pin SOIC
Operating Temperature Range
0°C ≤ TA ≤ 70° C
0° to 70° C
GX434 – – CTC
Tape 16 Pin SOIC
0° to 70° C
Storage Temperature Range
-65°C ≤ TS≤ 150° C
Lead Temperature (Soldering, 10 Sec)
Analog Input Voltage
260° C
-4V ≤ VIN ≤ +2.4V
CAUTION
Analog Input Current
Logic Input Voltage
50µA AVG, 10 mA peak
-4V ≤ VL ≤ +5.5V
ELECTROSTATIC SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
DEVICES EXCEPT AT A
STATIC-FREE WORKSTATION
+Vcc
CS
0.7pF
1.5pF
0.7pF
1.2k
0.7pF
16pF
0.7pF
0.65V
VOUT
V IN
IN
OUT
# 2
+
CS
Common
COUT
2pF
CS
# 3
# 4
3mA
+
600Ω
12pF
1.3 V
-V
Fig.1 Crosspoint Equivalent Circuit
Fig. 2 Disabled Crosspoint Equivalent Circuit
(VS = ±8V DC, 0°C < TA < 70°C, CL = 30 pF, RL = 10kΩ unless otherwise shown.)
ELECTRICAL CHARACTERISTICS
GX434
MAX
PARAMETER
Supply Voltage
DC
SYMBOL
±VS
CONDITIONS
MIN
TYP
8
UNITS
V
7
-
13.2
11.5
0.58
11.2
0.38
-
I+
Chip selected (CS=0)
Chip not selected (CS=1)
Chip selected (CS=0)
Chip not selected (CS=1)
10.5
0.4
mA
mA
mA
mA
SUPPLY
-
Supply current
I-
-
10.2
0.25
-
Analog Output
VOUT
Extremes before clipping
occurs.
-
-
+2
-1.2
V
Analog Input Bias
Current
IBIAS
-
22
-
µA
STATIC
Output Offset Voltage
VOS
TA = 25°C, 75 Ω resistor
on each input to gnd
0
-
7
14
mV
Output Offset Voltage ∆ VOS/∆T
+50
+200
µV/°C
Drift
R
EXT = 33.2 kΩ, 1%
2
510 -34 -2
(V = ±8V DC, 0°C < T < 70°C,C = 30pF, R = 10kΩ unless otherwise shown.)
ELECTRICAL CHARACTERISTICS continued
S
A
L
L
GX434
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP MAX
UNITS
Crosspoint Selection
Turn-On Time
tADR-ON
tADR-OFF
tCS-ON
Control input to appearance
of signal at the output.
130
200
600
300
700
270
800
400
940
ns
Crosspoint Selection
Turn-Off Time
Control input to disappear-
ance of signal at output.
390
200
460
ns
ns
ns
Chip Selection
Turn-On Time
Control input to appearance
of signal at output.
Chip Selection
Turn-Off Time
tCS-OFF
Control input to disappear-
ance of signal at output.
LOGIC
Logic Input
Thresholds
V
1
0
2.0
-
-
-
-
V
V
IH
V
1.1
IL
Address Input
Bias Current
IBIAS(ADR)
Chip selected A0,A1 = 1
Chip selected A0,A1 = 0
-
-
-
-
5.0
0.1
µA
nA
Chip Select Bias
Current
IBIAS(CS)
CS = 1
CS = 0
-
-
-
-
1.0
30
nA
µA
Insertion Loss
I.L.
1V p-p sine or sq. wave at
100 kHz
0.025
100
0.03
0.04
dB
Bandwidth (-3 dB)
B.W.
120
-
-
MHz
dB
Gain Spread at 8 MHz
-
+0.06
-0.04
T
= 25°C, R = 75Ω
A
S
Input to Output Signal
Delay Matching
∆tP
ƒ= 3.579545 MHz
-
-
-
-
±0.15
±0.3
degrees
degrees
(chip to chip)
0°C < T < 70°C, R as
A
S
above, ƒas above.
Input Resistance
RIN
CIN
Chip selected (CS = 0)
900
-
-
kΩ
DYNAMIC
Input Capacitance
Chip selected (CS = 0)
-
-
2.0
2.4
-
-
pF
pF
Chip not selected (CS = 1)
Output Resistance
ROUT
Chip selected (CS = 0)
-
14
-
Ω
Output Capacitance
Differential Gain
COUT
dg
Chip not selected (CS = 1)
-
-
15
-
pF
%
0.03
0.05
at 3.579545 MHz
Differential Phase
dp
VIN = 40 IRE, (Fig. 7)
-
0.012
0.025
degrees
All Hostile Crosstalk
(see graph)
XTALK (AH)
Sweep on 3 inputs 1V p-p
4th input has 10 Ω resistor to
gnd. ƒ = 5 MHz (Fig. 6)
94
97
-
-
dB
dB
Chip Disabled Crosstalk XTALK(CD)
(see graph)
100
110
ƒ = 10 MHz (Fig. 5)
+SR
360
160
450
200
-
-
V/µs
V/µs
VIN = 3V p-p (CL = 0 pF)
Slew Rate
-SR
REXT = 33.2kΩ, 1%
3
510 -34 -2
TYPICAL PERFORMANCE CURVES OF THE GX434
14
12
10
8
0
15 pF
-1
30 pF
50 pF
70 pF
-2
-3
Load Capacitance
0 pF
6
4
-4
10 pF
27 pF
Load Capacitance
-5
-6
47 pF
2
0
-7
-2
-4
-8
-9
-6
-10
1
10
100
200
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
Gain vs Frequency
Phase vs Frequency
-40
40
50
-50
-60
-70
R
R
R
= 75 Ω
IN
IN
60
= 75 Ω
= 37.5 Ω
= 10 Ω
R
R
= 75Ω
IN
IN
= 37.5Ω
= 10Ω
70
IN
R
IN
R
IN
SW1 / SW2
SW0 - SW3
80
-80
-90
90
100
110
-100
-110
R
= 10 kΩ
R
= 10 kΩ
L
L
100
0.1
10
1
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
All Hostile Crosstalk (14 pin DIP)
All Hostile Crosstalk (16 pin SOIC)
For all graphs, VS = ±8 V DC and TA = 25°C. The curves shown above represent typical batch sampled results.
4
510 -34 -2
110
100
110
90
100
90
80
70
60
Analog signal
IN is 40 IRE
(286 mV p-p)
at 10 MHz
50
80
100
10
+3
+1
0
+2
-1
FREQUENCY (MHz)
INPUT BIAS (V)
Chip Disabled Crosstalk vs Frequency
Chip Disabled Crosstalk vs Input Bias (V)
+0.05
+0.05
+0.04
+0.03
+0.02
+0.01
dg %
Blanking level
0V DC
+0.04
+0.03
dg %
0
dp °
-0.01
+0.02
ƒ = 3.58 MHz
Blanking level is
-0.02
-0.03
dp °
clamped to V
BIAS
+0.01
0
-0.04
-0.05
-0.2
-0.8
-0.6
0
+0.2 +0.4
+0.6
+0.8
-0.4
INPUT BIAS (V)
2
4
5
8
10
1
3
3.58
dg/dp vs Input Bias
FREQUENCY (MHz)
dg/dp vs Frequency
30 MΩ
10 MΩ
+1.0
+0.8
4
3
R
+0.6
IN OFF
R
+0.4
+0.2
IN ON
1 MΩ
100 kΩ
10 kΩ
0.1
C
IN OFF
-0.2
C
IN ON
-0.4
-0.6
2
1
-0.8
-1.0
1
10
0.1
100
-1
0
+1
+2
+3
FREQUENCY (MHz)
INPUT BIAS (V)
Input Impedance
Normalized Gain Spread CL = 30pF
5
510 -34 -2
0.1 V/div
10 mV/div
1 µs/div
0.5 µs/div
Fig. 4 Switching Envelope (crosspoint to crosspoint)
Fig.3 Switching Transient (crosspoint to crosspoint)
VIN
VOUT
Chip disabled crosstalk = 20 log
All hostile crosstalk = 20 log
VOUT
VIN
RIN
VOUT
VOUT
ENABLED
VIN
CROSSPOINT
RL ≥10 kΩ
VIN
37.5 Ω
Fig. 6 All Hostile Crosstalk Test Circuit
Fig. 5 Chip Disabled Crosstalk Test Circuit
10 µH
10 µH
LUMINANCE LEVEL
BLANKING LEVEL
RELAY SWITCH
220 Ω
8 V
3.9 kΩ
CONTROL BIT
FROM I/O PORT
0.1µF
BUFFER
AC
COUPLING
150 Ω
150 Ω
AMP
R.F. SIGNAL
SOURCE
75 Ω
x 2
75 Ω
75 Ω
RL
DUT
CL
Fig. 7 Differential Phase and Gain Test Circuit
DIFFERENTIAL GAIN AND PHASE TEST CIRCUIT
The test circuit of Figure 7 allows two DC bias levels, set by
the user, to be superimposed on a high frequency signal
source. Acomputercontrolledrelayselectseitherthepreset
blanking or luminance level. One measurement is taken at
each level and the change in gain or phase is calculated.
This procedure is repeated one hundred times to provide a
reasonably large sample.
The results are averaged to reduce the standard deviation
and therefore improve the accuracy of the measurement.
The output from the device under test is AC coupled to a
buffer amplifier which allows the buffer to operate at a
constant luminance level so that it does not contribute any dg
or dp to the measurement.
6
510 -34 -2
OPTIMISING THE PERFORMANCE OF THE GX434
1. Power Supply Considerations
Table 1 shows the effect on differential gain (dg) and
differentialphase(dp)ofvariouspowersupplyvoltages
that may be used. A nominal supply voltage of ±8
volts result in parameter values as shown in the top
row of the table. By using other power supply voltage
combinations, improvements to these parameters are
possible at the sacrifice of increased chip power
dissipation. Maximum degradation of the differential
gain and phase occurs for the last combination of +12
, -7 volts along with an increase in power dissipation;
these voltages are not recommended.
Supply
Voltage
Differential Gain
Differential Phase
degrees
%
(Typical)
(Typical)
±8
0.030
0.010
0.010
0.084
0.012
0.007
0.007
0.080
+8/ -12
±12
+12/ -7
Table 2 shows the general characteristic variations
of the GX434 when different combinations of power
supply voltages are used. These changes are rela-
tive to a circuit using ± 8 volts Vcc.
Supply Voltage
Characteristic Changes
± 7
- lower logic thresholds
- max logic I/P (≈ 4.5V)
- loss of off isolation (≈20 dB)
- poorer dg and dp
+8/ -12
- slight increase in negative
supply current
- slight decrease in offset
- very similar frequency response
- better dg and dp
±12
- increase in supply current (10%)
- increase in offset (≈ 2-4 mV)
- very similar frequency response
- better dg and dp
+12/ -7
- loss in off isolation (≈20 dB)
- poorer dg and dp
The GX434 does not require input DC biasing to
optimise dg or dp nor does it need switching
transient suppression at the output. Furthermore,
both the analog signal and logic circuits within the
chipuseonecommonpowersupply,makingpower
supplyconfigurationsrelatively simpleandstraight-
forward. Several of the input characteristic graphs
onpages4-5showthatforbestoperation, theinput
bias should be 0 volts. The switching transient
photographs on page 6 show how small the actual
transients are and clearly show the make-before-
breakactionoftheGX434videomultiplexerswitch.
7
510 -34 -2
2.
Load Resistance Considerations
3. Multi-chip Considerations
TheGX434crosspointswitchisoptimisedforloadresistances
equal to or greater than 3 kΩ. Figure 8 shows the effect on the
differential gain and phase when the load resistance is varied
from 100 Ω to 100 kΩ.
Whenever multi-chip bus systems are to be used, the total
input and output capacitance must be carefully considered.
Theinput capacitanceofanenabledcrosspoint(chipselected),
is typically only 2 pF and increases slightly to 2.4 pF when the
chip is disabled. The total output capacitance when the chip
is disabled is approximately 15 pF per chip.
10
ƒ= 3.58 MHz, 20 IRE
BLANKING LEVEL = 0V DC
1.0
Usually the GX434 multiplexer switch is used in a matrix
configuration of (n x 1) crosspoints perhaps combined in an
(n x m) total routing matrix. This means for example, that four
ICs produce a 16 x 1 configuration and have a total output
capacitance of 4 x15 pF or 60 pF if all four chips are disabled.
Foranyoneenabledcrosspoint,theeffectiveloadcapacitance
will be 3 x15 pF or 45 pF.
dg
dp
0.1
0.01
In a multi-input/multi-output matrix, it is important to consider
thetotalinputbuscapacitance.Thehigher thebuscapacitance
and the more it varies from the ON to OFF condition, the more
difficult it is to maintain a wide frequency response and
constant drive from the input buffer. A 16 x 16 matrix using 64
ICs (16 x 4), would have a total input bus capacitance of 16 x
2.4 pF or 40 pF.
0.001
100
1K
10K
100K
RL (Ω)
Fig. 8 dg/dp vs RL
The negative slew rate is dependant upon the output current
and load capacitance as shown below.
-SR = I + 3 mA
I ≤ 8 mA
CL
The current I is determined from the following equation:
GX
414
GX
414
I = -VEE
R ≥ 1 k Ω
1
2
3
4
GX
414
GX
414
R
It is possible to increase the negative slew rate (-S.R.) and thus
the large signal bandwidth, by adding a resistance from the
output to - VEE. This resistor increases the output current above
the 3 mA provided by the internal current generator and
increases the negative slew rate. The additional slew rate
improving resistance must not be less than 1kΩ in order to
prevent excessive currents in the output of the device. An
adverse effect of utilising this negative slew rate improving
resistor, is the increase in differential phase from typically
0.009° to 0.014°. Under these same conditions, the differential
gain drops from typically 0.033 % to 0.021 %.
GX
414
5
6
7
8
GX
414
GX
414
GX
414
GX
414
9
10
11
12
GX
414
GX
414
GX
414
+8V
n
1
14
13
12
IN 0
2
A0
A1
GND
IN 1
3
O
U
T
P
U
11
T
4
5
6
7
B
U
F
F
E
R
GND
IN 2
CS
NC
S
10
9
OUTPUT
GND
IN 3
1
R ≥ 1kΩ
8
2
3
m
-8V
Fig.9 Negative Slew Rate (-SR) Improvement
Fig.10 Multi-chip Connections
8
510 -34 -2
APPLICATIONS INFORMATION
The GX434 multiplexer is a very high performance,
widebandcircuitrequiringcarefulexternalcircuitdesign.
Good power supply regulation and decoupling are
necessarytoachieveoptimumresults.Thecircuitdesigner
must use proper lead dress, component placement and
PCB layout as in any high frequency circuit.
A typical video routing application is shown in Figure 11.
Four ICs are used in a 16 x 1 multiplexer switching circuit.
An external address decoder is shown which generates
the 16 address and chip enable codes from a binary
number. The address inputs to each chip are active high
whilethechipselectinputsareactivelow. Dependingon
the application and speed of the logic family used,
latchesmayberequiredforsynchronizationwheretiming
and delays are critical. Since the individual crosspoint
switchingcircuitsareunidirectionalbipolarelements,low
crosstalk and high isolation are inherent. The make-
before-break switching characteristics of the GX434
means virtually 'glitch' free switching.
Functionally, the video switches are non-inverting, unity
gain bipolar switches with buffered inputs requiring DC
coupling and 75Ω line terminating resistors when directly
driven from 75Ω cable. The output must be buffered to
drive 75Ω lines. This is usually accomplished with the
addition of an operational amplifier/ buffer which also
allows adjustments to be made to the gain, offset and
frequency response of the overall circuit.
VIDEO INPUTS
GX434 SWITCHES
BINARY ADDRESS
DECODER
+8V
0.1
1
2
14
IN 0
+V
V 0
13
12
A 0
A 1
GND
IN 1
A 0
A 1
3
4
5
6
V 1
V 2
V 3
11
10
9
8
CS
GND
IN 2 OUT
GND
REXT
-V
7
IN 3
33K
1%
4
3
0.1
0.1
A 2
75
75
75
75
1
2
5
6
A 3
2
-8V
+8V
74HC139
1
ENABLE
7
1
2
14
IN 0
GND
IN 1
V 4
+V
13
12
11
A 0
A 1
16
8
+5V
0.1
3
4
5
6
V 5
V 6
V 7
CS
GND
IN 2
10
OUT
REXT
-V
9
8
GND
IN 3
7
33K
1%
0.1
75
75
75
75
+5V
-8V
+8V
0.1
0.1
0.1
330
3
7
4
+
1
2
14
75
IN 0
GND
+V
6
V 8
Video
Out
13
12
2-10pF
100
A 0
A 1
2
3
4
5
6
-
IN 1
GND
IN 2
V 9
250
11
10
9
8
CS
V 10
530000
OUT
REXT
-V
GND
7
V 11
IN 3
33K
1%
CLC 410 (comlinear)
0.1
75
75
-5V
75
75
-8V
+8V
DOCUMENT
IDENTIFICATION
0.1
PRODUCT PROPOSAL
This data has been compiled for market investigation purposes
only, and does not constitute an offer for sale.
1
14
IN 0
+V
V 12
V 13
13
12
2
3
4
5
6
7
GND
IN 1
GND
IN 2
A 0
A 1
ADVANCE INFORMATION NOTE
11
10
9
8
CS
OUT
REXT
This product is in development phase and specifications are
subject to change without notice. Gennum reserves the right to
remove the product at any time. Listing the product does not
constitute an offer for sale.
V14
V15
GND
-V
IN 3
0.1
33K
1%
75
75
PRELIMINARY DATA SHEET
75
75
The product is in a preproduction phase and specifications are
subject to change without notice.
-8V
All resistors in ohms, all capacitors in
microfarads unless otherwise stated.
DATA SHEET
The product is in production. Gennum reserves the right to make
changes at any time to improve reliability, function or design, in
order to provide the best product possible.
Fig.11
16 x 1 Video Multiplexer Circuit
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
©Copyright August 1989 Gennum Corporation.
Revision date: January 1993.
All rights reserved.
Printed in Canada.
9
510 -34 -2
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