GS1511 [GENNUM]
HD-LINX -TM GS1511 HDTV Serial Digital Formatter; HD- LINX -TM GS1511高清晰度电视串行数字格式化
| 型号： | GS1511 |
| 厂家： | 
GENNUM CORPORATION |
| 描述： | HD-LINX -TM GS1511 HDTV Serial Digital Formatter |
| 文件： | 总9页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
™
HD-LINX GS1511
HDTV Serial Digital Formatter
DATA SHEET
KEY FEATURES
DESCRIPTION
• SMPTE 292M compliant
The GS1511 HDTV Serial Digital Formatter formats the
HDTV Luma and Chroma data according to SMPTE 292M
prior to serialization by the GS1522 HDTV Serializer. The
GS1511 optionally inserts TRS and line number signals
based on externally supplied H, V and F signals. The
device also allows the insertion of CRCs based on TRS
signals embedded in the input data streams, should the
user choose not to supply external HVF signals.
• NRZ(I) encoding
• SMPTE 292M scrambler with BYPASS option
• selectable TRS insertion
• selectable line number insertion
• selectable line based CRC insertion
• selectable active picture illegal code re-mapping
• 20 bit 3.3V CMOS compatible input data bus
• optimized output interface to GS1522
• Pb-free and Green
Following the insertion of TRS, Line Number, and CRC,
protected words of 000-003 and 3FC to 3FF occurring
during the active video period are optionally re-mapped to
004 and 3FB respectively. Prior to exiting the device SMPTE
292M compliant NRZ(I) encoding and scrambling may be
performed on the data stream.
• single +3.3V power supply
• 5V tolerant I/O
APPLICATIONS
• SMPTE 292M Serial Digital Interfaces
TRS_Y/C
DET_TRS
TRS_INS
LN_INS
CRC_INS
CODE
PROTECT
2
BP_SC
3
DATA_IN
[19:10]
DATA_OUT
[19:0]
TRS
INSERTION
NRZI
ENCODER
(LUMA)
INPUT
BUFFER
and
TRS
and
LINE NUMBER
DETECTION
ILLEGAL CODE
REMAPPING
LINE NUMBER
INSERTION
DATA_IN
[9:0]
SMPTE
SCAMBLER
BLANKER
CRC INSERTION
(CHROMA)
PCLK_IN
3
BLANK
[H:V:F]
RSTLN
SRST
OEN
GS1511 FUNCTIONAL BLOCK DIAGRAM
Revision Date: June 2004
Document No. 52248 - 5
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946 E-mail: info@gennum.com
www.gennum.com
TABLE OF CONTENTS
1. PIN OUT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 PIN ASSIGNMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-6
2. ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 ABSOLUTE MAXIMUM RATINGS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 DC ELECTRICAL CHARACTERISTICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 AC ELECTRICAL CHARACTERISTICS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3. DETAILED DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4. REFERENCES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5. PACKAGE & ORDERING INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1 PACKAGE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2 ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
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1. PIN OUT
1.1 PIN ASSIGNMENT
NC
NC
NC
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
V
DD
GND
OEN
TN
V
DD
GND
TEST
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
V
V
V
DD
DD
DD
V
DD
GND
GND
V
F
DD
V
V
H
DD
GS1511
TOP
VIEW
GND
V
V
V
V
V
V
V
V
V
DD
DD
DD
DD
DD
DD
DD
DD
DD
GND
V
DD
GND
CRC_INS
LN_INS
GND
TRS_INS
TRS Y/C
SRST
GND
V
V
DD
BP_SC
DD
GND
GND
RSTLN
8
CODE_PROTECT
GND
V
V
V
V
V
V
V
7
DD
DD
DD
DD
DD
DD
DD
6
BLANK
DET_TRS
GND
5
4
3
V
DD
2
GND
1
PCLK_IN
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1.2 PIN DESCRIPTIONS
PIN NUMBER
NAME
PCLK_IN
GND
TIMING
Synchronous
N/A
TYPE
Input
DESCRIPTION
1
Parallel Data Clock input. 74.25MHz or 74.25/1.001MHz.
Ground. Ground power supply connections.
2, 4, 14, 19, 24,
37, 46, 50, 58,
69, 79, 82, 91,
94, 110, 116,
128
Ground
3, 20, 25, 38, 47,
51, 59, 68, 78,
81, 90, 93, 99,
102, 109, 115,
127
VDD
N/A
Power
Input
Power. Positive power supply connections.
5
DET_TRS
Non-
synchronous
Control Signal Input. Used to enable or disable the detection of
the TRS signals embedded in the video stream. When DET
_TRS is high, the device detects the TRS signals embedded in
the input video stream and uses the detected HVF signals
instead of the external HVF signals. When DET _TRS is low,
TRS detection is disabled. The device uses the external
supplied HVF signals.
6
BLANK
GND
Synchronous
wrt PCLK_IN
Input
Control Signal Input. When BLANK is low, the device sets the
accompanying LUMA and CHROMA data to their appropriate
blanking levels. When BLANK is high, the LUMA and CHROMA
data streams pass through this stage of the device unaltered.
See timing diagram Figure 3.
7, 17, 95
N/A
Ground. This pin must be connected to GND for normal
operation.
8
CODE_PROTECT
Non-
synchronous
Input
Control Signal Input. Used to enable or disable re-mapping of
out-of-range words contained in the active portion of the video
signal. When this signal is high, the device re-maps out-of-
range words contained within the active portion of the video
signal into CCIR-601 compliant words. Values between 000-003
are re-mapped to 004. Values between 3FC and 3FF are re-
mapped to 3FB. When this signal is low, out-of-range words in
the active video region pass through the device unaltered.
9
RSTLN
BP_SC
Synchronous
wrt PCLK_IN
Input
Input
Control Signal Input. Line number reset signal which must be
asserted once per frame at the beginning of the frame (for
example, on the falling edge of the F signal). A high to low
transition will reset the line number counter of the device to one
(1). See Figure 2 for timing.
10
Non-
synchronous
Control Signal Input. Used to enable or bypass the SMPTE292M
scrambler and NRZ(I) encoder. When BP_SC is low, the video
stream is scrambled according to SMPTE 292M and NRZ(I)
encoded. When BP_SC is high, the scrambler and NRZ(I)
encoder are by-passed.
11
12
SRST
Non-
synchronous
Input
Input
Control Signal Input. Used to reset the SMPTE292M scrambler
and NRZI encoder. When SRST is low, the scrambler and
encoder operate normally. A low to high transition on SRST
causes the scrambler and encoder to reset.
TRS_Y/C
Non-
synchronous
Control Signal Input. Only used when DET_TRS is high. When
TRS_Y/C is high, the device detects and uses TRS signals
embedded in the LUMA (DATA_IN[19:10]) channel. When
TRS_Y/C is low, the device detects and uses TRS signals
embedded in the CHROMA (DATA_IN[9:0]) channel.
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1.2 PIN DESCRIPTIONS (Continued)
PIN NUMBER
NAME
TIMING
TYPE
DESCRIPTION
13
TRS_INS
Non-
synchronous
Input
Control Signal Input. Used to enable or disable insertion of TRS
into the video streams. When TRS_INS is high, the device
inserts SMPTE 292M compliant TRS signals into the input LUMA
and CHROMA data streams based on the supplied HVF
signals. When TRS_INS is low, the device does not insert TRS
signals.
15
LN_INS
Non-
synchronous
Input
Control Signal Input. Used to enable or disable insertion of line
numbers into the video stream. When LN_INS is high, the
device inserts SMPTE 292M compliant line number information
into the LUMA and CHROMA channels. When LN_INS is low,
the device does not insert the line number information into the
LUMA and CHROMA channels. Line number insertion is only
available when user supplied external FVH data is used
(DET_TRS set LOW).
16
CRC_INS
Non-
synchronous
Input
Control Signal Input. Used to enable or disable insertion of
CRCs into the video stream. When CRC_INS is high, the device
calculates and inserts line based CRCs. When CRC_INS is low,
this feature is disabled.
18, 99, 102, 76,
77, 80, 83-89,
92, 96-98, 100,
101
VDD
N/A
This pin must be connected to VDD for normal operation.
21
H
Synchronous
wrt PCLK_IN
Input
Input
Control Signal Input. This signal indicates the Horizontal
blanking period of the input video data stream. The device
inserts HDTV TRS based on the supplied HVF signals. Refer to
Figure 4 for required timing of H relative to LUMA
(DATA_IN[19:10]) and CHROMA (DATA_IN[9:0]).
22
V
Synchronous
wrt PCLK_IN
Control Signal Input. This signal indicates the Vertical blanking
period of the input video data streams. Refer to Figure 4 for
required timing of V relative to LUMA (DATA_IN[19:10]) and
CHROMA (DATA_IN[9:0]).
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1.2 PIN DESCRIPTIONS (Continued)
PIN NUMBER
NAME
TIMING
TYPE
DESCRIPTION
23
F
Synchronous
wrt PCLK_IN
Input
Control Signal Input. This signal indicates the ODD/EVEN field
of the input video data streams. Refer to Figure 4 for required
timing of F relative to LUMA (DATA_IN[19:10]) and CHROMA
(DATA_IN[9:0]). When the input video format is progressive
scan, F should remain low at all times.
26, 27, 28, 29,
NC
N/A
N/A
No Connect. Do not connect these pins.
30-34, 65, 66,
67,
71-75,
35
TN
TEST
Input
Test pin. Used for test purposes only. This pin must be
connected to VDD for normal operation.
36
OEN
Non-
synchronous
Control Signal Input. Used to enable the DATA_OUT[19:0]
output bus or set it to a high Z state. When OEN is low, the
DATA_OUT[19:0] bus is enabled. When OEN is high, the
DATA_OUT[19:0] bus is disabled and in a high Z state.
64, 63, 62, 61,
60, 57 56, 55,
54, 53, 52, 49,
48, 45, 44, 43,
42, 41, 40, 39
DATA_OUT[19:0]
Synchronous
wrt PCLK_IN
Outputs
Output Data Bus. The device generates a 20 bit wide data
stream running at 74.25 (or 74.25/1.001) MHz. DATA_OUT[19]
is the MSB and DATA_OUT[0] is the LSB.
70
TEST
N/A
TEST
Input
Test Pin. Used for test purposes only. This pin must be
connected to GND for normal operation.
103,104,105,
106, 107, 108,
111, 112, 113,
114
DATA_IN [19:10]
(LUMA channel)
Synchronous
wrt PCLK_IN
Input Data Bus. LUMA CHANNEL. DATA_IN [19] is the MSB of
the LUMA input signal (pin 103). DATA_IN [10] is the LSB of the
LUMA input signal (pin 114).
117, 118, 119,
120, 121, 122,
123, 124, 125,
126
DATA_IN [9:0]
Synchronous
wrt PCLK_IN
Input
CHROMA Input Data Bus. CHROMA CHANNEL DATA_IN [9] is
the MSB of the CHROMA signal (pin 117). DATA_IN [0] is the
LSB of the CHROMA signal (pin 126).
(CHROMA channel)
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2. ELECTRICAL CHARACTERISTICS
2.1 ABSOLUTE MAXIUMUM RATINGS
PARAMETER
VALUE
-0.5V to +4.6V
Supply Voltage
Input Voltage Range (any input)
Operating Temperature Range
Storage Temperature Range
-0.5V < VIN < 5.5V
0°C ≤ TA ≤ 70°C
-40°C ≤ TS
≤
125°C
Lead Temperature (soldering 10
seconds)
260°C
2.2 DC ELECTRICAL CHARACTERISTICS
VDD = 3.0 to 3.6V, TA = 0°C to 70°C, unless otherwise shown
PARAMETER
Positive Supply Voltage
Supply Current
SYMBOL
VDD
CONDITIONS
MIN
3.0
-
TYP
3.3
MAX
3.6
UNITS
V
NOTES
ΙDD
ƒ = 74.25MHz, TA
= 25°C
413
480
mA
Input Logic LOW Voltage
Input Logic HIGH Voltage
Output Logic LOW Voltage
VIL
VIH
VOL
I
I
LEAKAGE < 10µA
LEAKAGE < 10µA
-
2.1
-
-
0.8
5.0
0.4
V
V
V
3.3
0.3
VDD = 3.0 to 3.6V,
OL= 4mA
I
Output Logic HIGH Voltage
VOH
VDD = 3.0 to 3.6V,
OH = -4mA
2.6
-
-
V
I
2.3 AC ELECTRICAL CHARACTERISTICS
VDD = 3.0 to 3.6V, TA = 0°C to 70°C, unless otherwise shown
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Clock Input Frequency
FHSCI
-
74.25
80
MHz
Also supports 74.25/
1.001MHz
Input Data Setup Time
Input Data Hold Time
Input Clock Duty Cycle
Output Data Hold Time
Output Enable Time
tSU
tIH
2.5
1.5
40
2.0
-
-
-
-
-
-
-
-
ns
ns
%
50% levels
50% levels
60
-
tOH
With 15pF load
With 15pF load
With 15pF load
With 15pF load
With 15pF load
ns
ns
t
8
oen
Output Disable Time
t
-
-
-
-
-
-
10
10
ns
ns
ns
odis
tOD
Output Data Delay Time
Output Data Rise/Fall Time
2.75
20% to 80% levels
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3.2 INPUT BLANKER
3. DETAILED DESCRIPTION
Data words entering the GS1511 can be dynamically set to
Luma and Chroma blanking levels if desired as shown in
Figure 3. Blanking is applied to both the LUMA and
CHROMA channels simultaneously.
3.1 DATA INPUT AND OUTPUTS
Data enters and exits the device synchronous to the rising
edge of PCLK_IN as shown in Figure 1.
PCLK_IN
DATA
DATA
DATA
DATA
DATA
DATA
DATA
DATA_IN
DATA_OUT
tSU
tIH
tOH
tOD
Fig. 1 Synchronous I/O Timing
PCLK_IN
DATA_IN[19:0]
RSTLN
XYZ
(EAV ID)
3FF
000
000
LN0
LN1
Line#1 Inserted
Here
n Frames
EAV For Line#1
Transistion From Low To High Can Happen at Any Point
Fig. 2 RSTLN Timing
PCLK_IN
WORD
X
WORD
X+1
WORD
X+2
WORD
X+3
WORD
X+4
WORD
X+6
WORD
X+7
WORD
X+8
DATA_IN[19:0]
Data To Be Blanked
BLANK
Fig. 3 Timing of Dynamic Data Blanking
PCLK_IN
DATA_IN[19:10]
(LUMA)
XYZ
YLN0
XYZ
(SAV ID)
3FF
3FF
000
000
000
000
3FF
000
000
000
(EAV ID)
DATA_IN[9:0]
(CHROMA)
XYZ
CLN0
XYZ
(SAV ID)
3FF
000
(EAV ID)
H
V
F
Fig. 4 HVF Input Timing
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4. REFERENCES
Compliant with SMPTE 292M.
5. PACKAGE & ORDERING INFORMATION
5.1 PACKAGE DIMENSIONS
0.25
23.20
0.10
20.0
18.50 REF
12 TYP
0.75 MIN
0 -7
0.25
17.20
12.50 REF
0.30 MAX RADIUS
0 - 7
0.10
14.0
0.13 MIN.
RADIUS
0.15
0.88
1.6
REF
3.00 MAX
128 pin MQFP
0.25
All dimensions in millimetres
2.80
0.08
0.50 BSC
0.27
5.2 ORDERING INFORMATION
PART NUMBER
PACKAGE
TEMPERATURE RANGE
0°C to 70°C
Pb-FREE AND GREEN
GS1511-CQR
128 pin MQFP
128 pin MQFP
No
GS1511-CQRE3
0°C to 70°C
Yes
CAUTION
ELECTROSTATIC
SENSITIVE DEVICES
DO NOT OPEN PACKAGES OR HANDLE
EXCEPT AT A STATIC-FREE WORKSTATION
REVISION NOTES:
DOCUMENT IDENTIFICATION
DATA SHEET
Added Pb-free and green information.
The product is in production. Gennum reserves the right to make
changes at any time to improve reliability, function or design, in order to
provide the best product possible.
For latest product information, visit www.gennum.com
GENNUM JAPAN CORPORATION
Shinjuku Green Tower Building 27F 6-14-1, Nishi Shinjuku Shinjuku-ku,
Tokyo 160-0023 Japan
GENNUM CORPORATION
MAILING ADDRESS:
P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. +1 (905) 632-2996 Fax. +1 (905) 632-5946
Tel: +81 (03) 3349-5501 Fax: +81 (03) 3349-5505
GENNUM UK LIMITED
SHIPPING ADDRESS:
970 Fraser Drive, Burlington, Ontario, Canada L7L 5P5
25 Long Garden Walk, Farnham, Surrey, England GU9 7HX
Tel. +44 (0)1252 747 000 Fax +44 (0)1252 726 523
Gennum Corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
© Copyright May 2002 Gennum Corporation. All rights reserved. Printed in Canada.
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