GPES230B2 [GENERALPLUS]
Easy-to-use SOUNDPLUS;
| 型号： | GPES230B2 |
| 厂家： | 
Generalplus Technology Inc. |
| 描述： | Easy-to-use SOUNDPLUS |
| 文件： | 总15页 (文件大小：719K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
GPES230B2
Easy-to-use SOUNDPLUS
MAR. 01, 2011
Version 1.2
GENERALPLUS TECHNOLOGY INC. reserves the right to change this documentation without prior notice. Information provided by GENERALPLUS
TECHNOLOGY INC. is believed to be accurate and reliable. However, GENERALPLUS TECHNOLOGY INC. makes no warranty for any errors which may
appear in this document. Contact GENERALPLUS TECHNOLOGY INC. to obtain the latest version of device specifications before placing your order. No
responsibility is assumed by GENERALPLUS TECHNOLOGY INC. for any infringement of patent or other rights of third parties which may result from its use.
In addition, GENERALPLUS products are not authorized for use as critical components in life support devices/systems or aviation devices/systems, where a
malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Generalplus.
GPES230B2
Table of Contents
PAGE
1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3
2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3
3. FEATURES.................................................................................................................................................................................................. 3
4. SIGNAL DESCRIPTIONS............................................................................................................................................................................ 4
4.1. PAD ASSIGNMENT ................................................................................................................................................................................. 5
5. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 6
5.1. INSTRUCTION SETS................................................................................................................................................................................ 6
5.2. I/O DESCRIPTION................................................................................................................................................................................... 6
5.3. PROGRAM STRUCTURE OVERVIEW ......................................................................................................................................................... 6
5.3.1. Definition area........................................................................................................................................................................... 6
5.3.1.1. IC body................................................................................................................................................................................ 6
5.3.1.2. Debounce............................................................................................................................................................................ 6
5.3.1.3. Variable ............................................................................................................................................................................... 6
5.3.1.4. External clock...................................................................................................................................................................... 6
5.3.1.5. Low voltage reset................................................................................................................................................................ 7
5.3.1.6. Infrared Red (IR) Function .................................................................................................................................................. 7
5.3.2. Entry point (Label)..................................................................................................................................................................... 7
6. GPES II PROGRAMMING TOOL ................................................................................................................................................................ 8
7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 9
7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 9
7.2. DC CHARACTERISTICS (VDD = 3.0V, TA = 25℃) .................................................................................................................................... 9
7.3. DC CHARACTERISTICS (VDD = 4.5V, TA = 25℃) .................................................................................................................................... 9
7.4. (3VOLT) R RELATIVE FOSC TABLE (THE TABLE IS ONLY FOR REFERENCE)................................................................................................... 9
7.5. THE RELATIONSHIPS BETWEEN THE ROSC AND THE FCPU......................................................................................................................... 10
7.5.1. VDD = 3.0V, TA = 25℃............................................................................................................................................................ 10
7.5.2. VDD = 4.5V, TA = 25℃............................................................................................................................................................ 10
7.6. THE RELATIONSHIPS BETWEEN THE FCPU AND THE IOP ............................................................................................................................ 10
7.7. THE RELATIONSHIPS BETWEEN THE FCPU AND THE VDD......................................................................................................................... 10
8. APPLICATION CIRCUITS......................................................................................................................................................................... 11
8.1. 4 INPUTS, 2 LEDS AND 6 OUTPUTS .......................................................................................................................................................11
8.2. 28 INPUTS KEY MATRIX .........................................................................................................................................................................11
8.3. 36 INPUTS KEY MATRIX ........................................................................................................................................................................ 12
8.4. PTG PIN PULL-HIGH RESISTANCE ........................................................................................................................................................ 12
9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 13
9.1. ORDERING INFORMATION ..................................................................................................................................................................... 13
10.DISCLAIMER............................................................................................................................................................................................. 14
11. REVISION HISTORY ................................................................................................................................................................................. 15
© Generalplus Technology Inc.
Proprietary & Confidential
2
Mar. 01, 2011
Version: 1.2
GPES230B2
Easy-to-use SOUNDPLUS
1. GENERAL DESCRIPTION
3. FEATURES
The easy-to-use SOUNDPLUS II (GPESII) is an enhanced version
of easy-to-use SOUNDPLUS (GPES). Many features have been
added in GPES II to increase its capability and performance.
One of the most significant features in GPES II is that no complex
program structure is necessary. With only nine instructions and
six registers, GPES II is capable of driving sophisticated tasks and
playing realistic sound with simple program structure.
Programmer can easily implement application rapidly and increase
productivity efficiently.
96KB ROM SIZE
Programmable speech synthesizer
Operating voltage:
─ 1.9V - 5.5V for 4.0MHz operating clock
─ 3.6V - 5.5V for 6.0MHz operating clock
4 direct trigger inputs that can be extended to 36 matrix key
Up to 8 programmable outputs
Programmable power on initialization
256 voice group entries available
Mask options: Trigger input debounce time from 5ms to 35ms
Flexible functions through the following:
─ LD (load), JP (jump) commands
─ 6 registers: R0, R1, R2, R3, EN, STOP
─ Conditional instructions
The GPES230B2, one of the GPES II families, stores up to 30
seconds of sound data (@ 6.0KHz sample rate). It also contains
four trigger pins, eight output pins, PWM audio output, and five
LED flash alternations. To assure the system reliability, a
watchdog and a Low Voltage Reset (LVR) are also built in for
─ Speech equation
─ END instruction
monitoring possible critical conditions.
With the high
─ Local repeat setting
cost/performance ratio, GPES230B2 is one of the most suitable
engines in the industry for vocal products.
─ Output frequency and LED flash type setting
Approx. 30 sec. speech (6.0KHz sample rate)
Low voltage reset function
2. BLOCK DIAGRAM
Watchdog function
A pair of PWM outputs
VDD
Flexible functions as the follows:
─ Interrupt or non-interrupt for rising or falling edge of each
ROM
VSS
trigger.
TEST
TG1
STOP0
STOP1
STOP2
STOP3
STOP4
STOP5
STOP6
STOP7
─ Eight programmable playing modes:
．One shot
TG2
．Level hold
Controller
PWM
TG3
TG4
．Single-cycle level hold
．Complete-cycle level hold
．Sequence
ROSC
CKT
ROSC
Low
Voltage
Reset
．Level-Auto
AUDP
AUDN
．Random
．Non-retrigger
─ Stop signal output setting
Each voice section provides
─ Programmable sampling frequency:
．2K to 10K for 4.0MHz operating clock
．2K to 15K for 6.0MHz operating clock
─ Five LED flash type : On, Off, Alternatively, Synchronous,
Volume-controlled
─ LED: programmable
Infrared Red (IR) communication Function
Play Speech with tags, Seven different tags are available
© Generalplus Technology Inc.
Proprietary & Confidential
3
Mar. 01, 2011
Version: 1.2
GPES230B2
4. SIGNAL DESCRIPTIONS
Mnemonic
TG4 - 1
TEST
PIN No.
2 - 5
11
Type
Description
I
I
Trigger input pins
TEST pin
STOP7 - 6
STOP5 - 0
AUDP, AUDN
ROSC
19 - 18
17 - 12
9, 8
1
O
O
O
I
Open drain output pins / LED drive pins
Output signals pins
A pair of PWM outputs for speak
Oscillator frequency control pin
Digital circuit power supply pin
PWM power supply pin
VDD
20
I
AVDD
10
I
VSS
6
I
Digital circuit power supply pin
PWM power supply pin
AVSS
7
I
© Generalplus Technology Inc.
Proprietary & Confidential
4
Mar. 01, 2011
Version: 1.2
GPES230B2
4.1. PAD Assignment
(0,0)
20
1
VDD
STO P7
STO P6
19
18
RO SC
2
TG 4
TG 3
TG 2
TG 1
VSS
17
16
15
3
STO P5
STO P4
STO P3
STO P2
4
5
14
13
6
STO P1
STO P0
12
11
8
9
7
10
This IC substrate should be connected to VSS
Note1: To ensure that the IC functions properly, bond all VDD and VSS pins.
Note2: The 0.1µF capacitor between VDD and VSS should be placed to IC as close as possible.
© Generalplus Technology Inc.
Proprietary & Confidential
5
Mar. 01, 2011
Version: 1.2
GPES230B2
5. FUNCTIONAL DESCRIPTIONS
5.1. Instruction Sets
Example:
Nine instructions involve LD, JP, LSR, ADD, SUB, AND, ORR,
EOR, and END. “LD” represents LOAD and “JP” indicates JUMP.
“LSR” shifts a register’s value one bit to the right. “ADD” and
“SUB” are addition and subtraction. “AND”, “ORR” and “EOR”
are logical operations which indicate AND, OR and, Exclusive OR
SPES230B
EXT_CLK_4M
Freq4
;select SPES230B
;Set default speech
;samplefrequencyto7.8K
LVR_DISABLE
...
respectively.
“END” ends program and enters into sleep mode
for power saving purpose.
POI:
...
...
5.2. I/O Description
GPES II has the following I/O pins: TG1, TG2, TG3, TG4, STOP
[0:7]. The TG1, TG2, TG3 and TG4 are input pins and STOP [0:7]
are output pins; moreover, STOP [6:7] can be shared with LED
drive pins.
5.3.1.2. Debounce
A key debounce time can be defined in Definition Area. The
range of debounce time is 5ms ~ 35ms.
5.3.1.3. Variable
PIN
Configuration
A variable can be defined by adding a “#define” in front of a
variable. A variable can be the combination of numbers and
characters, but not underscore.
TG1
Input
TG2
Input
TG3
Input
TG4
Input
Variable Syntax:
STOP.0
STOP.1
STOP.2
STOP.3
STOP.4
STOP.5
STOP.6
STOP.7
Output
#define VariableName <Register | NUM>
Output
Output
Output
Example1:
#define var R0
;define var as R0
;define const as 8
Output
Output
Example2:
Output (shared with LED2 pin)
Output (shared with LED1 pin)
#define const
8
5.3.1.4. External clock
5.3. Program Structure Overview
Users can define one external clock out of the following selections
in a program. This option must be defined in definition area.
The following description is an overview of GPES II program
structure. For more information about GPES II programming
method, please refer to GPES II Programming Guide.
EXT_CLK_3M; (3.0MHz)
EXT_CLK_4M; (4.0MHz)
EXT_CLK_6M; (6.0MHz)
5.3.1. Definition area
The beginning of a program is the Definition Area that defines
some declarations before Initialization such as IC body, variable,
frequency, debounce time and low voltage reset option.
5.3.1.1. IC body
The first element defined in a program is a GPES II body.
© Generalplus Technology Inc.
Proprietary & Confidential
6
Mar. 01, 2011
Version: 1.2
GPES230B2
5.3.1.5. Low voltage reset
The Low Voltage Reset (LVR), prevents system running into
malfunction state, will intend to reset all functions back to the initial
states if power VDD drops too low. The LVR works the same as
Power-on Reset; it can be enabled or disabled via programming
and must be defined in the definition area.
Entry Point
Abbreviator
Entry Point
Status
32
POI
Power on initialization
TG1 1Æ0 (falling)
TG2 1Æ0 (falling)
TG3 1Æ0 (falling)
TG4 1Æ0 (falling)
TG1 0Æ1 (rising)
TG2 0Æ1 (rising)
TG3 0Æ1 (rising)
TG4 0Æ1 (rising)
0
TG1F
TG2F
TG3F
TG4F
TG1R
TG2R
TG3R
TG4R
1
2
LVR_ENABLE; enable
LVR_DISABLE; disable
3
4
5
5.3.1.6. Infrared Red (IR) Function
6
7
Some IR parameters must be defined in Definition Area before
using IR function. We will only introduce the commands here.
For more details on how to use these commands in your program,
please refer to GPES II Programming Guide.
8 ~ 253
(except 32)
254
User-Defined entry
point or label
User-Defined
Speech event
Timer event
User-Defined
User-Defined
255
5.3.2. Entry point (Label)
The essence applied in GPES II is the ENTRY POINT. Each
trigger pin is assigned an entry point. Instructions must be
located in a new line under its entry point. Any instruction located
with the same line as entry point will cause error when compiling.
Users can also define a label (ID) for an entry point. A label can
be the combinations of number and character, but not underscore.
In addition, a label can not start with a number.
Example:
An example is introduced here. Also, all words after semi-colon
(;) are for comments only.
SPES230B
;body defined
EXT_CLK_4M
LVR_Disable
POI:
Example
LD EN, 0x00
(4000)_3
SpeechLoop:
Sound1+Sound2
JP SpeechLoop
LD EN, 0x 03
;enable TG1 falling and
;TG2 falling
END
When a pin is triggered, the program jumps to its corresponding
entry point and starts executing. The entry points are fixed
values. For instance, ‘0’ is the entry point of TG1 when 1Æ0. ‘1’
is the entry point of TG2 when 1Æ0. Users can either use Entry
TG1F:
Sound1
;when TG1 changes from
;1Æ0 (HighÆLow),
;sound1 is played
;Sleep
Point ID or Entry Point Abbreviator to express an entry point.
summary of entry point for each trigger pin is as follows:
A
END
TG2F:
Sound2
;when TG2 changes from
;1Æ0, sound2 is played
;Sleep
END
© Generalplus Technology Inc.
Proprietary & Confidential
7
Mar. 01, 2011
Version: 1.2
GPES230B2
6. GPES II PROGRAMMING TOOL
GENERALPLUS provides a user-friendly interface that allows
users to write, edit, compile and debug GPES II programs.
GPES II Programming Tool should be executed under Windows
95, Windows 98, Windows Me and Windows 2000. For more
information on how to use GPES II Programming Tool, please
refer to GPES II Programming Guide.
© Generalplus Technology Inc.
Proprietary & Confidential
8
Mar. 01, 2011
Version: 1.2
GPES230B2
7. ELECTRICAL SPECIFICATIONS
7.1. Absolute Maximum Ratings
Characteristics
Symbol
Ratings
DC Supply Voltage
V+
VIN
TA
< 7.0V
Input Voltage Range
Operating Temperature
Storage Temperature
-0.5V to V+ + 0.5V
0℃to +60℃
TSTO
-50℃to +150℃
Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. For normal operational
conditions see AC/DC Electrical Characteristics.
7.2. DC Characteristics (VDD = 3.0V, TA = 25℃)
Limit
Characteristics
Symbol
Unit
Condition
Min
Typ.
-
Max
Operating Voltage
VDD
IOL
1.9
5.5
V
-
LED2 - 1 Output Current
-
-
-
-
25
10
-3.5
-
-
-
mA
VDD = 3.0V, VOUT = 1.0V
VDD = 3.0V, VOL = 1.0V
VDD = 3.0V, VOH = 2.0V
VDD = 3.0V
IOL
STOP5 - 0 Output Current
Standby Current
mA
μA
IOH
-
ISTBY
2.0
VDD = 3.0V, FCPU = 2.0MHz
No load
Operating Current
IOP
-
1.7
-
mA
IOL
IOH
ROSC
IIN
-
-
-
-
100
-100
91
-
-
-
-
VDD = 3.0V, VOL = 1.0V
VDD = 3.0V, VOH = 2.0V
VDD = 3.0V, FOSC = 4.0MHZ
VDD = 3.0V, VIN = VSS
PWM Output Current
mA
ROSC Resistor
KΩ
μA
Input Current for TG4 - 1
1.8
7.3. DC Characteristics (VDD = 4.5V, TA = 25℃)
Limit
Typ.
-
Characteristics
Symbol
Unit
Condition
Min.
Max.
Operating Voltage
VDD
IOL
3.6
5.5
V
-
LED2 - 1 Output Current
-
-
-
-
30
15
-7
-
-
mA
VDD = 4.5V, VOUT = 1.0V
VDD = 4.5V, VOL = 1.0V
VDD = 4.5V, VOH = 3.5V
VDD = 4.5V
IOL
STOP5 - 0 Output Current
Standby Current
mA
μA
IOH
-
ISTBY
-
2.0
VDD = 4.5V, FCPU = 2.0MHz
No load
Operating Current
IOP
-
3.6
-
mA
IOL
IOH
ROSC
IIN
-
-
-
-
130
-130
56
-
-
-
-
VDD = 4.5V, VOL = 1.0V
VDD = 4.5V, VOH = 3.5V
VDD = 4.5V, FOSC = 6.0MHz
VDD = 4.5V, VIN = VSS
PWM Output Current
mA
ROSC Resistor
KΩ
μA
Input Current for TG4 - 1
4.4
Fosc - 4
, Rosc=91KΩ
△F/F
Frequency Deviation
-
-
7
%
4
7.4. (3volt) R Relative FOSC Table (The table is only for reference)
R(Kohm)
56KΩ
91KΩ
110KΩ
FOSC* (MHz)
6
4
3
NOTE*: FCPU=FOSC/2
© Generalplus Technology Inc.
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9
Mar. 01, 2011
Version: 1.2
GPES230B2
7.5. The Relationships between the ROSC and the FCPU
7.6. The Relationships between the FCPU and the IOP
7.5.1. VDD = 3.0V, TA = 25℃
4
3
2
1
0
3
VDD = 4.5V
2
1
VDD = 3V
0
0
1
2
3
0
50
100
150
200
250
Fcpu(MHz)
Rosc(Kohms)
7.7. The Relationships between the FCPU and the VDD
7.5.2. VDD = 4.5V, TA = 25℃
4
3
3
ROSC = 56Kohms
2
1
0
2
1
ROSC = 180Kohms
0
1
2
3
4
5
6
0
50
100
150
200
250
VDD(Volts)
Rosc(Kohms)
© Generalplus Technology Inc.
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10
Mar. 01, 2011
Version: 1.2
GPES230B2
8. APPLICATION CIRCUITS
8.1. 4 Inputs, 2 LEDS and 6 Outputs
VDD
VDD
VSS
TG1
TG2
TG3
R1: 91K Ω
ROSC
C1
50pF
GPES230B2
100 Ω
TG4
STOP6
STOP7
STOP0
100 Ω
TEST
AUDP
8 Ω
|
AUDN
32 Ω
STOP5
VDD
0.1μ
AVDD
AVSS
8.2. 28 Inputs Key Matrix
VDD
TG1
TG2
VDD
VSS
R1:91K Ω
TG3
TG4
ROSC
C1
50pF
GPES230B2
100 Ω
100 Ω
STOP6
STOP7
STOP0
STOP1
TEST
AUDP
8 Ω
|
AUDN
32 Ω
STOP5
VDD
AVDD
AVSS
0.1μ
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11
Mar. 01, 2011
Version: 1.2
GPES230B2
8.3. 36 Inputs Key Matrix
VDD
TG1
TG2
VDD
Ω
R1: 91K
ROSC
VSS
TG3
TG4
C1
50pF
GPES230B2
STOP0
TEST
AUDP
8 Ω
|
32 Ω
STOP5
STOP6
STOP7
AUDN
VDD
AVDD
AVSS
0.1μ
Note: To avoid the noise interference on PCB around R-oscillator, R1 and C1 should be placed as close as possible to ROSC pin.
8.4. PTG pin Pull-High Resistance
3V ,equivalent resistance = 2MΩ
DATA IN
PIN PAD
R
5V ,equivalent resistance = 1 MΩ
3V ,equivalent resistance = 2 MΩ
VDD
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12
Mar. 01, 2011
Version: 1.2
GPES230B2
9. PACKAGE/PAD LOCATIONS
9.1. Ordering Information
Product Number
Package Type
Chip form
GPES230B2-NnnV-C
Note1: Code number is assigned for customer.
Note2: Code number (N = A - Z or 0 - 9, nn = 00 - 99); version (V = A - Z).
© Generalplus Technology Inc.
Proprietary & Confidential
13
Mar. 01, 2011
Version: 1.2
GPES230B2
10. DISCLAIMER
The information appearing in this publication is believed to be accurate.
Integrated circuits sold by Generalplus Technology are covered by the warranty and patent indemnification provisions stipulated in the
terms of sale only. GENERALPLUS makes no warranty, express, statutory implied or by description regarding the information in this
publication or regarding the freedom of the described chip(s) from patent infringement. FURTHERMORE, GENERALPLUS MAKES NO
WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. GENERALPLUS reserves the right to halt production or alter
the specifications and prices at any time without notice. Accordingly, the reader is cautioned to verify that the data sheets and other
information in this publication are current before placing orders. Products described herein are intended for use in normal commercial
applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support
equipment, are specifically not recommended without additional processing by GENERALPLUS for such applications. Please note that
application circuits illustrated in this document are for reference purposes only.
© Generalplus Technology Inc.
Proprietary & Confidential
14
Mar. 01, 2011
Version: 1.2
GPES230B2
11. REVISION HISTORY
Date
Revision #
Description
1. Modify 7.2 DC Characteristics(VDD = 3.0V, TA = 25℃).
2. Modify 7.3 DC Characteristics(VDD = 4.5V, TA = 25℃).
Page
MAR. 01, 2011
1.2
9
9
3. Modify 7.4 (3volt) R Relative FOSC Table (the table is only for reference).
1. Modify 3 FEATURES.
9
JAN. 06, 2009
NOV. 02, 2006
1.1
1.0
3
2. Modify 6.3.1.5 Low voltage reset.
3. Modify 8.2 DC Characteristics.
Original
7
9
14
© Generalplus Technology Inc.
Proprietary & Confidential
15
Mar. 01, 2011
Version: 1.2
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