FSP2130C29AD [FOSLINK]

300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR; 300MA高PSRR低压差CMOS线性稳压器


型号：	FSP2130C29AD
厂家：	FOSLINK SEMICONDUCTOR CO.,LTD
描述：	300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR 300MA高PSRR低压差CMOS线性稳压器稳压器
文件：	总11页 (文件大小：719K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

FEATURES

GENERAL DESCRIPTION

Low dropout voltage: 180mV at 300mA (Vo=3.3V)

The FSP2130 series of positive voltage linear

regulators feature low quiescent current (Typ. 65µA)

and low dropout voltage, making them ideal for battery

powered applications. Their high PSRR make them

useful in applications where AC noise on the input

power supply must be suppressed. Space saving

SOT23-3L package is attractive for portable and

handheld applications. They have both thermal

shutdown and a current limit feature to prevent device

failure from extreme operating conditions. They are

stable with an output capacitor of 2.2µF or greater.

Quiescent current: Typ. 65µA

2% Voltage Accuracy

High PSRR: 70dB at 1KHz

Thermal Shutdown

Current Limiting

Excellent line and load regulation

Fast response

Short circuit protection

Low temperature coefficient

Space saving SOT23-3L package

APPLICATIONS

Cordless phones

Cellular phones

Bluetooth earphones

Digital Cameras

Portable electronics

WLANs

MP3 players

PIN CONFIGURATION

(Top View)

PIN DESCRIPTION

Pin Number

Pin Name

Pin Function

GND

VOUT

VIN

Ground

Output

Input

BLOCK DIAGRAM

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

TYPICAL APPLICATIONS CIRCUITS

ABSOLUTE MAXIMUM RATINGS

Parameter

Rating

Unit

Input Supply Voltage

Output Current

Output Pin Voltage

ESD Rating

300

GND-0.3 to VIN+0.3

Class B

Internal Power Dissipation

400

130

250

℃/ W

°C

Junction to Case Thermal Resistance (θ_JC)

Junction to Ambient Thermal Resistance (θ_JA)

Operating temperature

-40 to 85

-40 to 125

-65 to 150

300

Operating Junction Temperature

Storage Temperature

°C

Lead Temperature (Soldering, 5 sec)

°C

Note: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired.

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

ELECTRICAL CHARACTERISTICS

(V_IN= V_O+ 1V, C_IN= 1µF, C_O= 2.2µF, T_A= 25^°C unless otherwise specified.)

PARAMETER

Input Voltage

SYMBOL

TEST CONDITIONS

MIN

Note1

-2

TYP

MAX

5.5

UNIT

V_IN

V_O

I_O

Output Voltage Accuracy

Output Current

I_O= 1mA

300

Note2

µA

Ground Current

I_GND

I_Q

I_O= 1mA to 300mA

I_O= 0mA

Quiescent Current

I_O= 1mA, V_O< 2V

V_IN=2.8V to 3.8V

I_O= 1mA, 2≤ V_O< 3.3V

V_IN=V_O+ 0.5V to V_O+ 1V

I_O= 1mA, V_O≥3.3V

V_IN=V_O+ 0.5V to V_O+ 1V

-0.15

-0.1

0.1

0.03

0.2

0.15

0.1

Line Regulation

LNR

%/V

-0.4

-1

0.4

Load Regulation Error

Temperature Coefficient

LDR

T_C

I_O= 1mA to 300mA

I_O= 1mA

0.2

ppm/°C

°C

Over Temperature Shutdown

Over Temperature Hystersis

OTS

OTH

I_O= 1mA

150

I_O= 1mA

°C

I_O= 100mA

f=100Hz

f= 1KHz

f= 10KHz

Power Supply Ripple Rejection

(with bypass Cap.)

_BYP= 10nF

V_o=1.8V

PSRR

f=100Hz

f= 1KHz

I_O= 100mA

V_o=1.8V

Power Supply Ripple Rejection

(without bypass Cap.)

f= 10KHz

V_O= 1.8V

850

370

180

1100

450

230

Dropout Voltage

Output Noise

V_DO

V_n

I_O= 300mA

2.5 ≤ V_O< 3.3V

V_O≥ 3.3V

C_BYP=10nF, f = 10Hz to 100kHz

µV_RMS

Note 1：The minimum input voltage of the FSP2130 is determined by output voltage and dropout voltage. The

minimum input voltage is defined as:

V_IN(MIN)=V_O+V_DROP

Note 2：Output current is limited by P_D, maximum I_O=P_D/(V_IN(MAX)-V_O)

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

APPLICATION INFORMATION

Capacitor Selection and Regulator Stability

Similar to any low dropout regulator, the external capacitors used with the FSP2130 must be carefully selected for

regulator stability and performance.

Using a capacitor, C_IN, whose value is ＞1μF at the FSP2130 input pin, the amount of the capacitance can be

increased without limit. Please note that the distance between C_INand the input pin of the FSP2130 should not

exceed 0.5 inch. Ceramic capacitors are suitable for the FSP2130. Capacitors with larger values and lower ESR

provide better PSRR and line-transient response.

The FSP2130 is designed specifically to work with low ESR ceramic output capacitors in order to save space and

improve performance. Using an output ceramic capacitor whose value is ＞2.2μF with ESR＞5mΩ ensure stability.

A 10nF bypass capacitor connected to BYP pin is suggested for suppressing output noise. The capacitor, in series

connection with an internal 200kΩ resistor, forms a low-pass filter for noise reduction. Increasing the capacitance will

slightly decrease the output noise, but increase the start-up time.

Load Transient Considerations

The figure11 shows the FSP2130 load transient response. It shows two components the output response: a DC shift

from the output impedance due to the load current change and transient response. The DC shift is quite small due to

excellent load regulation of the FSP2130. The transient spike, resulting from a step change in the load current from

1mA to 300mA, is 20mV. The ESR of the output capacitor is critical to the transient spike. A larger capacitance along

with smaller ESR results in a smaller spike.

Internal P-Channel Pass Transistor

The FSP2130 features a 0.75Ω P-Channel MOSFET device as a pass transistor. The P-MOS pass transistor

enables the FSP2130 to consume only 65μA of ground current during low dropout, light load, or heavy load

operations. This feature increases the battery operation life time.

Dropout Voltage

A regulator’s minimum dropout voltage determines the lowest usable supply voltage. The FSP2130 has a typical

300mV dropout voltage. In battery powered systems, this will determine the useful end-of-life battery voltage.

Current Limit and Short Circuit Protection

The FSP2130 features a current limit, which monitors and controls the gate voltage of the pass transistor. The output

current can be limited to 400mA by regulating the gate voltage. The FSP2130 also has a built-in short circuit current

limit.

Thermal Considerations

Thermal protection limits power dissipation in the FSP2130. When the junction temperature exceeds 150℃, the

OTP (Over Temperature Protection) starts the thermal shutdown and turns the pass transistor off. The pass

transistor resumes operation after the junction temperature drops below 120℃.

For continuous operation, the junction temperature should be maintained below 125℃. The power dissipation is

defined as :

P_D=(V_IN-V_OUT)*I_O+V_IN*I_GND

The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of

surrounding airflow and temperature difference between junction and ambient. The maximum power dissipation can

be calculated by the following formula:

P_D(MAX)=(T_J(MAX)-T_A)/θ_JA

Where T_J(MAX)is the maximum allowable junction temperature 125℃. T_Ais the ambient temperature and θ_JAis the

thermal resistance from the junction to the ambient.

For example, θ_JAis 250℃/W for the SOT23-3L package, based on the standard JEDEC 51-3 for a single layer

thermal test board. The maximum power dissipation at T_A=25℃ can be calculated by the following formula:

P_D(MAX)= (125℃-25℃)/250=0.4W

It is also useful to calculated the junction temperature of the FSP2130 under a set of specific conditions. In this

example let the input voltage V_IN=3.3V, the output current I_O=300mA and the case temperature T_A=40℃ measured

by a thermal couple during operation. The power dissipation for the V_O=2.8V version of the FSP2130 can be

calculated as:

P_D=(3.3V-2.8V)*300mA+3.3V*70μA≌150mW

And the junction temperature, T_J, can be calculated as follows:

T_J=T_A+P_D*θ_JA

T_J=40℃+0.15W*250℃/W

=77.5℃＜T_J(MAX)=125℃

For this operating condition, TJ, is lower than the absolute maximum operating junction temperature, 125℃, so it is

safe to use the FSP2130 in this configuration.

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

TYPICAL PERFORMANCE CHARACTERISTICS

(V_IN= V_EN, C_IN= 1µF, C_O= 2.2µF , C_BYP=10nF T_A= 25°C unless otherwise specified.)

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

TYPICAL PERFORMANCE CHARACTERISTICS（CONTINUED）

(V_IN= V_EN, C_IN= 1µF, C_O= 2.2µF , C_BYP=10nF T_A= 25°C unless otherwise specified.)

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

TYPICAL PERFORMANCE CHARACTERISTICS（CONTINUED）

(V_IN= V_EN, C_IN= 1µF, C_O= 2.2µF , C_BYP=10nF T_A= 25°C unless otherwise specified.)

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

TYPICAL PERFORMANCE CHARACTERISTICS（CONTINUED）

(V_IN= V_EN, C_IN= 1µF, C_O= 2.2µF , C_BYP=10nF T_A= 25°C unless otherwise specified.)

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

TYPICAL PERFORMANCE CHARACTERISTICS（CONTINUED）

(V_IN= V_EN, C_IN= 1µF, C_O= 2.2µF , C_BYP=10nF T_A= 25°C unless otherwise specified.)

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

ORDERING INFORMATION

FSP2130XXXX

Package Type:

C: SOT23-3L

Packing:

A: Tape & Reel

Temperature Grade:

D: -40~85℃

Output Voltage:

40: 4.0V

38: 3.8V

33: 3.3V

31: 3.1V

30: 3.0V

29: 2.9V

285: 2.85V

28: 2.8V

25: 2.5V

18: 1.8V

MARKING INFORMATION

XXVYW

Date code:

Y: Year

W; Week

Output Voltage:

M: 4.0V

O: 3.8V

K: 3.3V

P: 3.1V

J: 3.0V

Q: 2.9V

I: 2.85V

H: 2.8V

G: 2.5V

E: 1.8V

Product Code

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300MA HIGH PSRR LOW DROPOUT CMOS LINEAR REGULATOR

FSP2130

PACKAGE INFORMATION

Dimensions In Millimeters

Dimensions In Inches

Min.

Symbol

Min.

0.889

0.000

0.353

2.692

2.591

1.397

0.838

Max.

1.295

0.152

0.599

3.099

2.977

1.803

1.041

Max.

0.052

0.006

0.024

0.124

0.119

0.072

0.042

0.036

0.000

0.014

0.108

0.104

0.056

0.034

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FSP2130C29AD [FOSLINK]

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