ADC-121R [FARADAY]

VIDEO FRONT-END MODULES;
ADC-121R
型号: ADC-121R
厂家: FARADAY TECHNOLOGY    FARADAY TECHNOLOGY
描述:

VIDEO FRONT-END MODULES

文件: 总5页 (文件大小:187K)
中文:  中文翻译
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ADC-100 RANGE  
VIDEO FRONT-END MODULES  
The ADC-100 range converts analogue video in various formats to 10 or 12 bit parallel digital  
video. The range provides a complete front end solution for the digitising of high quality  
component, composite or s-video. The module incorporates a tightly specified anti-aliasing filter, an  
A-D converter and a digital filter all on a board measuring no more than 1044mm2 (1.65sq in).  
Features  
Typical applications  
· ± 5V operation  
· Video Broadcast and studio equipment  
· Digital Cameras  
· Telecommunications equipment  
· Video Frame Grabber Cards for PCs  
· Closed Circuit Security  
· High impedance input stage  
· Filtered and buffered video o/p  
· User just provides pixel clock and clamp pulse  
· Choice of 10 or 12 bit A-D  
· Matched digital delay Y,Pb/Pr units  
(to eliminate additional delay lines)  
ADC-100 BLOCK DIAGRAM  
© Faraday Technology. As part of continual product improvement the specifications, details and dimensions shown in this publication are subject to change without notice  
Fara064d.doc Page 1 of 5 Apr-01(E)  
Technical Description  
The ADC-100 range of modules are a complete front end solution for digitising analogue video.  
They comprise all buffering and filtering components required - allowing the user to connect  
directly to the video source. A dc clamp is provided to ensure that the black level is accurately set  
before being presented to the A-D converter. The modules utilise 2x oversampling to minimise the  
size of the filter components and achieve high performance. The subsequent data is decimated by  
high performance low pass digital filters to provide output data with standard sampling rates.  
All this is achieved transparently to the user; the only control signals required are a back porch  
clamp signal, a sync pulse to align the digital filter and an appropriate clock.  
For further details of the digital filter functionality consult Fairchild datasheet TMC2242.  
Typical I/P circuit for minimal tilt  
Fara064d.doc  
Page 2 of 5  
Apr-01(E)  
Specification  
ADC-100, ADC-101,  
ADC-120, ADC-122  
6.0 MHz with ripple of ± 0.05 dB.  
21.0 MHz  
ADC-121  
High Spec. analogue filter  
Analogue Filter Passband  
2.75 MHz with ripple of ± 0.05 dB.  
10.5 MHz  
45 dB  
< 6 ns to 1.64 MHz  
< 20 ns to 2.75 MHz  
1% typical  
Analogue Filter Start of Stopband  
Analogue Filter Stopband rejection  
Analogue Filter Group delay ripple  
45 dB  
< 3 ns to 3.58 MHz  
< 10 ns to 6.0 MHz  
1% typical  
1° typical  
+ 300 mA +5v  
Differential gain  
Differential phase  
Supply current  
1° typical  
+ 300 mA +5v  
20 mA  
-5v  
20 mA  
-5v  
ADC-110R, ADC-111R,  
6.0 MHz with ripple of ± 0.1 dB.  
21.0 MHz  
Relaxed analogue filter  
Analogue Filter Passband  
Analogue Filter Start of Stopband  
Analogue Filter Stopband rejection  
Analogue Filter Group delay ripple  
35 dB  
< 3 ns to 3.58 MHz  
< 16 ns to 6.0 MHz  
1.5% typical  
1.5° typical  
+ 300 mA +5v  
Differential gain  
Differential phase  
Supply current  
20 mA  
-5v  
Digital Filter details  
ADC-100, ADC-101, ADC-110,  
ADC-111, ADC-120, ADC-121  
TMC2242A  
ADC-122  
Filter Type  
TMC2242C  
Passband  
± 0.01 dB to 0.22 fs  
- 6 dB  
> 59 dB from 0.28 fs  
34 clk periods  
± 0.014 dB to 0.22 fs  
- 6 dB  
> 56 dB from 0.29 fs  
68 clk periods  
Attenuation at 0.25 fs  
Stopband attenuation  
Data latency  
Note: The ADC-122R uses the TMC2242C digital filter which features a double delay mode enabling the luminance  
module (fs = 27 MHz) to output data synchronously with the colour difference modules (fs = 13.5 MHz). This  
eliminates the need for a digital delay of the luminance data by 34 clock cycles. For further information consult  
Fairchild datasheet TMC2242C.  
An absolute delay difference of 37 ns exists between the ADC-122R and ADC-121R due to the differences in  
the analogue filters.  
Fara064d.doc  
Page 3 of 5  
Apr-01(E)  
Module Details  
Order Code  
Gain  
Black Comments  
Level  
Application  
MMC  
Equivalent  
ADC-100R  
ADC-100B  
1.6  
1.6  
230  
230  
10-bit  
12-bit  
Composite, Luminance (S-video), digital FE-100H10-1  
video decoder front end. High performance  
applications. fs = 27 MHz  
FE-100H12-1  
ADC-101R  
ADC-101B  
1.6  
1.6  
512  
512  
10-bit  
12-bit  
Chrominance , digital video decoder front end. FE-100H10-2  
High performance applications. fs = 27 MHz  
FE-100H12-2  
ADC-110R  
ADC-111R  
1.6  
1.6  
230  
230  
10-bit  
relaxed filter  
10-bit  
relaxed filter  
Composite, Luminance (S-video), digital FE-100M-1  
video decoder front end. fs = 27 MHz  
Chrominance , digital video decoder front end FE-100M-2  
fs = 27 MHz  
ADC-120R  
ADC-121R  
2.475 64  
10-bit  
CCIR-601-2 levels  
10-bit  
CCIR-601-2 levels  
2.75 MHz Filter  
Y input (Component Video) , Expanded active not available  
video range. fs = 27 MHz  
Pb,Pr input (Component video), Expanded not available  
active video range. fs =13.5 MHz  
2.475 512  
ADC-122R  
2.475 64  
10-bit  
CCIR-601-2 levels  
Double delay  
Y input (Component Video) , Expanded active not available  
video range. fs = 27 MHz  
Matched digital filter delay.  
Note: PROVISIONAL DATA  
The modules are fitted with a high performance 10-bit analogue to digital converter as standard (R-  
suffix) but they are also available with a 12-bit analogue converter (B suffix)  
Devices are normally supplied with a Fairchild half band filter. The units can be optionally supplied  
with other compatible half band filters, or with no digital filter at the customers request.  
Application Notes  
The ADC modules incorporate a clamp circuit which must be fed with a back porch signal derived  
on the users pcb. This can easily be generated using standard sync separators.  
The user has control over digital filter inputs DEC_N, OE_N and SYNC appropriately. These inputs  
allow the user to synchronise the decimation of pixel data and multiplex the outputs from modules.  
For further details the user should consult the Fairchild datasheet TMC2242.  
The insertion delay difference between the component modules ADC122R and ADC121R can be  
eliminated by latching the Luminance data for 1 clock cycle within the application.  
Note: This product is Aqueous Washable.  
Fara064d.doc  
Page 4 of 5  
Apr-01(E)  
Faraday Technology Ltd.  
Croft Road Industrial Estate,  
Newcastle, Staffordshire  
Tel:  
Fax:  
Email:  
+ 44 (0)1782 661501  
+ 44 (0)1782 630101  
sales@faradaytech.co.uk  
ST5 0QZ. England.  
Web site:  
http://www.faradaytech.co.uk  

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