KA7M0880-TU [FAIRCHILD]
Switching Regulator, Current-mode, 32A, PZFM5, TO-3, 5 PIN;
| 型号： | KA7M0880-TU |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | Switching Regulator, Current-mode, 32A, PZFM5, TO-3, 5 PIN 局域网 开关 |
| 文件： | 总16页 (文件大小：1354K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
FS7M0880
Fairchild Power Switch(FPS)
Features
Description
• Precise Fixed Operating Frequency
• FS7M0880(66kHz)
• Pulse By Pulse Current Limiting
• Over Current Protection
The Fairchild Power Switch (FPS) product family is specially
designed for an off line SMPS with minimal external compo-
nents. The Fairchild Power Switch (FPS) consists of high volt-
age power SenseFET and current mode PWM controller. The
PWM controller includes integrated fixed oscillator, under volt-
age lock out, leading edge blanking block, optimized gate turn-
on/turn-off driver, thermal shut down protection, over voltage
protection, temperature compensated precise current sources for
loop compensation and fault protection circuit. Compared to
discrete MOSFET and PWM controller or ring choke converter
(RCC) solutions, the Fairchild Power Switch (FPS) can reduce
total cost, component count, size and weight simultaneously
increasing efficiency, productivity, and system reliability. It has
simple applications well suited for cost down design for flyback
converter or forward converter.
• Over Load Protection
• Over Voltage Protection (Min. 25V)
• Internal Thermal Shutdown Function
• Under Voltage Lockout with Hysteresis
• Internal High Voltage Sense FET
• Latch Up Mode
• Soft Start
TO-3P-5L
1
1. DRAIN 2. GND 3. V
CC
4. FB 5. S/S
Internal Block Diagram
# 5
Soft Start
# 3
Vc c
# 1
DRAIN
UVLO
+
-
Inte rna l
Via s
Vre f
OSC
S
Q
Vref
PWM
Compa ra tor
-
R
# 4
Fe edbac k
+
Ifb
Ro n
R
Ro ff
Vref
Vref
Vfb
o ffs e t
Idelay
+
+
Vs d
-
De la y
120ns
Rs e ns e
-
Vo c p
S
Q
Vc c
+
Vc c
Res et
# 2
R
Vo vp
-
The rmal
Sourc e
GND
Shutdown
Rev.1.0.0
©2002 Fairchild Semiconductor Corporation
FS7M0880
Absolute Maximum Ratings
Parameter
Maximum Drain Voltage (1)
Symbol
Value
800
Unit
V
V
D,MAX
Drain-Gate Voltage (R =1MΩ)
V
DGR
800
V
GS
Gate-Source (GND) Voltage
Drain Current Pulsed (2)
Single Pulsed Avalanche Energy (3)
Avalanche Current (4)
V
±30
V
GS
I
32.0
810
A
DM
DC
E
I
mJ
A
AS
15
AS
Continuous Drain Current (T =25°C)
I
I
8.0
A
A
C
D
D
DC
DC
V
Continuous Drain Current (T =100°C)
5.6
C
Maximum Supply Voltage
Input Voltage Range
V
30
CC,MAX
V
-0.3 to V
190
V
FB
SD
P
W
W/°C
°C
D
Total Power Dissipation
Derating
1.54
Operating Ambient Temperature
Storage Temperature
T
-25 to +85
A
T
-55 to +150
°C
STG
Note:
1. T = 25°C to 150°C
j
2. Repetitive rating: Pulse width limited by maximum junction temperature
3. L = 24mH, V = 50V, R = 25Ω, starting Tj =25°C
DD
G
4. L = 13µH, starting T = 25°C
j
2
FS7M0880
Electrical Characteristics (SFET part)
(Ta=25°C unless otherwise specified)
Parameter
Symbol
BV
Condition
Min. Typ. Max. Unit
Drain-Source Breakdown Voltage
V
=0V, I =50µA
800
-
-
V
DSS
GS
D
V
V
=Max., Rating,
=0V
DS
GS
-
-
50
µA
Zero Gate Voltage Drain Current
I
DSS
V
V
=0.8Max., Rating,
DS
-
-
200
µA
=0V, T =125°C
GS
C
Static Drain-Source On Resistance (note1)
Forward Transconductance (note1)
Input Capacitance
R
V
V
=10V, I =5.0A
D
-
1.2
2.5
2460
210
64
1.5
-
Ω
DS(ON)
GS
DS
gfs
=15V, I =5.0A
D
1.5
S
Ciss
-
-
-
-
-
-
-
-
V
=0V, V =25V,
DS
GS
Output Capacitance
Coss
Crss
-
pF
nS
f=1MHz
Reverse Transfer Capacitance
Turn On Delay Time
-
td(on)
tr
V
=0.5BV
, I =8.0A
DSS
-
90
200
450
150
DD
D
(MOSFET switching
time are essentially
independent of
Rise Time
95
Turn Off Delay Time
td(off)
tf
150
60
Fall Time
operating temperature)
Total Gate Charge
(Gate-Source+Gate-Drain)
V
V
=10V, I =8.0A,
D
GS
DS
Qg
-
-
150
=0.5BV
(MOSFET
DSS
switching time are
essentially independent of
operating temperature)
nC
Gate-Source Charge
Qgs
Qgd
-
-
20
70
-
-
Gate-Drain (Miller) Charge
Note:
1. Pulse test: Pulse width ≤ 300µS, duty cycle ≤ 2%
1
2. S = ---
R
3
FS7M0880
Electrical Characteristics (CONTROL part) (Continued)
(Ta=25°C unless otherwise specified)
Parameter
Symbol
Condition
-
Min. Typ. Max.
Unit
UVLO SECTION
Start Threshold Voltage
Stop Threshold Voltage
OSCILLATOR SECTION
Initial Frequency
Frequency Change With Temperature (2)
Maximum Duty Cycle
Voltage Stability
V
14
8
15
9
16
10
V
V
START
V
STOP
After turn on
F
OSC
-
-25°C ≤ Ta ≤ +85°C
-
60
-
66
±5
50
1
72
±10
55
3
kHz
%
∆F/∆T
Dmax
45
0
%
Fstable
12V ≤ Vcc ≤ 23V
%
FEEDBACK SECTION
Feedback Source Current
Shutdown Delay Current
Shutdown Feedback Voltage
SOFT START SECTION
Soft Start Voltage
I
Ta=25°C, 0V ≤ Vfb ≤ 3V
0.7
4.0
6.9
0.9
5.0
7.5
1.1
6.0
8.1
mA
µA
V
FB
Idelay
Vsd
Ta=25°C, 5V ≤ Vfb ≤ V
SD
V
V
=2V
FB
4.7
5.0
5.3
V
SS
Soft Start Resistor
Rsoft
Bias=Vref, SS=0V
17.0 18.5 21.0
kΩ
REFERENCE SECTION
Output Voltage (1)
Vref
Ta=25°C
4.80 5.00 5.20
V
Temperature Stability (1)(2)
Vref/∆T
-25°C ≤ Ta ≤ +85°C
-
0.3
0.6 mV/°C
CURRENT LIMIT (SELT-PROTECTION)SECTION
Peak Current Limit
I
Max. inductor current
4.40 5.00 5.60
A
OVER
PROTECTION SECTION
Thermal Shutdown Temperature (Tj) (1)
Over Voltage Protection Voltage
Over Current Protection Voltage
TOTAL DEVICE SECTION
Start Up Current
T
-
-
-
140
°C
V
SD
V
OVP
V
OCP
25
28
31
1.05 1.10 1.15
V
I
V
=14V
CC
-
-
40
8
80
12
uA
START
I
Ta=25°C
mA
OP
Operating Supply Current
(Control Part Only)
After latch,
Iop(lat)
150
250
350
uA
Vcc=Vstop-0.1V
Note:
1. These parameters, although guaranteed, are not 100% tested in production
2. These parameters, although guaranteed, are tested in EDS (wafer test) process
4
FS7M0880
power MOSFET. Then, the current required by the control
IC is suddenly increased to 7mA, which makes it difficult for
FPS to operate with the current provided through Rstart.
Therefore, after FPS starts, the auxiliary winding of the
transformer should supply most of the power required by the
General Application
In general, the FPS consists of several functional sections:
under voltage lockout circuit (UVLO), reference voltage,
oscillator (OSC), pulse width modulation (PWM) block, pro-
tection circuits and gate drive circuit.
FPS. It is suitable to use an appropriately sized V capaci-
CC
tor, generally about 33µF, because the starting time can be
delayed if it is too large. This operation is described in figure
2. Although V needs to be set only above 9V during the
CC
normal operation, it should be set to such an extent that over
voltage protection (OVP) is not activated during an overload
condition. For full load, about 18~20V is appropriate for
Start-Up
The minimum current that FPS requires for the start-up is
80µA. This current can be provided by the DC link bulk
capacitor (DC start-up) or directly by the AC line (AC start-
up).
V
CC
and for no load, about 13~14V is suitable.
DC start-up
Assuming wide range input voltage (85-265V), the maxi-
mum value of Rstart is calculated with the minimum input
voltage as follows:
Protection
The FPS has not only pulse by pulse current limit circuit, but
also several self-protection circuits. These protection circuits
are fully integrated and do not require external components.
After the protection circuits are activated, the FPS com-
pletely stops the SMPS (Latch Mode Protection) until the
power on reset circuit is activated by removing and restoring
input power, or restarts the SMPS automatically (Auto
Restart Mode Protection).
85 2 – 15
80µA
R
= -------------------------- = 1.3MΩ
start
The maximum power dissipation in Rstart is calculated with
the maximum input voltage as follows:
(265 2 – 15)2
Ploss = ------------------------------------- = 0.1(W)
1.3MΩ
DC
Rs tart
LINK
Va
Vcc
3
265V
85V
Good Logic
Power on
Reset
5V
15V/ 9V
Vref
Latch
Comparator
Vz
UVLO
6V
Good Logic
FPS
Figure 1. Undervoltage lockout (UVLO) circuit
AC start-up
When the start-up current is provided directly by the AC line
through a single rectifier diode, the maximum value of Rstart
is calculated with the minimum input voltage as follows:
These two operations are user-selected operations, so the
user can select proper device according to the shutdown
mode. The operations principle and applications for each
protection are described as follows.
2 • 85 2 – 15π
---------------------------------------
÷ (80µA)
R
=
Start
2π
= 380kΩ
I cc
[ mA]
The maximum power dissipation in Rstart is calculated with
the maximum input voltage as follows:
20
π
2
1
2π
------
Va(rms) =
(Vpsint – 15) dt
∫
o
Power On Reset
Range
7
= 177V(Vp = 265 2)
2
2
(177)
Va(rms)
Rstart
P
= -------------------------- = -----------------
loss
380k
0. 1
= 82(mW)
Vcc
Vz [ V]
6V
9V
15V
The current provided through the starting resistor charges the
Vcc capacitor. When Vcc becomes higher than the threshold
voltage, the FPS starts the switching operation of the built-in
Figure 2. Variation of Icc according to Vcc
5
FS7M0880
FPS
Vck
5uA
D1
0.9mA
Vfb
OSC.
Vo
#4
D2
Vfb*
S
R
2.5 R
R
Cfb
PWM comp
Q
Ioffset
KA431
Sense
Rsense
Reset
R
S
7.5V
Shutdown
Q
Thermal
Shutdown
7.5V
3.2 V
0
t
t2
C fb × 4.3V
5µA
Shutdown
t2
=
.
Figure 3. Pulse-width-modulation (PWM) block
input power is restricted with a given input voltage. If the
output consumes beyond this maximum power, the output
voltage (Vo) decreases below the set voltage. This reduces
the current through the opto-coupler diode, which also
reduces opto-coupler transistor current increasing Vfb. If
Vfb exceeds 3.2V, D1 is blocked and the 5µA current source
starts to charge Cfb slowly compared to when the 0.9mA
current source charges Cfb. Vfb continues increasing until it
reaches 7.5V, and the FPS shuts down at that time. The delay
time for shutdown is the time required to charge Cfb from
3.2V to 7.5V with 5µA. When Cfb is 10nF (103), t2 is
approximately 8.6mS and when Cfb is 0.1µF (104), t2 is
approximately 86ms. These values are enough to prevent
SMPS from being shut down for most transient situations.
Just increasing Cfb to obtain a longer delay time may cause
problems, because Cfb is an important parameter for deter-
mining the response speed of the SMPS. To solve this prob-
lem, auxiliary capacitor in series with zener diode can be
used in parallel with Cfb. The breakdown voltage of the
zener diode should be about 3.9 ~ 4.7V. When Vfb is below
the zener voltage, the system dynamics is determined by
Cfb. When Vfb exceeds the zener voltage, the delay time is
determined by the auxiliary capacitor. By using large auxil-
iary capacitor, the delay time can be extended without sacri-
fice of the dynamic response.
Pulse by pulse current limit
Figure 3 shows the pulse-width-modulation (PWM) block of
the FPS. Since the FPS employs the peak current mode con-
trol, the current through the power MOSFET is limited by
the inverting input voltage of PWM comparator (Vfb*).
Assuming that the 0.9mA current source flows only through
the internal resistor (2.5R + R ·= 2.8k) and the diode forward
voltage drop is 0.7V, the anode voltage of diode D2 is about
3.2V. Since D1 is blocked when the feedback voltage (Vfb)
exceeds 3.2V, the maximum voltage of the anode of D2 is
3.2V. Therefore, the maximum value of Vfb* is about 0.7V,
which determines the maximum current through the power
MOSFET.
Over Load Protection
Overload means that the load current exceeds a pre-set level
due to the abnormal situation. In this situation, protection
circuit should be activated in order to protect the SMPS.
However, even when the SMPS is in the normal operation,
the over load protection circuit can be activated during the
load transition. In order to avoid this undesired operation, the
over load situation should be distinguished from the normal
load transition situation. As a measure against this problem,
over load protection circuit in the FPS is designed to be acti-
vated after a specified period to determine whether it is a
transient situation or an overload situation. The protection
circuit is allowed to shut down the SMPS only when the over
load condition continues longer than preset period. The
detailed operation principle is explained in figure 3. Because
of the pulse by pulse current limit circuit, the maximum cur-
rent through the FPS is limited, and therefore the maximum
Over voltage Protection (OVP) Circuit
The FPS has a self-protection feature against malfunctions,
such as feedback circuit open or short-circuit. When the
feedback terminal is open due to a malfunction in the sec-
ondary side feedback circuit or a defect of solder, the current
through the opto-coupler transistor becomes almost zero.
6
FS7M0880
Then, Vfb continues increasing and the preset maximum
current flows through the primary side until the over load
protection circuit is activated. Since maximum current is
transferred to the secondary side, the secondary side voltage
becomes much higher than the rated voltage. If there is no
protection circuit against over voltage, the devices in the
secondary side will be damaged. In order to prevent this sit-
uation, the FPS has an over voltage protection circuit (pro-
tection against feedback circuit abnormalities). In general,
Vcc is proportional to the output voltage and FPS uses Vcc
instead of directly monitoring the output voltage to detect
to increase slowly, also increasing the duty ratio slowly.
When the voltage of C reaches about 3.2V, PNP transistor
S
is turned off and Cs continues being charged up to 5V
through Rss. Then, the voltage of the comparator inverting
input follows the feedback voltage of pin 4 instead of follow-
ing the voltage of C . When the SMPS is shut down by the
S
protection circuits, C is discharged through the internal
S
resistor allowing C to be charged from 0V when the SMPS
S
starts up again.
over voltage situation. If V exceeds 24 V, the FPS acti-
CC
vates the OVP circuit. Therefore, V should be properly
CC
designed to be below 24V during normal operation to avoid
the undesired activation of OVP.
1 0 V
Fa irc h ild P o we r
S witc h (FP S )
5 u A
0 .9 m A
D2
PWM
Comparator
D1
5 V
OCP (Over Current Protection)
R s s
18.5K
OCP Operating
#4
#5
Vf b
Cfb
Latch signal
S
Q
C S
R
Rsense
100ns delay
200ns
OCP time
R
Figure 5. Soft Start Circuit
C
OCP Level
Minimum Turn- on Time
Fiqure 4. OCP Function & Block
Even though the FPS has OLP (Over Load Protection) and
pulse by pulse current limiting feature, these are not enough
to protect FPS when a secondary side diode short or load
short occurs. Therefore, FPS has internal OCP (Over Cur-
rent Protection) circuit as shown in figure 4. When the gate
turn-on signal is applied to the power MOSFET, the OCP
block is enabled and monitors the current through the sens-
ing resistor for 1us. The voltage across the resistor is com-
pared with the preset OCP level. If the sensing resistor
voltage is greater than the OCP level for longer than 200ns
within the allowed comparison time of 1us, the reset signal
is applied to the latch, resulting in the shutdown of SMPS.
Here, the additional delay of 100ns after the 200ns delay is
the time required for the operation of the protection circuit.
Soft start operation
At startup, the voltage of the PWM comparator inverting
input is saturated to its maximum value. In that case, the
power MOSFET current is at its maximum value and maxi-
mum allowable power is delivered to the secondary side
until the output voltage is established. It should be noted
that when the SMPS delivers maximum power to the sec-
ondary side during the startup, the entire circuit is seriously
stressed. By using a soft start function, such stresses can be
alleviated. Figure 5 shows how the soft-start circuit is
implemented. When it starts up, the soft start capacitor Cs
on pin 5 begins to be charged through the internal resistor
(Rss), which forces the comparator inverting input voltage
7
FS7M0880
3. Application Note using the FPS
-Flyback Application (100W)
HOT
NTC
Ω
47k
/2W
47nF
/630V
Bridge
Diode
220uF
/400V
MBRF2060CT
30uH
Ω
5M
UF4007
Ω
1K
12V
DC OUTPUT
/ 9A
Ω
7.6k
2200uF
/50V
2200uF
/50V
Ω
2k
Q817A
0.1uF
0.45uF
/275Vac
Ω
10
UF4004
4.7nF
4.7nF
Line
Filter
Ω
1.2k
KA431
3
1
Ω
2k
Ω
3.3k
S/S
Vcc Drain
KA7M0880
GND FB
5
4.7nF
4.7nF
0.45uF
/275Vac
2
4
47uF
/50V
FUSE:
250V2A
22nF
10nF
1uF
/50V
Q817A
PRIMARY
GND
18 5VAC-265VAC
Transformer Specification
2. Winding Specification
No.
PIN(S → F)
1 → 3
WIRE
TURNS
WINDING METHOD
N
0.4 φ × 1
42
SOLENOID WINDING
P/2
INSULATION : POLYESTER TAPE t = 0.050mm, 1Layer
12 → 13 14mm × 1 COPPER WINDING
INSULATION : POLYESTER TAPE t = 0.050mm, 3Layer
8 → 7 0.3 φ × 1 SOLENOID WINDING
INSULATION : POLYESTER TAPE t = 0.050mm, 1Layer
3 → 4 0.4 φ × 1 42 SOLENOID WINDING
OUTER INSULATION : POLYESTER TAPE t = 0.050mm, 3Layer
N+12V
8
N
B
9
N
P/2
3. Electical Characteristic
CLOSURE
PIN
1 - 4
1 - 4
SPEC.
REMARKS
1kHz, 1V
INDUCTANCE
700uH ±10%
10uH MAX.
LEAKAGE L
2nd ALL SHORT
4. Core & Bobbin
CORE : EER 4042
BOBBIN : EER4042
8
FS7M0880
-Forward Application (250W)
Ω Ω
56K 56K
223
Line Inductor
/630V /2W
/2W
T1
T3
UF4007
+ 12V / 10A
T13,14
Line
NTC
FUSE
Inductor
102
472
470uF
/200V
Ω
220k
/1W
/275V
2200uF
UF4007
2200uF
0.47uF
/275V
Ω
10
S30SC4M
470uF
/200V
+ 5V / 26A
Ω
220k
/1W
L4
472
T8,9
/275V
Ω
33k
/0.5W
Ω
2.2k
Ω
33k
UF4004
T6
/0.5W
Ω
10
3300uF
1000uF
UF4007
Ω
2.2k
Vcc
Drain
T10,11,12
T7
S P S
Ω
5.6k
Ω
1k
GN S.S.
D
F.B.
123
Ω
820
Q817
33uF
/35V
1uF
/50V
333
104
Q817
KA431
103
103
Transformer Specification
2. Winding Specification
No.
PIN(S → F)
1 → 3
WIRE
TURNS
50T
4T
WINDING METHOD
N
0.65 φ × 1
14mm × 1
0.65 φ × 4
0.65 φ × 1
0.65 φ × 1
SOLENOID WINDING
COPPER WINDING
SOLENOID WINDING
SOLENOID WINDING
SOLENOID WINDING
P/2
N+5V
N+12V
8, 9 → 10, 11, 12
13, 14 → 9
1 → 3
5T
N
P/2
50T
6T
N
VCC
7 → 6
3. Electical Characteristic
CLOSURE
PIN
1 - 3
1 - 3
INDUCTANCE
LEAKAGE L
4. Secondary Inductor(L2) Specipication
Core : Power Core 27 φ 16 Grade
5V : 12T (1 φ × 2)
10V : 27T (1.2 φ × 1)
9
FS7M0880
Typical Performance Characteristics
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 2. Start up Current vs. Temp.
Figure 1. Operating Supply Current vs. Temp.
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 4. Stop Threshold Voltage vs. Temp.
Figure 3. Start Threshold Voltage vs. Temp.
1.20
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 6. Maximum Duty Cycle vs. Temp.
Figure 5. Operating Frequency vs. Temp.
10
FS7M0880
Typical Performance Characteristics(Continued)
1.7
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 8. Feedback Offset Voltage vs. Temp.
Figure 7. Minimum Duty Cycle vs. Temp.
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40 -20
0
20
40
60
80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 9. Shutdown Feedback Voltage vs. Temp.
Figure 10. Shutdown Delay Current vs. Temp.
1.20
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
-40 -20
0
20
40
60 80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 12. Over Voltage Protection vs. Temp.
Figure 11. SoftStart Voltage vs. Temp.
11
FS7M0880
Typical Performance Characteristics(Continued)
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
1.4
1.3
1.2
1.1
1.0
0.9
0.8
-40 -20
0
20 40 60 80 100 120 140 160
-40 -20
0
20
40
60
80 100 120 140 160
Temperature [°C]
Temperature [°C]
Figure 14. Peak Current vs. Temp.
Figure 13. Feedback Sink Current vs. Temp.
18
16
14
12
10
8
6
4
2
0.2
0.4
0.6
0.8
1.0
Soft_start capacitor[µF]
Figure 15. Soft_start Capacitor vs. Soft_start Temp.
12
FS7M0880
Package Dimensions
TO-3P-5L
13
FS7M0880
Package Dimensions (Continued)
TO-3P-5L (Forming)
14
FS7M0880
Ordering Information
Product Number
Package
Rating
Fosc
KA7M0880-TU
TO-3P-5L
800V, 8A
67kHz
KA7M0880-YDTU
TO-3P-5L(Forming)
TU : Non Forming Type
YDTU : Forming type
15
FS7M0880
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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