KA3842B_02 [FAIRCHILD]
SMPS Controller; SMPS控制器
| 型号： | KA3842B_02 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | SMPS Controller |
| 文件： | 总10页 (文件大小：125K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
www.fairchildsemi.com
KA3842B/KA3843B/KA3844B/
KA3845B
SMPS Controller
Features
Description
• Low Start up Current
• Maximum Duty Clamp
The KA3842B/KA3843B/KA3844B/KA3845B are fixed
frequency current-mode PWM controller. They are
• UVLO With Hysteresis
• Operating Frequency up to 500KHz
specially designed for Off - Line and DC-to-DC converter
applications with minimum external components. These
integrated circuits feature a trimmed oscillator for precise
duty cycle control, a temperature compensated reference,
high gain error amplifier, current sensing comparator and a
high current totempole output for driving a power MOSFET.
The KA3842B and KA3844B have UVLO thresholds of
16V (on) and 10V (off). The KA3843B and KA3845B are
8.5V (on) and 7.9V (off). The KA3842B and KA3843B can
operate within 100% duty cycle. The KA3844B and
KA3845B can operate with 50% duty cycle.
8-DIP
1
14-SOP
1
Internal Block Diagram
Rev. 1.0.2
©2002 Fairchild Semiconductor Corporation
KA3842B/KA3843B/KA3844B/KA3845B
Absolute Maximum Ratings
Parameter
Symbol
Value
30
Unit
V
Supply Voltage
V
CC
Output Current
I
O
±1
A
Analog Inputs (Pin 2.3)
Error Amp Output Sink Current
V
-0.3 to 6.3
10
V
(ANA)
I
mA
mW
mW
°C
SINK (E.A)
Power Dissipation at T ≤25°C (8DIP)
P (Note1,2)
D
1200
A
Power Dissipation at T ≤25°C (14SOP)
P (Note1,2)
D
680
A
Storage Temperature Range
T
-65 ~ +150
+300
STG
Lead Temperature (Soldering, 10sec)
T
°C
LEAD
Note:
1. Board Thickness 1.6mm, Board Dimension 76.2mm ×114.3mm, (Reference EIA / JSED51-3, 51-7)
2. Do not exceeed P and SOA (Safe Operation Area)
D
Power Dissipation Curve
1200
1100
1000
900
8DIP
800
14SOP
700
600
500
400
300
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
AMBIENT TEMPERATURE (℃)
Thermal Data
Characteristic
Symbol
8-DIP
14-SOP
Unit
°C/W
Thermal Resistance Junction-ambient
R
100
180
thj-amb(MAX)
Pin Array
8-DIP
14SOP
8
7
6
5
VREF
14
13
COMP
VFB
1
2
3
4
COMP
1
2
3
4
5
6
7
VREF
N/C
VCC
N/C
VFB
CURRENT SENSE
RT/CT
OUTPUT
12 VCC
GND
N/C
11
10
9
PWR VC
OUTPUT
CURRENT SENSE
GND
N/C
RT/CT
8
PWR GND
2
KA3842B/KA3843B/KA3844B/KA3845B
Electrical Characteristics
(V =15V, R =10KΩ, C =3.3nF, T = 0°C to +70°C, unless otherwise specified)
CC
T
T
A
Parameter
Symbol
Conditions
Min. Typ. Max. Unit
REFERENCE SECTION
Reference Output Voltage
Line Regulation
V
T = 25°C, I
REF
= 1mA
4.90 5.00 5.10
V
REF
J
∆V
∆V
12V≤V ≤25V
CC
-
-
-
6
6
20
25
mV
mV
REF
REF
SC
Load Regulation
1mA≤I
≤20mA
REF
Short Circuit Output Current
OSCILLATOR SECTION
Oscillation Frequency
I
T = 25°C
A
-100 -180 mA
f
T = 25°C
J
47
-
52
0.05
1.6
57
1
KHz
%
Frequency Change with Voltage ∆f/∆V
CC
12V≤V ≤25V
CC
Oscillator Amplitude
ERROR AMPLIFIER SECTION
Input Bias Current
V
-
-
-
V
P-P
OSC
I
-
-
-0.1
-2
µA
V
BIAS
Input Voltage
V
V
= 2.5V
2.42 2.50 2.58
I(E>A)
pin1
Open Loop Voltage Gain
Power Supply Rejection Ratio
Output Sink Current
Output Source Current
High Output Voltage
Low Output Voltage
CURRENT SENSE SECTION
Gain
G
2V≤ V ≤4V (Note3)
65
60
2
90
70
7
-
dB
dB
mA
mA
V
VO
O
PSRR
12V≤ V
≤25V (Note3)
-
CC
I
V
V
V
V
= 2.7V, V
= 2.3V, V
= 1.1V
= 5V
-
-
SINK
pin2
pin2
pin2
pin2
pin1
pin1
I
-0.6
5
-1.0
6
SOURCE
V
= 2.3V, R = 15KΩ to GND
-
OH
L
V
= 2.7V, R = 15KΩ to Pin 8
-
0.8
1.1
V
OL
L
G
(Note 1 & 2)
= 5V(Note 1)
2.85
3
1
3.15 V/V
V
Maximum Input Signal
Power Supply Rejection Ratio
Input Bias Current
V
V
0.9
1.1
-
V
I(MAX)
pin1
PSRR
12V≤ V
≤25V (Note1,3)
-
-
70
-3
dB
µA
CC
I
-
-10
BIAS
OUTPUT SECTION
I
I
I
I
= 20mA
-
-
0.08
1.4
0.4
2.2
-
V
V
SINK
SINK
V
OL
Low Output Voltage
High Output Voltage
= 200mA
= 20mA
13
12
-
13.5
13.0
45
V
SOURCE
SOURCE
V
OH
= 200mA
-
V
Rise Time
Fall Time
t
T = 25°C, C = 1nF (Note 3)
150
150
ns
ns
R
J
L
t
T = 25°C, C = 1nF (Note 3)
-
35
F
J
L
UNDER-VOLTAGE LOCKOUT SECTION
KA3842B/KA3844B
KA3843B/KA3845B
KA3842B/KA3844B
KA3843B/KA3845B
14.5 16.0 17.5
V
V
V
V
Start Threshold
V
TH(ST)
7.8
8.5
7.0
8.4
10.0 11.5
7.6 8.2
9.0
Min. Operating Voltage
(After Turn On)
V
OPR(MIN)
3
KA3842B/KA3843B/KA3844B/KA3845B
Electrical Characteristics (Continued)
(V =15V, R =10KΩ, C =3.3nF, T = 0°C to +70°C unless otherwise specified)
CC
T
T
A
Parameter
Symbol
Conditions
Min.
Typ. Max. Unit
PWM SECTION
Max. Duty Cycle
Min. Duty Cycle
D
KA3842B/KA3843B
95
47
-
97
48
-
100
50
0
%
%
%
(Max)
D
(MAX)
KA3844B/KA3845B
D
-
(MIN)
TOTAL STANDBY CURRENT
Start-Up Current
I
-
-
-
0.45
14
1
17
-
mA
mA
V
ST
Operating Supply Current
Zener Voltage
I
V
=V
=ON
= 25mA
CC
CC(OPR)
pin3 pin2
V
I
30
38
Z
Adjust V above the start threshould before setting at 15V
CC
Note:
1. Parameter measured at trip point of latch
2. Gain defined as:
∆Vpin1
A = -----------------
,0 ≤ Vpin3 ≤ 0.8V
∆Vpin3
3. These parameters, although guaranteed, are not 100 tested in production.
Figure 1. Open Loop Test Circuit
High peak currents associated with capacitive loads necessitate careful grounding techniques Timing and bypass capacitors
should be connected close to pin 5 in a single point ground. The transistor and 5KΩ potentiometer are used to sample the
oscillator waveform and apply an adjustable ramp to pin 3.
4
KA3842B/KA3843B/KA3844B/KA3845B
Figure 2. Under Voltage Lockout
During Under-Voltage Lock-Out, the output driver is biased to a high impedance state. Pin 6 should be shunted to ground with
a bleeder resistor to prevent activating the power switch with output leakage current.
Figure 3. Error Amp Configuration
Figure 4. Current Sense Circuit
Peak current (I ) is determined by the formula:
S
1.0V
IS(MAX)= ------------
RS
A small RC filter may be required to suppress switch transients.
5
KA3842B/KA3843B/KA3844B/KA3845B
Figure 5. Oscillator Waveforms and Maximum Duty Cycle
Oscillator timing capacitor, C , is charged by V
through R and discharged by an internal current source. During the dis-
T
T
REF
charge time, the internal clock signal blanks the output to the low state. Selection of R and C therefore determines both
T
T
oscillator frequency and maximum duty cycle. Charge and discharge times are determined by the formulas:
t = 0.55 R C
c
T
T
0.0063RT – 2.7
---------------------------------------
0.0063RT – 4
tD= RTCTIn
Frequency, then, is: f=(t + t )-1
c
d
1.8
ForRT > 5KΩ,f= --------------
RTCT
Figure 6. Oscillator Dead Time & Frequency
(Deadtime vs C RT > 5kΩ)
Figure 7. Timing Resistance vs Frequency
T
Figure 8. Shutdown Techniques
6
KA3842B/KA3843B/KA3844B/KA3845B
Shutdown of the KA3842B can be accomplished by two methods; either raise pin 3 above 1V or pull pin 1 below a voltage
two diode drops above ground. Either method causes the output of the PWM comparator to be high (refer to block diagram).
The PWM latch is reset dominant so that the output will remain low until the next clock cycle after the shutdown condition at
pins 1 and/or 3 is removed. In one example, an externally latched shutdown may be accomplished by adding an SOR which
will be reset by cycling V below the lower UVLO threshold. At this point the reference turns off, allowing the SCR to reset.
CC
Figure 9. Slope Compensation
A fraction of the oscillator ramp can be resistively summed with the current sense signal to provide slope compensation for
converters requiring duty cycles over 50%. Note that capacitor, C , forms a filter with R2 to suppress the leading edge switch
T
spikes.
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 10. Temperature Drift (Vref)
Figure 11. Temperature Drift (Ist)
TEMPERATURE (°C)
Figure 12. Temperature Drift (Icc)
7
KA3842B/KA3843B/KA3844B/KA3845B
Mechanical Dimensions
Package
Dimensions in millimeters
8-DIP
6.40 ±0.20
0.252 ±0.008
#1
#4
#8
#5
3.30 ±0.30
0.130 ±0.012
5.08
0.200
MAX
7.62
0.300
3.40 ±0.20
0.134 ±0.008
0.33
MIN
0.013
+0.10
–0.05
0.25
+0.004
–0.002
0.010
8
KA3842B/KA3843B/KA3844B/KA3845B
Mechanical Dimensions (Continued)
Package
Dimensions in millimeters
14-SOP
0.05
0.002
MIN
1.55 ±0.10
0.061 ±0.004
#14
#1
#8
#7
6.00 ±0.30
0.236 ±0.012
1.80
MAX
0.071
3.95 ±0.20
0.156 ±0.008
5.72
0.225
0.60 ±0.20
0.024 ±0.008
9
KA3842B/KA3843B/KA3844B/KA3845B
Ordering Information
Product Number
KA3842B
Package
Operating Temperature
KA3843B
8-DIP
KA3844B
KA3845B
0 ~ + 70°C
KA3842BD
KA3843BD
KA3844BD
KA3845BD
14-SOP
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
2/18/02 0.0m 001
Stock#DSxxxxxxxx
2002 Fairchild Semiconductor Corporation
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