FSTU32X800 [FAIRCHILD]
20-Bit Bus Switch with Precharged Outputs and -2V Undershoot Protection; 20位总线开关与预充电输出和-2V下冲保护
| 型号： | FSTU32X800 |
| 厂家： | 
FAIRCHILD SEMICONDUCTOR |
| 描述： | 20-Bit Bus Switch with Precharged Outputs and -2V Undershoot Protection |
| 文件： | 总5页 (文件大小：195K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
November 2002
Revised November 2002
FSTU32X800
20-Bit Bus Switch with Precharged Outputs
and −2V Undershoot Protection
General Description
Features
■ 4Ω switch connection between two ports
The Fairchild Switch FSTU32X800 provides 20-bits of
high-speed CMOS TTL-compatible bus switching. The low
On Resistance of the switch allows inputs to be connected
to outputs without adding propagation delay or generating
additional ground bounce noise. The A and B Ports are
protected against undershoot to support an extended
range to 2.0V below ground. Fairchild’s integrated Under-
shoot Hardened Circuit (UHC ) senses undershoot at the
I/O and responds by preventing voltage differentials from
developing and turning the switch on. The device also pre-
charges the B Port to a selectable bias voltage (BiasV) to
minimize live insertion noise.
■ Undershoot Hardened to -2.0V
■ Soft enable turn-on to minimize bus-to-bus charge
sharing during enable
■ Low lCC
■ Zero bounce in flow-through mode
■ Output precharge to minimize live insertion noise
■ Control inputs compatible with TTL level
■ See Applications Note AN-5008 for details
The device is organized as two 10-bit switches with a bus
enable (OEn) signal. When OEn is LOW, the switch is ON
and Port A is connected to Port B. When OEn is HIGH, the
switch is OPEN and the B Port is precharged to BiasV
through an equivalent 10-kΩ resistor.
Ordering Code:
Package
Order Number
Package Description
Number
FSTU32X800QSP
MQA48A 48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 2002 Fairchild Semiconductor Corporation
DS500791
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Logic Diagrams
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
OEn
B0–B19
Function
Connect
OEn
A
Bus Switch Enable
Bus A
L
A0–A19
H
BiasV
Precharge
B
Bus B
BiasVn
Bus B Voltage Bias
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC
)
−0.5V to +7.0V
−2.0V to +7.0V
−0.5V to +7.0V
−0.5V to +7.0V
−50 mA
DC Switch Voltage (VS)
Power Supply Operating (VCC
Precharge Supply (BiasV)
)
4.0V to 5.5V
1.5V to VCC
0V to 5.5V
0V to 5.5V
Bias V Voltage Range
DC Input Voltage (VIN) (Note 2)
DC Input Diode Current (lIK) VIN< 0V
DC Output (IOUT) Sink Current
Input Voltage (VIN
)
Output Voltage (VOUT
)
128 mA
Input Rise and Fall Time (tr, tf)
Switch Control Input
DC VCC/GND Current (ICC/IGND
)
+/− 100 mA
0 ns/V to 5 ns/V
0 ns/V to DC
Storage Temperature Range (TSTG
)
−65°C to +150 °C
Switch I/O
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
T
A = −40 °C to +85 °C
VCC
Symbol
Parameter
Units
Conditions
Min
Typ
Max
(V)
(Note 4)
VIK
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
Output Current
4.5
4.0 - 5.5
4.0 - 5.5
5.5
−1.2
V
V
IIN = −18 mA
VIH
VIL
II
2.0
0.8
V
±1.0
µA
mA
µA
Ω
0 ≤ VIN ≤ 5.5V
IO
4.5
0.25
BiasV = 2.4V, B = 0
0 ≤ A ≤ VCC, VIN = VIH
IOZ
RON
OFF-STATE Leakage Current
Switch On Resistance
(Note 5)
5.5
±1.0
7.0
4.5
4.0
4.0
V
V
V
V
V
S = 0V, IIN = 64 mA
4.5
7.0
Ω
S = 0V, IIN = 30 mA
4.5
8.0
15.0
20.0
3.0
Ω
S = 2.4V, IIN = 15 mA
S = 2.4V, IIN = 15 mA
S = VCC or GND, IOUT = 0
4.0
11.0
Ω
ICC
Quiescent Supply Current (Note 6)
5.5
µA
∆ ICC
Increase in ICC per Input
(Note 7)
5.5
2.5
mA
OE Input at 3.4V
Other Inputs at VCC or GND
IBIAS
IOZU
VIKU
Bias Pin Leakage Current
Switch Undershoot Current
Voltage Undershoot
5.5
5.5
5.5
±1.0
100.0
−2.0
µA
µA
V
OE = 0V, B = 0V, BiasV = 5.5V
I
IN = −20 mA, OE = 5.5V, VOUT ≥ VIH
0.0 mA ≥ IIN ≥ −50 mA, OE = 5.5V
Note 4: Typical values are at VCC = 5.0V and TA = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On Resistance is determined by the lower of the
voltages on the two (A or B) pins.
Note 6: Per VCC pin.
Note 7: Per TTL driven inputs, control pins only.
3
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AC Electrical Characteristics
T
A = −40 °C to +85 °C,
L = 50 pF, RU = RD = 500Ω
VCC = 4.0V
Min Max
C
Figure
Number
Symbol
Parameter
Units
Conditions
V
CC = 4.5 – 5.5V
Min Max
tPHL
,
Propagation Delay Bus to Bus
(Note 8)
Figures
1, 2
0.25
30.0
30.0
6.1
0.25
35.0
35.0
6.5
ns
ns
ns
ns
ns
VI = OPEN
tPLH
tPZH
tPZL
tPHZ
tPLZ
Output Enable Time
OE1, OE2, to An, Bn
VI = OPEN
BiasV = GND
VI = 7V
7.0
Figures
1, 2
7.0
1.0
1.0
BiasV = 3V
VI = OPEN
BiasV = GND
VI = 7V
Output Disable Time
OE1, OE2, to An, Bn
Figures
1, 2
7.3
6.8
BiasV = 3V
Note 8: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance (Note 9)
Symbol
CIN
CI/O
Parameter
Typ
Max
Units
Conditions
CC = 5.0V
VCC, OE = 5.0V
Control Pin Input Capacitance
3.0
pF
V
Input/Output Capacitance
5.0
pF
Note 9: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω, RU = RD = 500Ω
Note: CL includes load and stray capacitance, CL= 50 pF
Note: Input PRR = 1.0 MHz, tW = 500 ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
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Physical Dimensions inches (millimeters) unless otherwise noted
48-Lead Quarter Size Very Small Outline Package (QVSOP), JEDEC MO-154, 0.150" Wide
Package Number MQA48A
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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5
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相关型号：
FSTU32X800QSPX
Bus Driver, CBT/FST/QS/5C/B Series, 2-Func, 10-Bit, True Output, CMOS, PDSO48, 0.150 INCH, MO-154, QVSOP-48
FAIRCHILD
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