FSTU3257 [FAIRCHILD]
Quad 2:1 Multiplexer/Demultiplexer Bus Switch with -2V Undershoot Protection; 四路2 : 1多路复用器/多路解复用器总线开关具有-2V下冲保护型号: | FSTU3257 |
厂家: | FAIRCHILD SEMICONDUCTOR |
描述: | Quad 2:1 Multiplexer/Demultiplexer Bus Switch with -2V Undershoot Protection |
文件: | 总7页 (文件大小:92K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
August 1999
Revised April 2000
FSTU3257
Quad 2:1 Multiplexer/Demultiplexer Bus Switch
with −2V Undershoot Protection
General Description
Features
■ Undershoot hardened to −2V (A and B Ports)
The Fairchild Switch FSTU3257 is a quad 2:1 high-speed
CMOS TTL-compatible multiplexer/demultiplexer bus
switch. The low on resistance of the switch allows inputs to
be connected to outputs without adding propagation delay
or generating additional ground bounce noise.
■ Soft enable turn-on to minimize bus to bus charge
sharing during enable
■ 4Ω switch connection between two ports.
■ Minimal propagation delay through the switch.
When OE is LOW, the select pin connects the A Port to the
selected B Port output. The A and B Ports are “undershoot
hardened” with UHC protection to support an extended
range of 2.0V below ground. Fairchild’s integrated Under-
shoot Hardened Circuit UHC senses undershoot at the I/O
and responds by preventing voltage differentials from
developing and turning on the switch. When OE is HIGH,
the switch is OPEN and a high-impedance state exists
between the two ports.
■ Low lCC
.
■ Zero bounce in flow-through mode.
■ Control inputs compatible with TTL level.
■ See Applications Note AN-5008 for details
Ordering Code:
Order Number
FSTU3257M
Package Number
M16A
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
FSTU3257QSC
FSTU3257MTC
MQA16
MTC16
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
UHC is a trademark of Fairchild Semiconductor Corporation.
© 2000 Fairchild Semiconductor Corporation
DS500302
www.fairchildsemi.com
Logic Diagram
Connection Diagram
Pin Descriptions
Truth Table
Pin Name
Description
S
X
L
OE
H
Function
Disconnect
A = B1
OE
S
Bus Switch Enable
Select Input
Bus A
L
A
H
L
A = B2
B1–B2
Bus B
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2
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 4)
−0.5V to +7.0V
Supply Voltage (VCC
)
DC Switch Voltage (VS) (Note 2)
−2.0V to +7.0V Power Supply Operating (VCC
)
4.0V to 5.5V
0V to 5.5V
0V to 5.5V
DC Input Control Pin Voltage (VIN)(Note 3)
DC Input Diode Current (lIK) VIN<0V
−0.5V to +7.0V Input Voltage (VIN
)
−50mA
Output Voltage (VOUT
)
DC Output (IOUT
DC VCC/GND Current (ICC/IGND
Storage Temperature Range (TSTG
)
128mA Input Rise and Fall Time (tr, tf)
)
+/− 100mA
−65°C to +150 °C
Switch Control Input
Switch I/O
0nS/V to 5nS/V
0nS/V to DC
)
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The Absolute Maximum Ratings are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The Recommended Operating Conditions tables will define the conditions
for actual device operation.
Note 2: VS is the voltage observed/applied at either the A or B Ports across
the switch.
Note 3: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 4: Unused control inputs must be held HIGH or LOW. They may not
float.
DC Electrical Characteristics
VCC
TA = −40 °C to +85 °C
Symbol
Parameter
Units
Conditions
Typ
(Note 5)
(V)
Min
Max
VIK
Clamp Diode Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
Input Leakage Current
OFF-STATE Leakage Current
Switch On Resistance
(Note 6)
4.5
4.0–5.5
4.0–5.5
5.5
−1.2
V
V
IIN = −18mA
VIH
VIL
II
2.0
0.8
±1.0
±1.0
7
V
µA
µA
Ω
0≤ VIN ≤5.5V
0 ≤A, B ≤VCC
IOZ
RON
5.5
4.5
4
4
V
V
V
V
V
IN = 0V, IIN = 64mA
4.5
7
Ω
IN = 0V, IIN = 30mA
4.5
8
15
20
3
Ω
IN = 2.4V, IIN = 15mA
IN = 2.4V, IIN = 15mA
IN = VCC or GND, IOUT = 0
4.0
11
Ω
ICC
Quiescent Supply Current
Increase in ICC per Input
5.5
µA
mA
∆ ICC
5.5
2.5
One input at 3.4V
Other inputs at VCC or GND
0.0 mA ≥ IIN ≥ −50 mA
OE = 5.5V
VIKU
Voltage Undershoot
5.5
−2.0
V
Note 5: Typical values are at VCC = 5.0V and TA = +25°C
Note 6: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
3
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AC Electrical Characteristics
T
A = −40 °C to +85°C,
L = 50pF, RU = RD = 500Ω
CC = 4.5 – 5.5V VCC = 4.0V
Min Max
C
Figure
No.
Symbol
Parameter
Units
Conditions
V
Min
Max
0.25
30.0
30.0
t
PHL,tPLH Prop Delay Bus to Bus (Note 7)
0.25
35.0
35.0
Figures
2, 3
ns VI = OPEN
Prop Delay, Select to Bus A
7.0
7.0
tPZH, tPZL Output Enable Time, Select to Bus B
VI = 7V for tPZL
Figures
2, 3
ns
ns
Output Enable Time, OE to Bus A, B
7.0
1.5
30.0
8.4
35.0
9.8
VI = OPEN for tPZH
VI = 7V for tPLZ
tPHZ, tPLZ Output Disable Time, Select to Bus B
Figures
2, 3
Output Disable Time, Output Enable Time, OE to Bus A, B
1.5
8.8
9.8
VI = OPEN for tPHZ
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Capacitance (Note 8)
Symbol
Parameter
Typ
Max
Units
Conditions
VCC = 5.0V
CIN
Control Pin Input Capacitance
3
pF
A Port
B Port
7.5
5.5
14
pF
pF
pF
CI/O
Input/Output Capacitance
VCC, OE = 5.0V
CI/O ON State
Input/Output Capacitance ON State (A or B Port)
V
CC = 5.0V Switch ON
Note 8: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
Undershoot Characteristic (Note 9)
Symbol
Parameter
Min
Typ
OH − 0.3
Max
Units
Conditions
VOUTU
Output Voltage During Undershoot
2.5
V
V
Figure 1
Note 9: This is intended to characterize the device’s protective capabilities by maintaining output signal integrity during an input transient voltage undershoot
event.
FIGURE 1.
Device Test Conditions
Transient
Input Voltage (V ) Waveform
Parameter
VIN
Value
Units
IN
See Waveform
100K
V
Ω
V
V
R1 - R2
VTRI
11.0
VCC
5.5
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4
AC Loading and Waveforms
Note: Input driven by 50Ω source terminated in 50Ω
Note: CL includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500 nS
FIGURE 2. AC Test Circuit
FIGURE 3. AC Waveforms
5
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Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
Package Number MQA16
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6
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Package Number MTC16
Technology Description
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its
74LVX3L384 (FST3384) bus switch product.
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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7
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