FST34170MTDX_NL [FAIRCHILD]

17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch; 17位至34位多路复用器/多路解复用器总线开关
FST34170MTDX_NL
型号: FST34170MTDX_NL
厂家: FAIRCHILD SEMICONDUCTOR    FAIRCHILD SEMICONDUCTOR
描述:

17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch
17位至34位多路复用器/多路解复用器总线开关

解复用器 开关
文件: 总5页 (文件大小:82K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
October 2000  
Revised January 2005  
FST34170  
17-Bit to 34-Bit Multiplexer/Demultiplexer Bus Switch  
General Description  
Features  
The Fairchild Switch FST34170 is a 17-bit to 34-bit high-  
speed CMOS TTL-compatible multiplexer/demultiplexer  
bus switch. The low on resistance of the switch allows  
inputs to be connected to outputs without adding propaga-  
tion delay or generating additional ground bounce noise.  
Slower Output Enable times prevent signal disruption  
4 switch connection between two ports  
Minimal propagation delay through the switch  
Low lCC  
Zero bounce in flow-through mode  
The device can be used in applications where two buses  
need to be addressed simultaneously. The FST34170 is  
designed so that the A Port demultiplexes into B1 or B2 or  
Control inputs compatible with TTL level  
See Applications Note AN-5008 for details  
both.  
Two select (SEL1, SEL2) inputs provide switch enable con-  
trol.  
Ordering Code:  
Package  
Order Number  
Package Description  
Number  
FST34170MTD  
(Note 1)  
MTD56  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
FST34170MTDX_NL  
(Note 2)  
MTD56  
Pb-Free 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153,  
6.1mm Wide  
Note 1: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Note 2: “_NL” indicates Pb-Free product (per JEDEC J-STD-020B). Device is available in Tape and Reel only.  
UHC is a trademark of Fairchild Semiconductor Corporation.  
© 2005 Fairchild Semiconductor Corporation  
DS500450  
www.fairchildsemi.com  
Logic Diagram  
Connection Diagram  
Truth Table  
Inputs  
Function  
SEL1  
SEL2  
Pin Descriptions  
L
H
L
H
L
x A x B1  
x A x B2  
Pin Name  
SEL1, SEL2  
A
Description  
Select Inputs  
Bus A  
L
x A x B1 and x B2  
Switch Open  
H
H
B1, B2  
Bus B  
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2
Absolute Maximum Ratings(Note 3)  
Recommended Operating  
Conditions (Note 6)  
Supply Voltage (VCC  
)
0.5V to 7.0V  
0.5V to 7.0V  
DC Switch Voltage (VS) (Note 4)  
DC Input Control Pin Voltage  
(VIN) (Note 5)  
Power Supply Operating (VCC  
Input Voltage (VIN  
Output Voltage (VOUT  
)
4.0V to 5.5V  
0V to 5.5V  
0V to 5.5V  
)
0.5V to 7.0V  
50 mA  
)
DC Input Diode Current (lIK) VIN 0V  
Input Rise and Fall Time (tr, tf)  
Switch Control Input  
DC Output Current (IOUT  
DC VCC/GND Current (ICC/IGND  
Storage Temperature Range (TSTG  
)
128 mA  
0nS/V to 5nS/V  
0nS/V to DC  
)
/
100 mA  
Switch I/O  
)
65 C to 150  
C
Free Air Operating Temperature (TA)  
40 C to 85 C  
Note 3: The “Absolute Maximum Ratings” are those values beyond which  
the safety of the device cannot be guaranteed. The device should not be  
operated at these limits. The parametric values defined in the Electrical  
Characteristics tables are not guaranteed at the absolute maximum rating.  
The “Recommended Operating Conditions” table will define the conditions  
for actual device operation.  
Note 4: V is the voltage observed/applied at either the A or B Ports across  
S
the switch.  
Note 5: The input and output negative voltage ratings may be exceeded if  
the input and output diode current ratings are observed.  
Note 6: Unused control inputs must be held HIGH or LOW. They may not  
float.  
DC Electrical Characteristics  
T
40 C to 85  
C
A
Symbol  
Parameter  
V
Units  
Conditions  
Min  
Typ  
Max  
CC  
(V)  
4.5  
(Note 7)  
V
V
V
Clamp Diode Voltage  
1.2  
V
V
V
A
A
A
A
I
18mA  
IK  
IH  
IL  
IN  
HIGH Level Input Voltage  
LOW Level Input Voltage  
Input Leakage Current  
4.0–5.5  
4.0–5.5  
5.5  
2.0  
0.8  
1.0  
10  
1.0  
1.0  
7
I
0
V
5.5V  
5.5V  
I
IN  
0
V
0
IN  
I
I
, I  
OFF-STATE Leakage Current  
OFF-STATE Leakage Current  
Switch On Resistance  
(Note 8)  
5.5  
A,  
B,  
V
V
, V  
, V  
OZH OZL  
CC  
CC  
, I  
5.5  
0
OZH OZL  
R
4.5  
4
4
V
V
V
V
V
0V, I  
0V, I  
64 mA  
30 mA  
15 mA  
15 mA  
ON  
IN  
IN  
IN  
IN  
IN  
IN  
4.5  
7
IN  
4.5  
8
14  
20  
3
2.4V, I  
2.4V, I  
IN  
IN  
4.0  
11  
I
Quiescent Supply Current  
5.5  
A
V
or GND, I  
OUT  
0
CC  
CC  
I
Increase in I per Input  
5.5  
2.5  
mA  
One input at 3.4V  
Other inputs at V or GND  
CC  
CC  
CC  
Note 7: Typical values are at V  
5.0V and T  
25 C  
CC  
A
Note 8: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the  
voltages on the two (A or B) pins.  
3
www.fairchildsemi.com  
AC Electrical Characteristics  
T
40 C to 85 C,  
50 pF, RU RD 500  
A
C
L
Symbol  
Parameter  
Units  
Conditions  
Figure No.  
V
4.5 5.5V  
V
4.0V  
Max  
CC  
CC  
Min  
Max  
Min  
t
t
, t  
A or B, to B or A (Note 9)  
Output Enable Time,  
SEL to A, B  
0.25  
0.25  
ns  
ns  
V
V
OPEN  
Figures 1, 2  
Figures 1, 2  
PHL PLH  
I
I
PZH  
PZL  
PHZ  
PLZ  
7.0  
7.0  
1.0  
1.0  
30.0  
30.0  
6.9  
35.0  
OPEN for t  
PZH  
PHZ  
t
t
t
Output Enable Time,  
SEL to A, B  
35.0  
7.3  
ns  
ns  
ns  
V
V
V
7V for t  
Figures 1, 2  
Figures 1, 2  
Figures 1, 2  
I
I
I
PZL  
Output Disable Time,  
SEL to A, B  
OPEN for t  
Output Disable Time,  
SEL to A, B  
7.7  
7.7  
7V for t  
PLZ  
Note 9: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On  
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).  
Capacitance (Note 10)  
Symbol  
Parameter  
Typ  
4
Max  
Units  
pF  
Conditions  
5.0V  
5.0V, Switch OFF  
C
Control Pin Input Capacitance  
Input/Output Capacitance “OFF State”  
V
V
IN  
CC  
C
8
pF  
I/O OFF  
CC  
Note 10: T  
25 C, f 1 MHz, Capacitance is characterized but not tested.  
A
AC Loading and Waveforms  
Note: Input driven by 50 source terminated in 50  
Note: C includes load and stray capacitance, C  
50 pF  
L
L
Note: Input PRR 1.0 MHz, t  
500 ns  
W
FIGURE 1. AC Test Circuit  
FIGURE 2. AC Waveforms  
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4
Physical Dimensions inches (millimeters) unless otherwise noted  
56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide  
Package Number MTD56  
Technology Description  
The Fairchild Switch family derives from and embodies Fairchild’s proven switch technology used for several years in its  
74LVX3L384 (FST3384) bus switch product.  
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and  
Fairchild reserves the right at any time without notice to change said circuitry and specifications.  
LIFE SUPPORT POLICY  
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT  
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD  
SEMICONDUCTOR CORPORATION. As used herein:  
1. Life support devices or systems are devices or systems  
which, (a) are intended for surgical implant into the  
body, or (b) support or sustain life, and (c) whose failure  
to perform when properly used in accordance with  
instructions for use provided in the labeling, can be rea-  
sonably expected to result in a significant injury to the  
user.  
2. A critical component in any component of a life support  
device or system whose failure to perform can be rea-  
sonably expected to cause the failure of the life support  
device or system, or to affect its safety or effectiveness.  
www.fairchildsemi.com  
5
www.fairchildsemi.com  

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